STV80NE03L-06 N - CHANNEL 30V - 0.005Ω - 80A - PowerSO-10 STripFET MOSFET T YPE V DSS R DS(on) ID STV80NE03L-06 30 V < 0.006 Ω 80 A ■ ■ ■ ■ ■ TYPICAL RDS(on) = 0.005 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE 100 oC APPLICATION ORIENTED CHARACTERIZATION 10 DESCRIPTION This Power Mosfet is the latest development of STMicroelectronics unique ”Single Feature Size” strip-based process. The resulting transistor shows extremely high packing density for low on-resistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 1 PowerSO-10 INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ HIGH CURRENT, HIGH SPEED SWITCHING ■ SOLENOID AND RELAY DRIVERS ■ MOTOR CONTROL, AUDIO AMPLIFIERS ■ DC-DC & DC-AC CONVERTERS ■ AUTOMOTIVE ENVIRONMENT (INJECTION, ABS, AIR-BAG, LAMPDRIVERS, Etc. ) ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR V GS Parameter Value Drain-source Voltage (VGS = 0) 30 V Drain- gate Voltage (R GS = 20 kΩ) 30 V ± 20 V 80 A Drain Current (continuous) at Tc = 100 C 60 A Drain Current (pulsed) 320 A 150 W Derating Factor 1 W /o C Peak Diode Recovery voltage slope 7 V/ns G ate-source Voltage o ID Drain Current (continuous) at Tc = 25 C ID o I DM (•) P tot dv/dt Ts tg Tj o T otal Dissipation at Tc = 25 C Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area May 2000 Un it -65 to 175 o C 175 o C ( 1) ISD ≤ 80 A, di/dt ≤ 300 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX 1/8 STV80NE03L-06 THERMAL DATA R thj -case Rthj -amb R thc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature F or Soldering Purpose o 1 62.5 0.5 300 C/W oC/W o C/W o C Max Value Unit AVALANCHE CHARACTERISTICS Symbo l Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max, δ < 1%) 80 A E AS Single Pulse Avalanche Energy (starting Tj = 25 o C, ID = IAR , V DD = 15 V) 600 mJ ELECTRICAL CHARACTERISTICS (TJ = - 40 to 150 oC unless otherwise specified) OFF Symbo l V (BR)DSS Parameter Drain-source Breakdown Voltage Test Con ditions I D = 250 µA I D = 250 µA V GS = 0 V GS = 0 I DSS V DS = Max Rating Zero Gate Voltage Drain Current (V GS = 0) V DS = Max Rating IGSS Gate-body Leakage Current (VDS = 0) Min. o Tc =25 C Typ. Max. 27 30 Unit V 1 50 µA µA ± 100 nA Typ. Max. Unit 3.0 2.5 V 1.7 0.012 0.018 0.006 0.009 Ω Ω Ω Ω T c =25 oC V GS = ± 20 V ON (∗) Symbo l V GS(th) R DS(on) I D(o n) Parameter Test Con ditions Gate Threshold Voltage V DS = V GS V DS = V GS ID = 250 µA ID = 250 µA Static Drain-source On Resistance ID = ID = ID = ID = On State Drain Current V GS V GS V GS V GS = = = = 10V 5V 10V 5V 40 40 40 40 A A A A Min. 0.6 T J =25 oC T J =25 oC o T J =25 C 0.005 40 V DS > ID(o n) x R DS(on )ma x V GS = 10 V A DYNAMIC Symbo l g f s (∗) C iss C os s C rss 2/8 Parameter Test Con ditions Forward Transconductance V DS > ID(o n) x R DS(on )ma x Input Capacitance Output Capacitance Reverse Transfer Capacitance V DS = 25 V f = 1 MHz I D =40 A V GS = 0 Min. Typ. Max. 20 Unit S 6500 1500 500 8700 2000 700 pF pF pF STV80NE03L-06 ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbo l Typ. Max. Unit t d(on) tr Turn-on Time Rise Time Parameter V DD = 15 V I D = 40 A R G =4.7 Ω V GS = 5 V (see test circuit, figure 3) Test Con ditions 40 260 55 350 ns ns Qg Q gs Q gd Total G ate Charge Gate-Source Charge Gate-Drain Charge V DD = 24 V 95 30 44 130 nC nC nC Typ. Max. Unit 70 165 250 95 220 340 ns ns ns Typ. Max. Unit 80 320 A A 1.5 V I D = 80 A Min. V GS = 5 V SWITCHING OFF Symbo l tr (Voff) tf tc Parameter Off-voltage Rise T ime Fall T ime Cross-over Time Test Con ditions Min. V DD = 24 V I D = 80 A R G =4.7 Ω V GS = 5 V (see test circuit, figure 5) SOURCE DRAIN DIODE Symbo l Parameter Test Con ditions ISD I SDM (•) Source-drain Current Source-drain Current (pulsed) V SD (∗) Forward On Voltage I SD = 80 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current I SD = 80 A di/dt = 100 A/µs o Tj = 150 C V DD = 15 V (see test circuit, figure 5) t rr Q rr I RRM Min. V GS = 0 75 ns 0.14 µC 4 A (∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 % (•) Pulse width limited by safe operating area Safe Operating Area for Thermal Impedance 3/8 STV80NE03L-06 Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STV80NE03L-06 Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STV80NE03L-06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STV80NE03L-06 PowerSO-10 MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 3.35 3.65 0.132 0.144 A1 0.00 0.10 0.000 0.004 B 0.40 0.60 0.016 0.024 c 0.35 0.55 0.013 0.022 D 9.40 9.60 0.370 0.378 D1 7.40 7.60 0.291 0.300 E 9.30 9.50 0.366 0.374 E1 7.20 7.40 0.283 0.291 E2 7.20 7.60 0.283 0.300 E3 6.10 6.35 0.240 0.250 E4 5.90 6.10 0.232 e 1.27 0.240 0.050 F 1.25 1.35 0.049 0.053 H 13.80 14.40 0.543 0.567 1.80 0.047 h 0.50 L 0.002 1.20 q 1.70 α 0 0.071 0.067 o o 8 B 0.10 A B 10 = E4 = = = E1 = E3 = E2 = E = = = H 6 = = 1 5 e 0.25 B SEATING PLANE DETAIL ”A” A C M Q h D = D1 = = = SEATING PLANE A F A1 A1 L DETAIL ”A” α 0068039-C 7/8 STV80NE03L-06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics 2000 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com 8/8