TESDD5V0 Bi-directional ESD Protection Diode Small Signal Diode SOD-523F Features Meet IEC61000-4-2 (ESD) ±15kV (air), ±8kV (contact) Meet IEC61000-4-4 (EFT) rating. 40A (5/50ήs) Protects one birectional I/O line Working Voltage : 5V Pb free version, RoHS compliant, and Halogen free Unit (inch) Unit (mm) Dimensions Mechanical Data Min Max Min Max Case : SOD-523F flat lead small outline plastic package A 0.70 0.90 0.028 0.035 Terminal: Matte tin plated, lead free., solderable per MIL-STD-202, Method 208 guaranteed B 1.50 1.70 0.059 0.067 C 0.25 0.35 0.010 0.014 High temperature soldering guaranteed: 260°C/10s D 1.10 1.30 0.043 0.051 Mounting position: Any E 0.60 0.70 0.024 0.028 Weight :2 mg (approximately) F 0.10 0.14 0.004 0.006 Marking Code : DT Applications Pin Configutation Cell Phone Handsets and Accessories Notebooks, Desktops, and Servers Keypads, Side Keys, USB 2.0, LCD Displays Portable Instrumentation Suggested PAD Layout Microprocessor based equipment 0.40 Ordering Information 0.40 Part No. Package Packing Packing Code Marking RKG TESDD5V0 SOD-523F 3K / 7" Reel 1.00 DT 1.80 Unit : mm Maximum Ratings and Electrical Characteristics Rating at 25°C ambient temperature unless otherwise specified. Maximum Ratings Symbol Value Units Peak Pulse Power (tp=8/20μs waveform) PPP 100 W ESD per IEC 61000-4-2 (Air) ESD per IEC 61000-4-2 (Contact) VESD ±15 ±8 KV Type Number Junction and Storage Temperature Range TJ, TSTG . -55 to + 150 °C . Electrical Characteristics Type Number Reverse Stand-Off Voltage Reverse Breakdown Volta IR= Reverse Leakage Curren VR= IPP= IPP= Clamping Voltage Junction Capacitance 1mA 5V 1A 3A VR=0V, f=1.0MHz Units V Symbol VRWM Min - V(BR) 6 - V IR - 1 9.8 15 uA Vc CJ Max 5 13 (Typ.) V pF Notes: 1. The suggested land pattern dimensions have been provided for reference only, as actual pad layouts may vary despending on application. Version : C11 TESDD5V0 Bi-directional ESD Protection Diode Small Signal Diode Rating and Characteristic Curves FIG 1 Non-Repetitive Peak Pulse Power vs. Pulse Time FIG 2 Pulse Waveform 110 Waveform Parameters: tr = 8μs, td = 20μs 100 90 Percent of IPP Peak Pulse Power Ppp (KW) 10 1 80 70 60 e 50 -1 40 0.1 td=Ipp/2 30 20 10 0.01 0.1 1 10 100 0 1000 0 5 Pulse Duration (us) 10 15 20 25 30 Time (us) FIG 3 Admissible Power Dissipation Curve FIG 4 Typical Junction Capacitance 120 15 Normalized Capacitance Power Rating (%) 100 80 10 60 40 5 20 f = 1.0MHz 0 0 0 20 40 60 80 100 120 140 160 180 Ambient Tempeatature (oC) 0 1 2 3 4 5 Reverse Voltage (V) FIG 5 Clamping Voltage vs. Peak Pulse Current) Clamping Voltage (V) 25 20 15 10 5 Waveform Parameters: tr = 8μs, td = 20μs 0 0 1 2 3 4 5 6 Peak Pulse Current (A) Version : C11 TESDD5V0 Bi-directional ESD Protection Diode Small Signal Diode Applications Information Designed to protect one data, I/O, or power supply line. Designed to protect sensitive electronics from damage or latch-up due to ESD Designed to replace multilayer varistors (MLVs) in portable applications Offers superior electrical characteristics such as lower clamping voltage and no device degradation when compared to MLVs The combination of small size and high ESD surge capability makes them ideal for use in portable applications. Circuit Board Layout Recommendations Good circuit board layout is critical for the suppression of ESD induced transients. Place the ESD Protection Diode near the input terminals or connectors to restrict transient coupling. Minimize the path length between the ESD Protection Diode and the protected line. Minimize all conductive loops including power and ground loops. The ESD transient return path to ground should be kept as short as possible. Tape & Reel specification TSC label Item Top Cover Tape Symbol Carrier depth K 2.40 Max. Sprocket hole D 1.50 +0.10 Reel outside diameter Carieer Tape Any Additional Label (If Required) 10 Pitches Cumulative Tolerance on Tape ±2.0mm ( ±0.008") P D P1 T E F K0 W BB0 0 B1 D' Top Cover Tape See Note1 K For Components 2.0mm X 1.2mm and Larger A0 Dimension (mm) A 178 ± 1 Reel inner diameter D1 50 Min. Feed hole width D2 13.0 ± 0.5 Sprocke hole position E 1.75 ±0.10 Punch hole position F 3.50 ±0.05 Sprocke hole pitch P0 4.00 ±0.10 Embossment center P1 2.00 ±0.10 Overall tape thickness T 0.6 Max. Tape width W 8.30 Max. Reel width W1 14.4 Max. Center Lines of Cavity Embossment For Machine Reference Only Including Draft and RADLL Concentric Around B 0 W1 A D2 D1 Direction of Feed Note 1: A0, B0, and K0 are determined by component size. The clearance between the components and the cavity must be within 0.05 mm min. to 0.5 mm max. The component cannot rote more than 10o within the determined cavity. Note 2: If B1 exceeds 4.2 mm(0.165'') for 8 mm embossed tape, the tape may not feed through all tape feeders. Version : C11