FSA2156 Low-Voltage SPST 0.4Ω Analog Switch Features Description Maximum 0.7Ω On Resistance (RON) for The FSA2156 is a high-performance Single-Pole SingleThrow (SPST) analog switch that features ultra low RON of 0.4 (typical) at 2.7V VCC. The FSA2156 operates over the wide VCC range of 1.65V to 4.3V and is fabricated with sub-micron CMOS technology to achieve fast switching speeds. The select input is TTL-level compatible. FSA2156 features very low quiescent current even when the control voltage is lower than the VCC supply. This feature facilitates longer battery life in mobile handset applications and allows for the direct interface with baseband-processor, general-purpose I/Os. +2.7V Supply 0.25Ω Maximum RON Flatness for +2.7V Supply Space-Saving MicroPak™ and SC70 Packaging Broad VCC Operating Range: 1.65 to 4.3V Fast Turn-on and Turn-off Times Over-Voltage Tolerant TTL-Compatible Control Input Suitable for 2 UL USB2.0 Applications: 200mA Low ICCT Current Over Expanded Control Input Range Ordering Information Part Number Top Mark FSA2156P6X 256 6-lead SC70, EIAJ SC88, 1.25mm Wide 3000 Units on Tape and Reel FSA2156L6X FY 6-lead MicroPak™, 1.0mm Wide 5000 Units on Tape and Reel FSA2156FHX FY 6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 Package Description Packing Method 5000 Units on Tape and Reel www.fairchildsemi.com FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch March 2011 Figure 1. A 1 6 VCC VCC 1 6 A GND 2 5 NC NC 2 5 B B 3 4 Sel Sel 3 4 GND SC70 Pin Assignments (Top View) Figure 3. Figure 2. MicroPak™ Pin Assignments (Top View) MicroPak2™ Pin Assignments (Top View) Pin Definitions Pin # SC70 Pin # MicroPak™ 1 6 2 4 Pin # MicroPak2™ 6 5 4 Name A GND B Description Switch I/O Data Ports Ground Switch I/O Data Ports 3 5 4 3 3 Sel Control Input 5 2 2 NC No Connect 6 1 1 VCC Supply Voltage Truth Table Control Input (S) Function Logic Level LOW Logic Level HIGH Switch Open (OFF) Switch Closed (ON) © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 www.fairchildsemi.com 2 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch Pin Configurations Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol Parameter Min. Max. Unit VCC Supply Voltage -0.5 4.6 V VSW Switch I/O Voltage(1) -0.5 VCC + 0.3 V Control Input Voltage -0.5 4.6 V IIK Input Clamp Diode Current ± 50 ± 50 mA ISW Switch I/O Current (Continuous) 500 mA Pulsed at 1ms Duration, <10% Duty Cycle 500 mA 180 mW VCNTRL ISWPEAK PD TSTG (1) SC70 Package Power Dissipation at 85°C MicroPak™ Package Storage Temperature Range -65 180 mW +150 C TJ Maximum Junction Temperature +150 C TL Lead Temperature (Soldering, 10 seconds) +260 C All Pins 2 kV I/O to GND 8 kV 2 kV ESD Electrostatic Discharge Capability Human Body Model, JEDEC:JESD22-A114 Charge Discharge Model, JEDEC:JESD22-C101 Note: 1. The input and output negative ratings may be exceeded if the input and output diode current ratings are observed. Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol VCC VCNTRL Parameter Supply Voltage (2) Min. Max. Unit 1.65 4.30 V Control Input Voltage 0 VCC V VSW Switch I/O Voltage 0 VCC V ISW Switch I/O Load Current 350 mA -40 +85 °C SC70 6L Package 350 C/W MicroPak™ 6L Package 310 C/W TA Operating Temperature JA Thermal Resistance (free air) Note: 2. Control input must be held HIGH or LOW; it must not float. © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 www.fairchildsemi.com 3 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch Absolute Maximum Ratings All typical values are at 25°C unless otherwise specified. Symbol Parameter Condition VCC (V) Min. VIH VIL Input Voltage High Input Voltage Low TA=-40 to +85°C TA=+25°C Typ. Max. Min. 3.6 to 4.3 1.4 2.7 to 3.6 1.3 2.3 to 2.7 1.1 1.65 to 1.95 0.9 V 3.6 to 4.3 0.7 2.7 to 3.6 0.5 2.3 to 2.7 0.4 1.65 to 1.95 0.4 Control Input Leakage VCNTRL=0 to VCC 1.65 to 4.3 INO(0FF) Off Leakage Current of Port B VA=0.3V, VCC – 0.3V, VB=0.3V, VCC – 0.3V or Floating, Figure 5 1.95 to 4.3 -10 IA(ON) On Leakage Current of Port A VA=0.3V, VCC – 0.3V, VB=Floating, Figure 6 1.95 to 4.3 -20 Power Off Leakage Current Port A VA=0.3V, 4.3V, VCC=0V, VB=0V 0V Power Off Leakage Current(3) Port A VA=0.3V, 4.3V, VCC=0V, VB=Floating 0V ION=100mA, VB=0V, 0.7V, 3.6V and 4.3V 4.3 0.36 0.60 ION=100mA, VB=0V, 0.7V, 2.0V and 2.7V 2.7 0.40 0.70 ION=100mA, VB=0V, 0.7V, 1.6V and 2.3V 2.3 0.55 0.80 ION=100mA, VB=0.7V 1.65 1.50 ION=100mA, VB=0V, 0.7V, 3.6V and 4.3V 4.3 0.25 ION=100mA, VB=0V, 0.7V, 2.0V and 2.7V 2.7 0.25 ION=100mA, B=0V, 0.7V, 1.6V and 2.3V 2.3 0.30 ION=100mA, VB=0V, 0.7V, 0.9V and 1.65V 1.65 ICC Quiescent Supply VSW =0 or VCC, IOUT=0 Current 4.3 ICCT Increase in ICC per Input IIN I0FF RON RFLAT(ON) Switch On Resistance(4) Figure 4 On Resistance Flatness(5) Figure 4 -4 Unit Max. V V -0.5 0.5 µA 10 -50 50 nA 20 -100 100 nA ±25 µA 35 nA +4 -35 Ω Ω VCNTRL=2.6V 4.3 VCNTRL=1.8V 0.90 -100 30 100 3 7 -500 500 6 12 15 nA µA Notes: 3. Guaranteed by characterization; not production tested. 4. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch. 5. Flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of conditions. © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 www.fairchildsemi.com 4 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch DC Electrical Characteristics All typical values are at 25°C unless otherwise specified. Symbol Parameter Condition TA=-40ºC to +85ºC TA=+25ºC VCC (V) Min. Typ. Max. tON Turn-On Time VB=1.5V, RL=50Ω, CL=35pF Turn-Off Time VB=1.5V, RL=50Ω, CL=35pF 55 60 2.7 to 3.6 60 65 2.3 to 2.7 65 70 ns Figure 7 Figure 8 3.6 to 4.3 65 70 2.7 to 3.6 70 75 2.3 to 2.7 75 80 ns Figure 7 Figure 8 pC Figure 11 90 2.3 to 4.3 6 1.65 to 1.95 1.3 f=100kHz RT=50Ω 1.65 to 4.3 -65 dB Figure 10 -3db Bandwidth RT=50Ω CL=0pF 1.65 to 4.3 80 MHz Figure 9 Total Harmonic Distortion RT=600, VSW =0.5VPP, f=20Hz to 20kHz 1.65 to 4.3 .02 % Charge Injection CL=1.0nF, VS=0V, RS=0Ω Off Isolation BW THD OIRR Figure 40 1.65 to 1.95 Q Unit Max. 3.6 to 4.3 1.65 to 1.95 tOFF Min. Capacitance Symbol CIN COFF CON Parameter Control Pin Input Capacitance B-Port Off Capacitance A-Port On Capacitance © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 Condition VCC (V) TA=+25ºC Min. Typ. Max. Unit Figures f=1MHz 0 1.5 pF Figure 12 f=1MHz 4.3 38 pF Figure 12 f=1MHz 4.3 115 pF Figure 13 www.fairchildsemi.com 5 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch AC Electrical Characteristics VON Floating, 0.3V or Vcc-0.3V FSA2156 B FSA2156 B IA(OFF) A A A VSW VSW ION GND VCNTRL GND VCNTRL GND RON = VON / ION Figure 4. On Resistance Figure 5. Off Leakage FSA2156 B Floating B FSA2156 A GND A VSW VCNTRL © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 RL VOUT RS VCNTRL On Leakage Figure 8. CL GND GND GND Figure 6. A VSW IA(ON) RL and CL are functions of the application environment (see AC/DC tables for values). CL includes test fixture and stray capacitance. Figure 7. Test Circuit Load Turn-On / Turn-Off Waveforms www.fairchildsemi.com 6 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch Test Diagrams Network Ana lyzer Network Analyzer FSA 215 6 RS RS FSA2156 GND VIN RT VS VS GND GND VCNTRL GND V IN V CNTRL GND GND GND RT GND GND V OUT VOUT CL RT GND R S and R T are fun ction s of the app lication en viron men t (see AC/DC tab les for value s). Off isolation = 20 Log (V OUT/V IN). GND RT and CL are functions of the application environment (see AC/DC tables for values). CL includes test fixtures and stray capacitance. Figure 9. Bandwidth Generator B RS VS Figure 10. FSA2156 VSW VCC Input – VCNTRL Off A VOUT CL GND nSn Channel Off Isolation On Off 0V DVOUT GND VOUT VCNTRL GND CL includes test fixture and stray capacitance Figure 11. B F=1MHz Figure 12. Charge Injection Test FSA2156 Capacitance Meter Capacitance Meter VCNTRL B FSA2156 VCNTRL F=1MHz A A Channel Off Capacitance © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 Q = DVOUT / CL Figure 13. Channel On Capacitance www.fairchildsemi.com 7 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch Test Diagrams (Continued) FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch Physical Dimensions SYMM C L 2.00±0.20 0.65 A 0.50 MIN 6 4 B PIN ONE 1.25±0.10 1 1.90 3 0.30 0.15 (0.25) 0.40 MIN 0.10 0.65 A B 1.30 LAND PATTERN RECOMMENDATION 1.30 1.00 0.80 SEE DETAIL A 1.10 0.80 0.10 C 0.10 0.00 C 2.10±0.30 SEATING PLANE NOTES: UNLESS OTHERWISE SPECIFIED GAGE PLANE (R0.10) 0.25 0.10 0.20 A) THIS PACKAGE CONFORMS TO EIAJ SC-88, 1996. B) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS DO NOT INCLUDE BURRS OR MOLD FLASH. D) DRAWING FILENAME: MKT-MAA06AREV6 30° 0° 0.46 0.26 DETAIL A SCALE: 60X Figure 14. 6-Lead, SC70, EIAJ SC-88a, 1.25mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/analog/pdf/sc70-6_tr.pdf. Package Designator P6X © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 3000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 8 2X 0.05 C 1.45 B 2X (1) 0.05 C (0.254) (0.49) 5X 1.00 (0.75) PIN 1 IDENTIFIER 5 (0.52) 1X A TOP VIEW 0.55MAX (0.30) 6X PIN 1 0.05 C 0.05 0.00 RECOMMENED LAND PATTERN 0.05 C C 0.25 0.15 6X 1.0 DETAIL A 0.10 0.05 0.45 0.35 0.10 0.00 6X C B A C 0.40 0.30 0.35 5X 0.25 0.40 5X 0.30 0.5 (0.05) 6X Notes: (0.13) 4X BOTTOM VIEW DETAIL A PIN 1 TERMINAL 0.075 X 45 CHAMFER 1. CONFORMS TO JEDEC STANDARD M0-252 VARIATION UAAD 2. DIMENSIONS ARE IN MILLIMETERS 3. DRAWING CONFORMS TO ASME Y14.5M-1994 4. FILENAME AND REVISION: MAC06AREV4 5. PIN ONE IDENTIFIER IS 2X LENGTH OF ANY OTHER LINE IN THE MARK CODE LAYOUT. Figure 15. 6-Lead, MicroPak™, 1.0mm Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/products/logic/pdf/micropak_tr.pdf. Package Designator L6X © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 9 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch Physical Dimensions (Continued) FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch Physical Dimensions (Continued) 0.89 0.35 0.05 C 1.00 2X B A 5X 0.40 PIN 1 MIN 250uM 0.66 1.00 1X 0.45 6X 0.19 0.05 C TOP VIEW RECOMMENDED LAND PATTERN FOR SPACE CONSTRAINED PCB 2X 0.90 0.05 C 0.35 0.55MAX C 5X 0.52 SIDE VIEW 0.73 (0.08) 4X 1 DETAIL A 2 1X 0.57 0.09 0.19 6X 3 0.20 6X ALTERNATIVE LAND PATTERN FOR UNIVERSAL APPLICATION (0.05) 6X 5X 0.35 0.25 0.35 6 5 4 0.60 (0.08) 4X BOTTOM VIEW 0.10 .05 C C B A 0.40 0.30 NOTES: A. COMPLIES TO JEDEC MO-252 STANDARD B. DIMENSIONS ARE IN MILLIMETERS. C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN. E. DRAWING FILENAME AND REVISION: MGF06AREV3 Figure 16. 0.075X45° CHAMFER DETAIL A PIN 1 LEAD SCALE: 2X 6-Lead, MicroPak2, 1x1mm Body, .35mm Pitch Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. Tape and Reel Specifications Please visit Fairchild Semiconductor’s online packaging area for the most recent tape and reel specifications: http://www.fairchildsemi.com/packaging/MicroPAK2_6L_tr.pdf. Package Designator FHX © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 Tape Section Cavity Number Cavity Status Cover Type Status Leader (Start End) 125 (Typical) Empty Sealed Carrier 5000 Filled Sealed Trailer (Hub End) 75 (Typical) Empty Sealed www.fairchildsemi.com 10 FSA2156 — Low-Voltage SPST 0.4Ω Analog Switch © 2006 Fairchild Semiconductor Corporation FSA2156 Rev. 1.0.4 www.fairchildsemi.com 11