HA16158P/FP
PFC & PWM Control IC
ADE-204-072 (Z)
Rev.0
Aug. 2002
Description
The HA16158 is a power supply controller IC combining an AC-DC converter switching controller for
power factor correction and an off-line power supply switching controller. The PFC (power factor
correction) section employs average current mode PWM and the off-line power supply control section
employs peak current mode PWM.
The HA16158 allows the operating frequency to be varied with a single timing resistance, enabling it to be
used for a variety of applications.
The PFC operation can be turned on and off by an external control signal. Use of this on/off function
makes it possible to disable PFC operation at a low line voltage, or to perform remote control operation
from the transformer secondary side.
The PWM controller includes a power-saving function that reduces the operating frequency to a maximum
of 1/64 in the standby state, greatly decreasing switching loss.
The PFC section and PWM section are each provided with a soft start control pin, enabling a soft start time
to be set easily.
Features
<Maximum Ratings>
• Supply voltage Vcc: 24 V
• Operating junction temperature Tjopr: –40°C to +125°C
<Electrical Characteristics>
• VREF output voltage VREF: 5.0 V ± 2%
• UVLO start threshold VH: 16.0 V ± 1.0 V
• UVLO shutdown threshold VL: 10.0 V ± 0.6 V
• PFC output maximum duty cycle Dmax-pfc: 95% typ.
• PWM output maximum duty cycle Dmax-pwm: 45% typ.
<Functions>
• Synchronized PFC and PWM timing
• PFC function on/off control
• PWM power-saving function (frequency reduced to maximum of 1/64)
• PWM overvoltage latch protection circuit
• Soft start control circuits for both PFC and PWM
• Package lineup: SOP-16/DILP-16
HA16158P/FP
Pin Arrangement
GND
1
16
PWM-CS
PWM-OUT
2
15
PWM-COMP
PFC-OUT
3
14
PWM-SS
VCC
4
13
PFC-SS
PFC-ON
5
12
PFC-EO
VREF
6
11
PFC-FB
CAO
7
10
IAC
PFC-CS
8
9
RT
(Top view)
Pin Functions
Pin No.
Pin Name
Pin Function
1
GND
Ground
2
PWM-OUT
Power MOS FET driver output (PWM control)
3
PFC-OUT
Power MOS FET driver output (PFC control)
4
VCC
Supply voltage
5
PFC-ON
PFC function on/off signal input
6
VREF
Reference voltage
7
CAO
Average current control error amplifier output
8
PFC-CS
PFC control current sense signal input
9
RT
Operating frequency setting timing resistance connection
10
IAC
Multiplier reference current input
11
PFC-FB
PFC control error amplifier input
12
PFC-EO
PFC control error amplifier output
13
PFC-SS
PFC control soft start time setting capacitance connection
14
PWM-SS
PWM control soft start time setting capacitance connection
15
PWM-COMP
PWM control voltage feedback
16
PWM-CS
PWM control current sense signal input
Rev.0, Aug. 2002, page 2 of 23
HA16158P/FP
Block Diagram
Vref
IAC
PFCEO
PFC-CS
10
Multiplier
12
8
7
RT
CAO
9
Rmo
3.3k
C-LIMIT
UVLO
4
VREF
6
VCC
Oscillator
VREF
C-AMP
PFCFB
2.5V
11
V-AMP
PFC-OVP
VTH: 2.80V
VTL : 2.60V
PFCON
PFC-CLK
(PWM-CLK/2)
–0.25V –0.5V
±1.0A
Gain
Selector
PFCOUT
VREF
VREF VREF
GOOD
VREF
5
B+
PFC-FB supervisor
13
VTH: 3.80V
VTL : 3.40V
Oscillator
PFC ON/OFF
VTH: 1.50V
VTL : 1.20V
GND
3
PFC Control
LOGIC
3.5V
25µ
2RA
RA
15
Vref
2
PWMCS
16
14
PWMOUT
Oscillator
VTH: 2.40V
VTL : 1.50V
1V
4.0V
PWMCOMP
±1.0A
f/64 Divider
1
1.4V
PFCSS
Oscillator
PWM Control
LOGIC
1.7V
25µ
OVP Latch
PFC-FB
PWMSS
Rev.0, Aug. 2002, page 3 of 23
HA16158P/FP
Absolute Maximum Ratings
(Ta = 25°C)
Item
Symbol
Ratings
Unit
Power supply voltage
Vcc
24
V
PFC-OUT output current (peak)
Ipk-out1
±1.0
A
3
PWM-OUT output current (peak)
Ipk-out2
±1.0
A
3
PFC-OUT output current (DC)
Idc-out1
±0.1
A
PWM-OUT output current (DC)
Idc-out2
±0.1
A
Pin voltage
Vi-group1
–0.3 to Vcc
V
4
Vi-group2
–0.3 to Vref
V
5
CAO pin voltage
Vcao
–0.3 to Veoh-ca
V
PFC-EO pin voltage
Vpfc-eo
–0.3 to Veoh-pfc
V
PFC-ON pin voltage
Vpfc-on
–0.3 to 7
V
RT pin current
Irt
50
µA
IAC pin current
Iiac
1
mA
PFC-CS pin voltage
Vi-cs
–1.5 to 0.3
V
VREF pin current
Io-ref
–20
mA
VREF pin voltage
Vref
–0.3 to Vref
V
Operating junction temperature
Tj-opr
–40 to +125
°C
Storage temperature
Tstg
–55 to +150
°C
Notes: 1.
2.
3.
4.
Note
6
Rated voltages are with reference to the GND (SGND, PGND) pin.
For rated currents, inflow to the IC is indicated by (+), and outflow by (–).
Shows the transient current when driving a capacitive load.
Group1 is the rated voltage for the following pins:
PFC-OUT, PWM-OUT
5. Group2 is the rated voltage for the following pins:
PFC-FB, PWM-CS, PWM-COMP, IAC, PFC-SS, PWM-SS, RT
6. HA16158P (DILP): θja = 120°C/W
HA16158FP (SOP): θja = 120°C/W
This value is based on actual measurements on a 10% wiring density
glass epoxy circuit board (40 mm × 40 mm × 1.6 mm).
Rev.0, Aug. 2002, page 4 of 23
HA16158P/FP
Electrical Characteristics
(Ta = 25°C, Vcc = 12 V, RT = 200 kΩ)
Item
Supply
Start threshold
VREF
Oscillator
Min
Typ
Max
Unit
VH
15.0
16.0
17.0
V
Test Conditions
Shutdown threshold
VL
9.4
10.0
10.6
V
UVLO hysteresis
dVUVL
5.2
6.0
6.8
V
Start-up current
Is
160
220
280
µA
Vcc = 14.8V
Is temperature stability
dIs/dTa
—
–0.3
—
%/°C
*1
Operating current
Icc
5.5
7.0
8.5
mA
IAC = 0A, CL = 0F
Shunt zenner voltage
Vz
25.5
27.5
29.5
V
Icc = 14mA
Vz temperature stability
dVz/dTa
—
–4
—
mV/°C
Icc = 14mA *1
Latch current
ILATCH
180
250
320
µA
Vcc = 9V
Output voltage
Vref
4.9
5.0
5.1
V
Isource = 1mA
Line regulation
Vref-line
—
5
20
mV
Isource = 1mA,
Vcc = 12V to 23V
Load regulation
Vref-load
—
5
20
mV
Isource = 1mA to 20mA
Temperature stability
dVref
—
80
—
ppm/°C
Ta = –40 to 125°C *1
Initial accuracy
fpwm
117
130
143
kHz
Measured pin: PWM-OUT
fpfc
58.5
65
71.5
kHz
Measured pin: PFC-OUT
dfpwm/dTa
—
±0.1
—
%/°C
Ta = –40 to 125°C *1
fpwm voltage stability
fpwm(line)
–1.5
+0.5
+1.5
%
VCC = 12V to 18V
Ramp peak voltage
Vramp-H
—
3.6
4.0
V
PFC *1
Ramp valley voltage
Vramp-L
—
0.65
—
V
PFC *1
CT peak voltage
Vct-H
—
3.2
—
V
PWM *1
CT valley voltage
Vct-L
1.50
1.60
—
V
PWM *1
Measured pin: RT
fpwm temperature stability
Supervisor
Symbol
RT voltage
Vrt
0.85
1.00
1.15
V
PFC on voltage
Von-pfc
1.4
1.5
1.6
V
PFC off voltage
Voff-pfc
1.1
1.2
1.3
V
PFC on-off hysteresis
dVon-off
0.2
0.3
0.4
V
Input current
Ipfc-on
—
0.1
1.0
µA
PFC-ON = 2V
PFC OVP set voltage
Vovps-pfc
2.65
2.80
2.95
V
Input pin: PFC-FB
PFC OVP reset voltage
Vovpr-pfc
2.45
2.60
2.75
V
Input pin: PFC-FB
PFC OVP hysteresis
dVovp
0.10
0.20
0.30
V
B+ good voltage
Vb-good
2.25
2.40
2.55
V
Measured pin: PFC-FB
B+ fail voltage
Vb-fail
1.4
1.5
1.6
V
Measured pin: PFC-FB
OVP latch
Latch threshold voltage
Vlatch
3.76
4.00
4.24
V
Input pin: PWM-SS
Latch reset voltage
Vcc-res
6.1
7.1
8.1
V
Power
saving
for PWM
Power saving on
voltage
Von-save
1.53
1.70
1.87
V
Measured pin: PWM-COMP
Minimum frequency
at light load
fpwm-min
—
2
—
kHz
PWM-COMP = 1.5V
Measured pin: PWM-OUT *1
Note:
1. Reference values for design.
Rev.0, Aug. 2002, page 5 of 23
HA16158P/FP
Electrical Characteristics (cont.)
(Ta = 25°C, Vcc = 12 V, RT = 200 kΩ)
Item
Symbol
Min
Typ
Max
Unit
Test Conditions
Soft start time
tss-pwm
—
4.2
—
ms
PWM-SS = 0V to Vct-h *1
Source current
Iss-pwm
–20.0
–25.0
–30.0
µA
Measured pin: PWM-SS
High voltage
Vh-ss
3.25
3.5
3.75
V
Measured pin: PWM-SS
Soft start for
PFC
Soft start time
tss-pfc
—
5.7
—
ms
PFC-SS = Vref to Vramp-I *1
Source current
Iss-pfc
+20.0
+25.0
+30.0
µA
Measured pin: PFC-SS
PWM current
sense
Delay to output
td-cs
—
210
300
ns
PWM-EO = 5V,
PWM-CS = 0 to 2V
PFC current
limit
Threshold voltage
VLM1
–0.45
–0.50
–0.55
V
PFC-ON = 2V
Threshold voltage
VLM2
–0.22
–0.25
–0.28
V
PFC-ON = 4V
Delay to output
td-LM
—
280
500
ns
PFC-CS = 0 to –1V
PFC-VAMP
Feedback voltage
Vfb-pfc
2.45
2.50
2.55
V
PFC-EO = 2.5V
Input bias current
Ifb-pfc
–0.3
0
0.3
µA
Measured pin: PFC-FB
Open loop gain
Av-pfc
—
65
—
dB
*1
High voltage
Veoh-pfc
5.0
5.7
6.4
V
PFC-FB = 2.3V, PFC-EO: Open
Low voltage
Veol-pfc
—
0.1
0.3
V
PFC-FB = 2.7V, PFC-EO: Open
Source current
Isrc-pfc
—
–90
—
µA
PFC-FB = 1.0V, PFC-EO: 2.5V *1
Sink current
Isnk-pfc
—
90
—
µA
PFC-FB = 4.0V, PFC-EO: 2.5V *1
Soft start for
PWM
PFC-OUT
PWM-OUT
Transconductance
Gm-pfcv
150
200
250
µA/V
PFC-FB = 2.5V, PFC-EO: 2.5V
Minimum duty cycle
Dmin-pfc
—
—
0
%
CAO = 4.0V
Maximum duty cycle
Dmax-pfc
90
95
98
%
CAO = 0V
Rise time
tr-pfc
—
30
100
ns
CL = 1000pF
Fall time
tf-pfc
—
30
100
ns
CL = 1000pF
Peak current
Ipk-pfc
—
1.0
—
A
CL = 0.01µF *1
Low voltage
Vol1-pfc
—
0.05
0.2
V
Iout = 20mA
Vol2-pfc
—
0.5
2.0
V
Iout = 200mA
Vol3-pfc
—
0.03
0.7
V
Iout = 10mA, VCC = 5V
High voltage
Voh1-pfc
11.5
11.9
—
V
Iout = –20mA
Voh2-pfc
10.0
11.0
—
V
Iout = –200mA
Minimum duty cycle
Dmin-pwm
—
—
0
%
PWM-COMP = 0V
Maximum duty cycle
Dmax-pwm
42
45
49
%
PWM-COMP = Vref
Rise time
tr-pwm
—
30
100
ns
CL = 1000pF
Fall time
tf-pwm
—
30
100
ns
CL = 1000pF
Peak current
Ipk-pwm
—
1.0
—
A
CL = 0.01µF *1
Low voltage
Vol1-pwm
—
0.05
0.2
V
Iout = 20mA
Vol2-pwm
—
0.5
2.0
V
Iout = 200mA
Vol3-pwm
—
0.03
0.7
V
Iout = 10mA, VCC = 5V
Voh1-pwm
11.5
11.9
—
V
Iout = –20mA
Voh2-pwm
10.0
11.0
—
V
Iout = –200mA
High voltage
Note:
1. Reference values for design.
Rev.0, Aug. 2002, page 6 of 23
HA16158P/FP
Electrical Characteristics (cont.)
(Ta = 25°C, Vcc = 12 V, RT = 200 kΩ)
Item
PFC-CAMP
IAC/Multiplier
Gain selector
Symbol
Min
Typ
Max
Unit
Test Conditions
Input offset voltage
Vio-ca
—
±7
—
mV
*1
Open loop gain
Av-ca
—
65
—
dB
*1
High voltage
Veoh-ca
5.0
5.7
6.4
V
Low voltage
Veol-ca
—
0.1
0.3
V
Source current
Isrc-ca
—
–90
—
µA
CAO = 2.5V *1
Sink current
Isnk-ca
—
90
—
µA
CAO = 2.5V *1
Transconductance
Gm-pfcc
150
200
250
µA/V
*1
IAC pin voltage
Viac
0.7
1.0
1.3
V
IAC = 100µA
Terminal offset current
Imo-offset1
–67
–90
–113
µA
IAC = 0A, PFC-ON = 2V
Imo-offset2
–60
–80
–100
µA
IAC = 0A, PFC-ON = 4V
Output current
(PFC-ON = 2.0V)
Imo1
—
–20
—
µA
PFC-EO = 2V, IAC = 100µA *1, 2
Imo2
—
–60
—
µA
PFC-EO = 4V, IAC = 100µA *1, 2
Output current
(PFC-ON = 4.0V)
Imo3
—
–5
—
µA
PFC-EO = 2V, IAC = 100µA *1, 2
Imo4
—
–15
—
µA
PFC-EO = 4V, IAC = 100µA *1, 2
PFC-CS resistance
Rmo
—
3.3
—
kΩ
*1
Threshold voltage
for K = 0.05
VK-H
3.60
3.80
4.00
V
Measured pin: PFC-ON
Threshold voltage
for K = 0.25
VK-L
3.20
3.40
3.60
V
Measured pin: PFC-ON
VK hysteresis
dVK
0.30
0.40
0.50
V
*1
Notes: 1. Reference values for design.
2. Imo1 to Imo4 are defined as:
Imo = (PFC-CS pin current) – (Imo-offset)
IMO = K {IAC × (VEO − 1V)}
IAC
PFC-CAMP
−
+
IAC
VEO
K
Imo
VREF
3.3k
−0.5V −0.25V
+
−
PFC-CS
PFC-CS Terminal
Current
−
+
Imo-offset
PFC-CLIMIT
Rev.0, Aug. 2002, page 7 of 23
HA16158P/FP
Timing Diagram
1. Start-up Timing
VREF
PFC-ON
1.5V
(Von-pfc)
1.2V
(Voff-pfc)
Over current
PFC-CS
PFC-FB
(Supervise
B+)
–0.5V(VLM)
2.4V(Vb-good)
1.5V(Vb-fail)
2.4V(Vb-good)
3.6V(Vramp-H)
3.6V(Vramp-H)
PFC-SS
Soft start
PFC-OUT
Normal operation
PWM-SS
1.6V(Vct-L)
Soft start
PWM-OUT
Normal operation
Rev.0, Aug. 2002, page 8 of 23
1.6V(Vct-L)
1.5V(Vb-fail)
HA16158P/FP
2. PWM OVP Latch
Abnormal DC Output
Recovery
DC-OUT
0V(DC-OUT Shut down)
16V(VH)
10V(VL)
VCC
7.1V(Vcc-res)
PWM-SS
4V(Vlatch)
3.5V(Vh-ss)
Latching term for PWM
PWM-OUT
Latching term for PWM
PFC-OUT
Rev.0, Aug. 2002, page 9 of 23
HA16158P/FP
3. PWM Power Saving
RT
EOUT terminal voltage detection is performed
pulse-by-pulse.
EOUT
1.7V
PWM-OUT
PFC-OUT
Rev.0, Aug. 2002, page 10 of 23
frequency down: f/64 maximum
HA16158P/FP
Functional Description
1. UVL Circuit
The UVL circuit monitors the Vcc voltage and halts operation of the IC in the event of a low voltage.
The voltage for detecting Vcc has a hysteresis characteristic, with 16.0 V as the start threshold and 10.0 V
as the shutdown threshold.
When the IC has been halted by the UVL circuit, control is performed to fix driver circuit output low and
halt VREF output and the oscillator.
Vcc
16.0V
10.0V
4.5V
4.5V
VREF
V_CT
(internal signal)
PWM-RESET
(internal signal)
PFC-DT
(internal signal)
PFC-RAMP
(internal signal)
PWM-OUT
PFC-OUT
Figure 1
Rev.0, Aug. 2002, page 11 of 23
HA16158P/FP
2. Soft Start Circuit (for PWM Control)
This function gradually increases the pulse width of the PWM-OUT pin from a 0% duty cycle at start-up to
prevent a sudden increase in the pulse width that may cause problems such as transient stress on external
parts or overshoot of the secondary-side output voltage.
The soft start time can easily be set with a single external capacitance.
3.2V
V_PWM-SS
V_CT
(internal signal)
1.6V
PWM-SS
comp. out
(internal signal)
PWM-OUT
Figure 2
Soft start time tss-pwm is determined by PWM-SS pin connection capacitance Css-pwm and an internal
constant, and can be estimated using the equation shown below.
Soft start time tss-pwm is the time until the PWM-SS pin voltage reaches upper-end voltage 3.2 V of the
IC-internal CT voltage waveform after VREF starts up following UVLO release.
Soft start time tss-pwm when Css-pwm is 3.3 nF is given by the following equation.
tss-pwm =
33 [nF] × 3.2 [V]
Css-pwm × Vct-H
=
25 [µA]
Iss-pwm
≈ 4.2 [ms]
* Iss-pwm: PWM-SS pin source current, 25 µA typ.
Rev.0, Aug. 2002, page 12 of 23
HA16158P/FP
3. Soft Start Circuit (for PFC Control)
This function gradually increases the pulse width of the PFC-OUT pin from a 0% duty cycle at start-up to
prevent a sudden increase in the pulse width that may cause problems such as transient stress on external
parts or overshoot of the PFC output voltage (B+ voltage).
The soft start time can easily be set with a single external capacitance.
3.4V
V_PFC-SS
V_ramp
(internal signal)
PFC-SS
comp. out
(internal signal)
PFC-OUT
Figure 3
Soft start time tss-pfc is determined by PFC-SS pin connection capacitance Css-pfc and an internal
constant, and can be estimated using the equation shown below.
Soft start time tss-pfc is the time until the PFC-SS pin voltage reaches lower-end voltage 0.65 V of the ICinternal RAMP voltage waveform after VREF starts up following UVLO release.
Soft start time tss-pfc when Css-pfc is 3.3 nF is given by the following equation.
tss-pfc =
33 [nF] × (5 – 0.65)
Css-pfc × (VREF – Vramp-L)
=
25 [µA]
Iss-pwm
≈ 5.7 [ms]
* Iss-pfc: PFC-SS pin sink current, 25 µA typ.
In addition, when you do not use a soft start function, please ground this terminal.
Rev.0, Aug. 2002, page 13 of 23
HA16158P/FP
4. PFC On/Off Function
On/off control of the PFC function can be performed using the PFC-ON pin.
If an AC voltage that has undergone primary rectification and has been divided by an external resistance is
input, it is possible to halt PFC operation in the event of a low input voltage. On/off control is also possible
by using a logic signal.
This IC also incorporates a function that automatically detects a 100 V system or 200 V system AC voltage
at the PFC-ON pin, and switches multiplier gain and the PFC-CS comparison voltage.
These functions simplify the design of a power supply compatible with worldwide input.
Rec+
Em
R1
720kΩ
1.5V
1.2V
PFC-ON
5
PFC-ON/OFF control
PFC-ON(dc)
C1
2.2µF
R2
12kΩ
Multiplier gain switching
3.8V
3.4V
PFC-CS compare
voltage switching
PFC-ON(dc) = 2 ∗ Em / π ∗ R2 / (R1 + R2)
= 2 ∗ √2 ∗ Vac / π ∗ R2 / (R1 + R2)
156Vac
AC Voltage
Vac
140Vac
62Vac
49Vac
0Vac
3.8V
3.4V
PFC-ON
1.5V
1.2V
0V
ON
PFC status
PFC ON period
(internal signal)
OFF
0.25
Multiplier gain
(internal signal)
0.05
PFC-SS
compare
voltage
–0.25
(internal signal) –0.50
Figure 4
Rev.0, Aug. 2002, page 14 of 23
HA16158P/FP
5. Power Saving in Standby State (for PWM Control)
When the output load is light, as in the standby state, the operating frequency of the PWM control section is
automatically decreased in order to reduce switching loss.
Standby detection is performed by monitoring the PWM-COMP voltage, and the operating frequency is
decreased to a maximum of 1/64 of the reference frequency determined by an external timing resistance.
As standby detection is performed on a reference frequency pulse-by-pulse basis, the frequency varies
gently according to the output load.
RT
9
2
driver
Oscillator
PWM-OUT
PWM
Logic
R
VREF
Q
S
−
15
+
16
PWM-COMP
PWM-CS
−
f/64
Divider
reset
+
1.7V
Power Saving
Power Saving Peripheral Circuit
PWM-COMP
1.7V
PWM-OUT
f
f/64
Figure 5
Rev.0, Aug. 2002, page 15 of 23
HA16158P/FP
6. Overvoltage Latch Protection (for PWM Control)
This is a protection function that halts PWM-OUT and PFC-OUT if the secondary-side PWM output
voltage is abnormally high.
Overvoltage signal input is shared with the PWM-SS pin. When this pin is pulled up to 4.0 V or higher, the
control circuit identifies an overvoltage error and halts PWM-OUT and PFC-OUT.
The power supply is turned off, and the latch is released when the VCC voltage falls to 7.1 V or below.
+
PFC-OUT
Q S
Vcc
−
4.0V
R
PWM-OUT
−
VREF
Vcc
+
7.1V
2.4V
1.5V
14
PWM-SS
PFC-FB
Overvoltage Latch Protection Peripheral Circuit
VREF
4.0V
PWM-SS
3.5V
PWM-OUT
PFC-OUT
Figure 6
Rev.0, Aug. 2002, page 16 of 23
HA16158P/FP
7. Operating Frequency
The operating frequency is adjusted by timing resinstance RT.
Adjustment examples are shown in the graph below. The operating frequency fpwm in the PWM section is
determined by the RT. The operating frequency fpfc in the PFC section is half the value of fpwm.
The operating frequency in the PWM section can be estimated using the approximate equation shown
below.
RT = 200 kΩ:
fpwm ≈
fpfc =
2.60 × 1010
= 130 [kHz]
RT
fpwm
= 65 [kHz]
2
This is only an approximate equation, and the higher the frequency, the greater will be the degree of error
of the approximate equation due to the effects of the delay time in the internal circuit, etc.
When the operating frequency is adjusted, it is essential to confirm operation using the actual system.
fpwm, fpfc (kHz)
1000
100
fpwm
fpfc
10
10
100
1000
RT (kΩ)
Figure 7
Rev.0, Aug. 2002, page 17 of 23
HA16158P/FP
Characteristic Curves
Power Supply Current vs. Power Supply Voltage Characteristics
10.0
Ta = 25°C
Icc (mA)
8.0
6.0
4.0
2.0
0.0
8.0
10.0
12.0
14.0
18.0
16.0
Vcc (V)
Standby Current vs. Power Supply Voltage Characteristics
1.0
Ta = 25°C
Icc (mA)
0.8
0.6
0.4
0.2
0.0
0.0
2.0
4.0
6.0
8.0
10.0
Vcc (V)
Rev.0, Aug. 2002, page 18 of 23
12.0
14.0
16.0
18.0
HA16158P/FP
VREF Output Voltage vs. Ambient Temperature Characteristics
5.20
5.15
Iref = 1mA
VREF (V)
5.10
5.05
5.00
4.95
4.90
4.85
4.80
–50
–25
0
25
50
75
100
125
Ta (°C)
Operating Frequency vs. Ambient Temperature Characteristics
160
RT = 200kΩ
Frequency (kHz)
140
fpwm
120
100
80
fpfc
60
40
–50
–25
0
25
50
75
100
125
Ta (°C)
Rev.0, Aug. 2002, page 19 of 23
HA16158P/FP
UVL Start-up Voltage vs. Ambient Temperature Characteristics
20.0
19.0
VH (V)
18.0
17.0
16.0
15.0
14.0
13.0
12.0
–50
–25
0
25
50
75
100
125
Ta (°C)
UVL Shutdown Voltage vs. Ambient Temperature Characteristics
14.0
13.0
12.0
VL (V)
11.0
10.0
9.0
8.0
7.0
6.0
–50
–25
0
25
50
Ta (°C)
Rev.0, Aug. 2002, page 20 of 23
75
100
125
HA16158P/FP
ApplicationCircuit Example
B+ OUT
Rec+
T1
(385V dc)
680k
680k
To
PFC-FB
Q1
VRB1
Rec−
+
470µ
(450V)
From PFC-OUT
from
auxiliary
+
4.7µ
24V
GND
VCC
OSCILLATOR
130kHz
3.2V
7.7µs
27.5V
1.6V
PWM-RES
3.85µs
RT
200k
15.4µs
0.65V
CAO
36k
3.3n
220p
H
L
VREF
16V
5V VREF
Generator
UVLO
10V
100n
PFC-DT
770ns
VREF
5V Internal Bias
CT
3.4V
UVL
RAMP
65kHz
IAC
K
−
+
Gate Driver
±1.0A(PEAK)
−0.5V −0.25V
0.1
(2W)
To
main trans
R
3.3k
Q
+
−
GAIN SELECTOR
S
PFC-CLIMIT
Supervisor
VREF GOOD Gate Driver
±1.0A(PEAK)
K = 0.20
PFC
-EO
1M
PWM
-OUT
K = 0.05
Q
S
2.5V
4.7n
VREF
+
−
PFC
-FB
3.80V
3.40V
−
+
From
VRB1(B+monitor1)
PFC-OVP
2.80V
2.60V
−
+
PFC
-ON
1.5V
1.2V
−
+
PWM
-COMP
−
+
+
−
720k
20k
Q2
1
(1W)
R
47n
2.2µ
To
Q1 gate
S
VREF
PFC
-CS
PFC
-OUT
Q
−
+
IMO
L
R
PFC-CAMP
VEO
750k
H
VREF GOOD
IMO = K {IAC × (VEO − 1V)}
IAC
VREF In
GOOD Out
1V
R
2R
1.4V
Power Saving for PWM
f/64 Divider
PWM stop
2.40V
1.50V
PFC stop
PFC-OFF
Q S
−
+
R
1n
PWM
-CS
−
+
PWM-RES
B+ LOW
5.1k
1.7V
VCC
+
−
4.0V
7.1V
OVP Latch
Vref
VREF
Vref
0.1µ
33n
GND
S
Circuit
Ground
Q
R
PFC-PLIMIT
25µA
+
−
VREF GOOD
SUPERVISOR
SOFT START
−
+
PFC
-SS
25µA
RAMP
3.5V
CT
VREF
2.5k
PWM
-SS
33n
Unit R: Ω
C: F
Rev.0, Aug. 2002, page 21 of 23
HA16158P/FP
Package Dimensions
As of January, 2002
19.20
20.00 Max
Unit: mm
1
7.40 Max
9
6.30
16
8
1.3
0.48 ± 0.10
7.62
2.54 Min 5.06 Max
2.54 ± 0.25
0.51 Min
1.11 Max
+ 0.13
0.25 – 0.05
0˚ – 15˚
Hitachi Code
JEDEC
JEITA
Mass (reference value)
DP-16
Conforms
Conforms
1.07 g
As of January, 2002
Unit: mm
10.06
10.5 Max
9
1
8
1.27
*0.42 ± 0.08
0.40 ± 0.06
0.10 ± 0.10
0.80 Max
*0.22 ± 0.05
0.20 ± 0.04
2.20 Max
5.5
16
0.20
7.80 +– 0.30
1.15
0˚ – 8˚
0.70 ± 0.20
0.15
0.12 M
*Dimension including the plating thickness
Base material dimension
Rev.0, Aug. 2002, page 22 of 23
Hitachi Code
JEDEC
JEITA
Mass (reference value)
FP-16DA
—
Conforms
0.24 g
HA16158P/FP
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intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
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6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
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7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright © Hitachi, Ltd., 2002. All rights reserved. Printed in Japan.
Colophon 6.0
Rev.0, Aug. 2002, page 23 of 23