HITACHI HA16148PS

HA16148PS
AC/DC Switching Converter Controller IC
With High-Voltage Power MOS FET
ADE-204-034A (Z)
Preliminary
2nd Edition
Oct. 2000
Description
The HA16148PS is an IC with a high-voltage power MOS FET and current-mode type PWM controller
mounted in a DILP-8 (DP-8) standard package, suitable for low-power power supplies in the
10 W class and below.
The HA16148PS includes an energy-saving mode for holding down power consumption when on standby
(no load). When the energy-saving mode is entered, the operating frequency is reduced to 1/4 the normal
frequency, reducing power consumption. A starter circuit is also provided on-chip, eliminating the need for
the external start-up resistance needed with previous controller ICs. The starter circuit in this IC is turned
off automatically after the IC starts up, enabling the start-up resistance power consumption to be decreased.
The HA16148PS includes a soft start circuit, OVP circuit, and remote on/off circuit, making it possible to
configure a simple protection circuit with fewer external parts than previously. Also provided are a current
sense resistance and a leading edge blanking circuit that masks spike noise on current sense input, making
noise reduction in a power supply set comparatively easy.
The HA16148PS is equipped with an error amp circuit inverting input (FB) pin and output (COMP) pin,
enabling special-purpose design for both flyback system secondary-side output voltage detection and
primary-side back-up transformer output voltage detection types.
Features
• Built-in high-voltage power MOS FET
• Energy-saving mode (power saving through reduction of operating frequency to 1/4 normal frequency
when on standby)
• Built-in starter circuit, reducing power loss of start-up resistance when on standby (external start-up
resistance not necessary)
• Built-in soft start circuit, eliminating need for external connection
• Remote on/off function, enabling power saving by halting PWM output without turning off power
supply
• Built-in current sense resistance and leading edge blanking circuit, for sense-resistance-less and noisecancellation-filter-less implementation
• Built-in over voltage protection circuit
• Built-in over temperature protection circuit
HA16148PS
Pin Arrangement
DRAIN 1
VDD 3
8 SOURCE
DILP-7
(DP-7)
FB 4
7 SGND
6 CT
5 COMP
(Top view)
Pin Functions
Pin No.
Pin Name
Pin Function
1
DRAIN
On-chip power MOS FET drain pin / starter circuit input pin
2

This pin has been omitted for increased spacing between the drain
voltage on pin 1 and the V DD voltage on pin 3.
3
VDD
Power supply voltage input pin
4
FB
Error amplifier inverting input pin / OVP latch circuit input pin
5
COMP
Error amplifier output pin
6
CT
Timing capacitance connection pin / on/off circuit input pin
7
SGND
Primary-side common connection pin
8
SOURCE
On-chip power MOS FET source pin
2
HA16148PS
Block Diagram
VDD
+
−
ON/OFF
Comp.
VDD
CT
Starter
Vref
Generator
UVL
UVL
Oscillator
1/4 Divider
Driver
FF
CK
+
−
−
+
D Q
+
−
Frequency Down
Comp.
Vref
FB
DRAIN
CS
Comp.
1/3
Attenuator
E-AMP
Rcs
VDD
Vref
R Q
+
−
TSD
Delay
Leading Edge
Blanking
+
−
S
OVP Latch
SOURCE
UVL
Soft Start
COMP
3
HA16148PS
Absolute Maximum Ratings (Ta = 25°C)
Item
Power MOS FET block
Controller block
Overall
4
Symbol
Rating
Unit
Drain-source voltage
VDS
−0.3 to 700
V
Maximum drain current
I DS
0.5
A
Power supply voltage
VDD
0 to 15
V
CT pin voltage
VCT
0 to V DD
V
FB pin voltage
VFB
0 to V DD
V
COMP pin voltage
VCOMP
0 to 5
V
Operating temperature
Topr
−20 to +85
°C
Junction temperature
Tjmax
+150
°C
Storage temperature
Tstg
−55 to +150
°C
HA16148PS
Electrical Characteristics (Tj = 25°C, VDD = 12 V, fosc1 = 100 kHz)
Item
Symbol
Min
Typ
Max
Unit
Power
Drain-source voltage
BV DSS
700


V
MOS FET
Drain-source on resistance
RDS(on)

12
20
Ω
Starter
Start-up start drain voltage
VDRN
55
75
95
V
circuit
Start-up charge current
ICHG
125
250
500
µA
UVL circuit
Operation start power supply
voltage
VTH
10
11
12
V
Operation stop power supply
voltage
VTL
7
8
9
V
Test Conditions
ID = 0.4 A
Operating power supply current
IDD

2.5
4.0
mA
Oscillation
Normal mode operating frequency
fosc1
88
100
112
kHz
CT = 220 pF
circuit
F-down mode operating frequency
fosc2
23
26.5
30
kHz
CT = 220 pF, VCOMP = 0 V
Maximum on duty
Dumax
70
75

%
Error
Open-loop voltage gain
AV
50
65

dB
Rcomp = 220 kΩ
amplifier
Unity gain bandwidth
BW

550

kHz
Rcomp = 220 kΩ
Output high voltage 1
VCOMPH1
4.5
5.0

V
Iosource = 0 µA
Output high voltage 2
VCOMPH2
4.3
4.8

V
Iosource = 100 µA
Output low voltage
VCOMPL

0.3
0.7
V
Iosink = 0 µA
Non-inverting input voltage
V(+)EA
3.4
3.8
4.2
V
Power
Output rise time
tr

100

ns
CL = 1000 pF
MOS FET
Output fall time
tf

80

ns
CL = 1000 pF
gate drive
Output high voltage
VOH

10

V
Iosource = 25 mA
circuit
Output low voltage
VOL

0.5

V
Iosink = 25 mA
Current
Current sense voltage gain
AVCS

3.0

V/V
sense
Current sense response time
tpdcs

200

ns
circuit
Leading edge blanking time
tBL

300

ns
OVP latch
OVP latch set voltage
Vovp
4.2
5.0
5.8
V
Vovp: FB pin voltage
circuit
OVP latch reset voltage
Vovpr

4.0

V
Vovpr: VDD pin voltage
OVP latch current dissipation
Iovp

1.1
1.7
mA
VFB = 6.0 V
Remote
on/off circuit
Off mode start voltage
Voff
3.6
3.8
4.0
V
Voff: CT pin voltage
Soft start
circuit
Soft start time
tst
(1.0)
2.0
(3.0)
ms
Time from start-up to
max. duty
f-down
comparator
F-down mode start voltage
Vfdcp
0.7
0.85
1.0
V
Over
temperature
protection
circuit
Over temperature protection start
temperature
TSD

150

°C
Vcomp = 5.0 V
TSD: Power MOS FET
junction temperature
5
HA16148PS
Functional Description
Note: Unless specified otherwise, characteristic values in the text and figures are typical values or design
values.
Starter Circuit
When power is turned on, the starter circuit operates during standby mode, and a constant current is
supplied from the drain pins to the VDD pin. This constant current supplies the external capacitance
charge current for charging up the VDD pin and the standby current consumed by the IC itself while on
standby.
Therefore, the start-up bleeder resistance required by previous products with no on-chip starter circuit is no
longer necessary. The starter circuit detects both the drain voltage and the VDD pin voltage, and controls
VDD so that the IC does not start up if the drain voltage is less than 75 V.
Vb+
0
75V
DRAIN
0
Istart
0
11V
8V
VDD
0
CT
COMP
0
0
DC
OUTPUT 0
Figure 1 Start-Up Timing
UVL Circuit
The UVL circuit is a function that monitors the VDD voltage, and stops IC operation if VDD is low. The
VDD detection voltage has a hysteresis characteristic; the operating start VDD voltage is 11 V, and the
operation stop voltage, 8 V.
In standby mode at the operation stop voltage or below, the UVL circuit keeps the power MOS FET turned
off, and performs control of soft start circuit resetting, internal reference voltage circuit stoppage, and so
forth.
6
HA16148PS
Error Amplifier
The error amplifier comprises a constant-current source type Pch top differential amplifier. As the
inverting input (FB) pin and output (COMP) pin are provided as external pins, use for both a simple
flyback power supply back-up voltage feedback type and a high-precision secondary voltage detection type
is possible.
Current Sense Circuit
This is a 200 ns high-speed comparator circuit suitable for current mode control. The current sense
controller reference voltage depends on the COMP pin voltage, being always 1/3 of the COMP pin voltage.
Driver
Osc.
Power
MOS FET
FF
+
−
Current sense
comparator
−
+
Error amplifier
2R
300 ns
Delay circuit
Leading edge
blanking
Current sense
resistance
R
1/3 attenuator
Figure 2 Current Sense Peripheral Circuitry
Leading Edge Blanking Circuit
The on-chip leading edge blanking circuit masks the current sense comparator input signal for a period of
300 ns after the power MOS FET gate voltage goes high. This reduces the erroneous operation due to
spike-shaped noise caused by discharge of various capacitance components when the power MOS FET is
turned on.
7
HA16148PS
Oscillation Circuit
The oscillator generates a triangular voltage waveform through the discharge of the timing capacitance CT.
With a 220 pF CT connected, the oscillator operates at 100 kHz.
The triangular voltage waveform has a discharge time ratio of 3:1, with the charge side set to PWM onpulses, and the discharge side to dead-band pulses. The maximum PWM on duty can be controlled up to
70%.
CT
DB pulse
(IC internal waveform)
1/3∗COMP
(IC internal waveform)
CS
(IC internal waveform)
Power MOS FET
Gate voltage
(IC internal waveform)
Power MOS FET
Drain voltage
Figure 3 Oscillation Circuit Peripheral Waveform Timing
OVP Latch Circuit
When the FB pin voltage reaches 5 V or above, the OVP latch circuit operates and forcibly stops PWM
output and the reference voltage generation circuit. While OVP latching is stopped, the starter circuit is
also stopped. Latch resetting can be performed by driving power supply voltage VDD to 4 V or below.
DRAIN
0
CT
0
5V
FB
0
Vref
(IC internal
waveform)
5V
0
Figure 4 OVP Latch Operation Timing
8
HA16148PS
Remote On/Off Circuit
When the CT pin voltage is pulled up to 3.8 V or above, the remote on/off circuit operates and PWM
output can be stopped without turning off the power supply. When stoppage is executed by means of the
on/off circuit, PWM output and the starter circuit are stopped, and the soft start circuit is reset, but the
reference voltage generation circuit does not stop.
DRAIN
0
3.8V
CT
Vref
(IC internal 5V
waveform)
Figure 5 Remote On/Off Operation Timing
Soft Start Circuit
This circuit implements a soft start function with a 2 ms time constant without the use of external parts.
During a soft start, the PWM output pulse width gradually increases. The soft start time is defined as the
time from the point at which the UVL circuit start voltage is exceeded to the point at which PWM output
reaches its maximum duty.
9
HA16148PS
f-down Comparator
An "energy-saving mode" is provided to hold down power consumption during standby, with the operating
frequency in the unloaded state reduced to 1/4 of its steady operation value.
The f-down comparator detects the COMP pin voltage, and if it falls to 0.85 V or below, switches to
energy-saving mode. As COMP pin voltage detection is performed pulse-by-pulse, a skip mode comes into
effect in the vicinity of the threshold voltage according to the timing.
VCT
VCOMP
VDRAIN
Normal
mode
Energysaving
mode
Normal Energymode saving
mode
Figure 6 Energy-Saving Mode Switching Waveform Timing
Over Temperature Protection Circuit
If the power MOS FET junction temperature reaches +150°C, the over temperature protection circuit
operates, shutting down the IC. The over temperature protection circuit is coupled to the OVP latch circuit,
so that the latch is reset if the power supply voltage is driven to 4 V or below while the junction
temperature is lower than the overheating protection start temperature.
10
HA16148PS
Main Characteristics
Operating Frequency vs. Timing Capacitance
1000
300
fosc (kHz)
normal mode operating frequency
100
30
f-down mode operating frequency
10
100
200
300 400 500
CT (pF)
1000
Start-up Current (Charge Current + Standby Current)
vs. Drain Voltage
500
450
Idrain (µA)
400
350
300
250
200
150
100
50
0
0
10
20
30
40
50
Vdrain (V)
60
70
80
70
80
Power Supply Voltage vs. Drain Voltage
12
VDD (V)
10
8
6
4
2
0
0
10
20
30
40
50
Vdrain (V)
60
11
HA16148PS
Error Amplifier Output High Voltage vs. Output Source Current
6.0
5.0
VOH (V)
4.0
3.0
2.0
1.0
0
0
100
200
300 400
500
Iosource (µA)
600
700
800
Error Amplifier Output Low Voltage vs. Output Sink Current
2.5
VOL (V)
2.0
1.5
1.0
0.5
0
0
12
200
400
600
Iosink (µA)
800
1000
HA16148PS
Operating Frequency (Normal Mode) vs. Ambient Temperature
110
108
106
fosc (kHz)
104
102
100
98
96
94
92
90
−25
0
25
50
75
100
Ta (°C)
Operating Start/Stop Power Supply Voltage vs. Ambient Temperature
13
VTH, VTL (V)
12
VTH
11
10
9
VTL
8
7
6
−25
0
25
50
75
100
Ta (°C)
13
HA16148PS
100
2.0
θj-a (°C/W)
Pt(max) at Ta = +85°C
80
1.5
θj-a
60
1.0
40
0.5
20
0
10
20
30
Length of copper, L (mm)
2.0 oz copper heat sink
40
Maximum power dissipation (W)
Thermal Resistance θj-a and Maximum Power Dissipation vs.
Printed Circuit Board Copper Heat Sink Perimeter Length
120
2.5
0
50
Glass-epoxy
printed circuit board
Pin holes
L
L
Wiring pattern
Figure 7 Sample Printed Circuit Board Copper Heat Sink Pattern
14
HA16148PS
Application Circuit Examples 1
The application circuit example shown here detects the secondary-side output voltage of a flyback power
supply. Secondary-side output voltage detection and feedback are performed by a shunt regulator and
photocoupler.
When the OVP latch function is used for secondary-side output voltage overvoltage protection, the FB pin
should be pulled up to VDD by the shunt regulator and photocoupler.
Transformer
P: 90T / 1.43mH
S: 6T / 8.1µH
B: 14T / 30.8µH
AC
INPUT
0.1µ
Line Filter
P
2200p
100µ
400V +
VR
260V
S
51k
OVP detection circuit (7.4V)
SBD
HRW26F
+
15µ
+
+
R4
1.8k
C4
0.022µ
560µ 180µ
25V 25V
B
: Primary GND
R8
330
R3
330
: Secondary GND
R6
4.7k
R5
3.3k
K
K
A REF
HA17431VP
R9
1.8k
C5
3.3µ
R11
2.4k
DC
OUTPUT
5V/2A
R10
3.3k
A REF
R7
2.4k
HA16148PS
HA17431VP
R12
2.4k
−
1 DRAIN SOURCE 8
SGND 7
OVP feedback circuit
3 VDD
4 FB
R1 VR
120k 15V
+ C1
1µ
20V
C6
0.1µ
* The secondary-side output voltage is stabilized at a
value determined by the bleeder resistance of the
secondary-side shunt regulator.
VOUT(reg) = Vref(shunt) × R11 + R12
R12
2.4kΩ
+
2.4kΩ
= 2.5V ×
2.4kΩ
= 5.0V
CT 6
COMP 5
R2 C2 C3
150k 0.47µ 220p
Photo
coupler
Units R: Ω
C: F
When the OVP latch function is used, the secondary-side
voltage is detected by the shunt regulator, and feedback
to the FB pin is performed by the photocoupler. The OVP
detection level is determined by the following formula.
VOUT(ovp) = Vref(shunt) × R6 + R7
R7
4.7kΩ
+
2.4kΩ
= 2.5V ×
2.4kΩ
= 7.4V
15
HA16148PS
Application Circuit Examples 2
The application circuit example shown here detects the primary-side back-up output voltage of a flyback
power supply. As the back-up output voltage, VDD is resistance-divided and feedback is performed to the
FB pin. The back-up output voltage and secondary-side output voltage are proportional to the ratio of
transformer windings. Using this characteristic enables the system to be configured with simple circuitry
as shown in the figure below.
The VDD-to-FB feedback resistance can also be used as the back-up output voltage OVP detection
resistance.
Transformer
P: 90T / 1.43mH
S: 6T / 8.1µH
B: 14T / 30.8µH
AC
INPUT
P
2200p
0.1µ
S
51k
100µ
400V +
+
VR
260V
Line Filter
560µ
25V
+
180µ
25V
B
: Primary GND
+
15µ
SBD
HRW26F
DC
OUTPUT
5V/1A
−
: Secondary GND
HA16148PS
1 DRAIN SOURCE 8
R1
240k
SGND 7
3 VDD
4 FB
C5
1µ/20V
+
R2 VR
120k 15V
+ C1
1µ
20V
* If feedback resistance R1 = 240 kΩ and R2 = 120 kΩ,
feedback is performed so that the FB pin voltage is
non-inverting input voltage V(+)EA, and the VDD voltage
is stabilized.
VDD(reg) = V(+)EA × R1 + R2
R2
= 3.8V × 240kΩ + 120kΩ
120kΩ
= 11.4V
16
CT 6
COMP 5
C2 0.1µ
R3 1M
C3
C4
R4
150k 0.47µ 220p
Units R: Ω
C: F
When the FB pin voltage reaches OVP latch set
voltage Vovp, the OVP latch circuit operates, shutting
down the IC. The VDD voltage in this case is given
by the following formula.
VDD(ovp) = Vovp × R1 + R2
R2
= 5.0V × 240kΩ + 120kΩ
120kΩ
= 15V
HA16148PS
Application Circuit Examples 3
As this IC is provided with a remote on/off function, it is possible to implement power management
without turning off the power supply. Using a remote on/off control circuit as shown in the figure below,
the CT pin voltage is pulled up to the off mode start voltage or above, and the IC is stopped. In the off
mode, control of PWM output stoppage, soft start resistance resetting, and starter circuit stoppage is
performed without stopping the internal reference voltage generation circuit. With this function, also, latch
operation is not performed, and an auto-restart is executed as soon as the CT pin voltage falls below the off
mode start voltage. It is recommended that the remote on/off control signal be controlled by a
microcomputer or other logic signal.
Remote ON/OFF control circuit
R2
43k
2SA1029
HA16148PS
R1
10k
1 DRAIN SOURCE 8
R3
130k
SGND 7
3 VDD
4 FB
CT 6
COMP 5
R4
10k
CT
220p
2SC458
ON/OFF
H: OFF
L: ON
Units R: Ω
C: F
17
HA16148PS
Laser Marking Specifications
Product code
Lot indication and
Management code
HA16148
PS
123
Lot Indication and Management Code Contents
1 : The last digit of the production year.
2 : Production month code
3 : Management code
Production month
1
2
3
4
5
6
7
8
9
10
11
12
Month code
A
B
C
D
E
F
G
H
J
K
L
M
18
HA16148PS
Package Dimensions
Unit: mm
6.3
7.4 Max
9.6
10.6 Max
7
4
1
0.89
3
1.3
7.62
2.54 Min 5.06 Max
2.54 ± 0.25
0.1 Min
1.27 Max
0.48 ± 0.10
+ 0.10
0.25 − 0.05
0° − 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-7
Conforms
Conforms
0.54 g
19
HA16148PS
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
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7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
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Colophon 1.0
20