FAIRCHILD 74LVQ14SC

74LVQ14
Low Voltage Hex Inverter with Schmitt Trigger Input
General Description
Features
The LVQ14 contains six inverter gates each with a Schmitt
trigger input. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters.
The LVQ14 has hysteresis between the positive-going and
negative-going input thresholds (typically 1.0V) which is determined internally by transistor ratios and is essentially insensitive to temperature and supply voltage variations.
n Ideal for low power/low noise 3.3V applications
n Guaranteed simultaneous switching noise level and
dynamic threshold performance
n Guaranteed pin-to-pin skew AC performance
n Guaranteed incident wave switching into 75Ω
Ordering Code:
Order Number
Package Number
Package Description
74LVQ14SC
M14A
14-Lead (0.150" Wide) Molded Small Outline Integrated Circuit, SOIC JEDEC
74LVQ14SJ
M14D
14-Lead Small Outline Package, SOIC EIAJ
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Symbol
Connection Diagram
IEEE/IEC
Pin Assignment
for SOIC JEDEC and EIAJ
DS011345-2
DS011345-1
Pin Descriptions
Pin Names
Description
Truth Table
Input
Output
I
O
In
Inputs
L
H
On
Outputs
H
L
H = High Voltage Level
L = Low Voltage Level
© 1998 Fairchild Semiconductor Corporation
DS011345
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74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input
May 1998
Absolute Maximum Ratings (Note 1)
Supply Voltage (VCC)
DC Input Diode Current (IIK)
VI = −0.5V
VI = VCC + 0.5V
DC Input Voltage (VI)
DC Output Diode Current (IOK)
VO = −0.5V
VO = VCC + 0.5V
DC Output Voltage (VO)
DC Output Source
or Sink Current (IO)
DC VCC or Ground Current
(ICC or IGND)
Storage Temperature (TSTG)
DC Latch-Up Source or
Sink Current
Recommended Operating
Conditions (Note 2)
−0.5V to +7.0V
Supply Voltage (VCC)
LVQ
Input Voltage (VI)
Output Voltage (VO)
Operating Temperature (TA)
Minimum Input Edge Rate (∆V/∆t)
VIN from 0.8V to 2.0V
VCC @ 3.0V
−20 mA
+20 mA
−0.5V to VCC + 0.5V
−20 mA
+20 mA
−0.5V to to VCC + 0.5V
2.0V to 3.6V
0V to VCC
0V to VCC
−40˚C to +85˚C
125 mV/ns
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum ratings. The
“Recommended Operating Conditions” table will define the conditions for actual device operation.
± 50 mA
± 200 mA
−65˚C to +150˚C
Note 2: Unused inputs must be held HIGH or LOW. They may not float.
± 100 mA
DC Electrical Characteristics
Symbol
Parameter
VCC
(V)
TA = +25˚C
TA = −40˚C to +85˚C
Typ
VOH
Minimum High Level
Output Voltage
3.0
2.99
3.0
Units
Conditions
Guaranteed Limits
2.9
2.9
V
2.58
2.48
V
IOUT = −50 µA
VIN = VIL or VIH (Note 3)
IOH = −12 mA
VOL
Maximum Low Level
Output Voltage
3.0
0.002
3.0
0.1
0.1
V
0.36
0.44
V
IOUT = 50 µA
VIN = VIL or VIH (Note 3)
IOL = 12 mA
IIN
Maximum Input
Leakage Current
3.6
± 0.1
± 1.0
µA
VI = VCC, GND
Vt+
Maximum Positive
Threshold
3.0
2.2
2.2
V
TA = Worst Case
Vt−
Minimum Negative
Threshold
3.0
0.5
0.5
V
TA = Worst Case
Vh(max)
Maximum Hysteresis
3.0
1.2
1.2
V
TA = Worst Case
Vh(min)
Minimum Hysteresis
3.0
0.3
0.3
V
TA = Worst Case
IOLD
Minimum Dynamic (Note 4)
Output Current
3.6
36
mA
VOLD = 0.8V Max (Note 5)
3.6
−25
mA
VOHD = 2.0V Min (Note 5)
20.0
µA
VIN = VCC or GND
IOHD
ICC
Maximum Quiescent
Supply Current
3.6
2.0
VOLP
Quiet Output
Maximum Dynamic VOL
3.3
0.9
1.1
V
(Notes 6, 7)
VOLV
Quiet Output
Minimum Dynamic VOL
3.3
−0.8
−1.1
V
(Notes 6, 7)
VIHD
Maximum High Level
Dynamic Input Voltage
3.3
1.9
2.0
V
(Notes 6, 8)
VILD
Maximum Low Level
Dynamic Input Voltage
3.3
1.3
2.0
V
(Notes 6, 8)
Note 3: All outputs loaded; thresholds on input associated with output under test.
Note 4: Maximum test duration 2.0 ms, one output loaded at a time.
Note 5: Incident wave switching on transmission lines with impedances as low as 75Ω for commercial temperature range is guaranteed for 74LVQ.
Note 6: Worst case package.
Note 7: Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V; one output at GND.
Note 8: Max number of Data Inputs (n) switching. (n − 1) inputs switching 0V to 3.3V. Input-under-test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD),
f = 1 MHz.
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2
AC Electrical Characteristics
tPLH
tPHL
TA = +25˚C
CL = 50 pF
TA = −40˚C to +85˚C
CL = 50 pF
Parameter
VCC
(V)
Min
Typ
Max
Min
Max
Propagation Delay
2.7
1.5
11.4
19.0
1.5
21.0
3.3 ± 0.3
1.5
9.5
13.5
1.5
15.0
Symbol
Propagation Delay
tOSHL,
Output to Output
tOSLH
Skew (Note 9)
2.7
1.5
9.0
16.2
1.5
19.0
3.3 ± 0.3
1.5
7.5
11.5
1.5
13.0
2.7
1.0
1.5
1.5
3.3 ± 0.3
1.0
1.5
1.5
Units
ns
ns
ns
Data to Output
Note 9: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design.
Capacitance
Symbol
CIN
CPD (Note 10)
Typ
Units
Input Capacitance
Parameter
4.5
pF
VCC = Open
Conditions
Power Dissipation
20
pF
VCC = 3.3V
Capacitance
Note 10: CPD is measured at 10 MHz.
3
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4
Physical Dimensions
inches (millimeters) unless otherwise noted
14-Lead (0.150" Wide) Molded Small Outline Integrated Circuit, SOIC JEDEC
Package Number M14A
5
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74LVQ14 Low Voltage Hex Inverter with Schmitt Trigger Input
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead Small Outline Package, SOIC EIAJ
Package Number M14D
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failure to perform when properly used in accordance
with instructions for use provided in the labeling, can
be reasonably expected to result in a significant injury
to the user.
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