TC4421/TC4422 9A High-Speed MOSFET Drivers Features General Description • High Peak Output Current: 9A • Wide Input Supply Voltage Operating Range: - 4.5V to 18V • High Continuous Output Current: 2A Max • Fast Rise and Fall Times: - 30 ns with 4,700 pF Load - 180 ns with 47,000 pF Load • Short Propagation Delays: 30 ns (typ) • Low Supply Current: - With Logic ‘1’ Input – 200 µA (typ) - With Logic ‘0’ Input – 55 µA (typ) • Low Output Impedance: 1.4 (typ) • Latch-Up Protected: Will Withstand 1.5A Output Reverse Current • Input Will Withstand Negative Inputs Up To 5V • Pin-Compatible with the TC4420/TC4429 6A MOSFET Driver • Space-saving 8-Pin 6x5 DFN Package The TC4421/TC4422 are high-current buffer/drivers capable of driving large MOSFETs and IGBTs. Applications • • • • • Line Drivers for Extra Heavily-Loaded Lines Pulse Generators Driving the Largest MOSFETs and IGBTs Local Power ON/OFF Switch Motor and Solenoid Driver These devices are essentially immune to any form of upset, except direct overvoltage or over-dissipation. They cannot be latched under any conditions within their power and voltage ratings. These parts are not subject to damage or improper operation when up to 5V of ground bounce is present on their ground terminals. They can accept, without damage or logic upset, more than 1A inductive current of either polarity being forced back into their outputs. In addition, all terminals are fully protected against up to 4 kV of electrostatic discharge. The TC4421/TC4422 inputs may be driven directly from either TTL or CMOS (3V to 18V). In addition, 300 mV of hysteresis is built into the input, providing noise immunity and allowing the device to be driven from slowly rising or falling waveforms. With both surface-mount and pin-through-hole packages and four operating temperature range offerings, the TC4421/22 family of 9A MOSFET drivers fit into most any application where high gate/line capacitance drive is required. Package Types(1) VDD INPUT NC GND 1 8 VDD 2 TC4421 7 OUTPUT 3 TC4422 6 OUTPUT 4 5 GND VDD OUTPUT OUTPUT GND VDD 1 INPUT 2 NC 3 GND 4 TC4421 TC4422 TC4421 TC4422 VDD 7 OUTPUT OUTPUT 6 OUTPUT OUTPUT 5 GND 2: Exposed pad of the DFN package is electrically isolated. 2002-2012 Microchip Technology Inc. Tab is Common to VDD VDD 8 Note 1: Duplicate pins must both be connected for proper operation. 5-Pin TO-220 GND TC4421 TC4422 INPUT GND VDD GND OUTPUT 8-Pin DFN(2) 8-Pin PDIP/ TC4421 TC4422 SOIC DS21420E-page 1 TC4421/TC4422 Functional Block Diagram VDD TC4421 Inverting 200 µA 300 mV Output TC4422 Input Non-Inverting 4.7V GND Effective Input C = 25 pF DS21420E-page 2 2002-2012 Microchip Technology Inc. TC4421/TC4422 1.0 ELECTRICAL CHARACTERISTICS † Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings† Supply Voltage ..................................................... +20V Input Voltage .................... (VDD + 0.3V) to (GND – 5V) Input Current (VIN > VDD)................................... 50 mA Package Power Dissipation (TA 70°C) 5-Pin TO-220 .................................................... 1.6W DFN .............................................................. Note 2 PDIP ............................................................ 730 mW SOIC............................................................ 750 mW Package Power Dissipation (TA 25°C) 5-Pin TO-220 (With Heatsink) ........................ 12.5W Thermal Impedances (To Case) 5-Pin TO-220 RJ-C ...................................... 10°C/W DC CHARACTERISTICS Electrical Specifications: Unless otherwise noted, TA = +25°C with 4.5V VDD 18V. Parameters Sym Min Typ Max Units Conditions Input Logic ‘1’, High Input Voltage VIH 2.4 1.8 — V Logic ‘0’, Low Input Voltage VIL — 1.3 0.8 V Input Current IIN –10 — +10 µA 0VVINVDD High Output Voltage VOH VDD – 0.025 — — V DC TEST Low Output Voltage VOL — — 0.025 V DC TEST Output Resistance, High ROH — 1.4 — IOUT = 10 mA, VDD = 18V Output Resistance, Low ROL — 0.9 1.7 IOUT = 10 mA, VDD = 18V Peak Output Current IPK — 9.0 — A VDD = 18V Continuous Output Current IDC 2 — — A 10V VDD 18V, TA = +25°C (TC4421/TC4422 CAT only) (Note 3) Latch-Up Protection Withstand Reverse Current IREV — >1.5 — A Duty cycle2%, t 300 µsec tR — 60 75 ns Figure 4-1, CL = 10,000 pF Fall Time tF — 60 75 ns Figure 4-1, CL = 10,000 pF Delay Time tD1 — 30 60 ns Figure 4-1 Delay Time tD2 — 33 60 ns Figure 4-1 IS — — 0.2 55 1.5 150 mA µA VIN = 3V VIN = 0V VDD 4.5 — 18 V Output Switching Time (Note 1) Rise Time Power Supply Power Supply Current Operating Input Voltage Note 1: 2: 3: Switching times ensured by design. Package power dissipation is dependent on the copper pad area on the PCB. Tested during characterization, not production tested. 2002-2012 Microchip Technology Inc. DS21420E-page 3 TC4421/TC4422 DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE) Electrical Specifications: Unless otherwise noted, over operating temperature range with 4.5V VDD 18V. Parameters Sym Min Typ Max Units Logic ‘1’, High Input Voltage VIH 2.4 Logic ‘0’, Low Input Voltage VIL — Input Current IIN Conditions — — V — 0.8 V –10 — +10 µA 0VVINVDD VOH VDD – 0.025 — — V DC TEST Low Output Voltage VOL — — 0.025 V DC TEST Output Resistance, High ROH — 2.4 3.6 IOUT = 10 mA, VDD = 18V ROL — 1.8 2.7 IOUT = 10 mA, VDD = 18V Rise Time tR — 60 120 ns Figure 4-1, CL = 10,000 pF Fall Time tF — 60 120 ns Figure 4-1, CL = 10,000 pF Delay Time tD1 — 50 80 ns Figure 4-1 Delay Time tD2 — 65 80 ns Figure 4-1 IS — — — — 3 0.2 mA VIN = 3V VIN = 0V VDD 4.5 — 18 V Input Output High Output Voltage Output Resistance, Low Switching Time (Note 1) Power Supply Power Supply Current Operating Input Voltage Note 1: Switching times ensured by design. TEMPERATURE CHARACTERISTICS Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V. Parameters Sym Min Typ Max Units Specified Temperature Range (C) TA 0 — +70 °C Specified Temperature Range (E) TA –40 — +85 °C Specified Temperature Range (V) TA –40 — +125 °C Conditions Temperature Ranges Maximum Junction Temperature TJ — — +150 °C Storage Temperature Range TA –65 — +150 °C Thermal Resistance, 5L-TO-220 JA — 71 — °C/W Thermal Resistance, 8L-6x5 DFN JA — 33.2 — °C/W Thermal Resistance, 8L-PDIP JA — 125 — °C/W Thermal Resistance, 8L-SOIC JA — 120 — °C/W Package Thermal Resistances DS21420E-page 4 Typical 4-layer board with vias to ground plane 2002-2012 Microchip Technology Inc. TC4421/TC4422 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V. 220 180 200 160 180 22,000 pF 140 22,000 pF 140 120 10,000 pF 100 80 4700 pF 60 120 100 80 10,000 pF 60 4700 pF 40 40 1000 pF 20 0 tFALL (nsec) tRISE (nsec) 160 20 1000 pF 4 6 FIGURE 2-1: Voltage. 8 14 10 12 VDD (V) 16 0 18 Rise Time vs. Supply 4 6 8 FIGURE 2-4: Voltage. 10 12 VDD (V) 14 16 Fall Time vs. Supply 300 300 5V 5V 250 250 10V 150 15V 100 tFALL (nsec) tRISE (nsec) 10V 200 200 150 15V 100 50 50 0 100 1000 FIGURE 2-2: Load. 10,000 CLOAD (pF) 0 100 100,000 Rise Time vs. Capacitive 1000 FIGURE 2-5: Load. 10,000 CLOAD (pF) 100,000 Fall Time vs. Capacitive 50 90 CLOAD = 1000 pF CLOAD = 10,000 pF VDD = 15V 80 45 70 Time (nsec) Time (nsec) 18 60 tRISE 50 40 tD2 35 tD1 tFALL 40 30 30 -40 0 40 80 120 25 4 6 TA (°C) FIGURE 2-3: Temperature. Rise and Fall Times vs. 2002-2012 Microchip Technology Inc. 8 10 12 14 16 18 VDD (V) FIGURE 2-6: Supply Voltage. Propagation Delay vs. DS21420E-page 5 TC4421/TC4422 Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V. 220 180 VDD = 18V 200 160 140 140 120 63.2 kHz 1.125 MHz 100 80 ISUPPLY (mA) ISUPPLY (mA) 160 632 kHz 60 40 0 100 1000 10,000 CLOAD (pF) 140 140 120 120 2 MHz 63.2 kHz 80 1.125 MHz 60 4700 pF 470 pF 100 Frequency (kHz) VDD = 12V 160 100 0.1 µF 60 1000 180 VDD = 12V 40 632 kHz 20 200 kHz ISUPPLY (mA) ISUPPLY (mA) 80 FIGURE 2-10: Supply Current vs. Frequency (VDD = 18V). 22,000 pF 10,000 pF 47,000 pF 100 80 60 4700 pF 0.1 µF 40 20 kHz 20 470 pF 0 0 100 1000 10,000 CLOAD (pF) 10 100,000 FIGURE 2-8: Supply Current vs. Capacitive Load (VDD = 12V). 100 Frequency (kHz) 1000 FIGURE 2-11: Supply Current vs. Frequency (VDD = 12V). 100 120 VDD = 6V 200 kHz VDD = 6V 47,000 pF 100 80 22,000 pF 60 50 63.2 kHz 40 2 MHz 10,000 pF 4700 pF 60 40 0.1 µF 20 kHz 10 20 470 pF 1000 10,000 CLOAD (pF) 100,000 FIGURE 2-9: Supply Current vs. Capactive Load (VDD = 6V). DS21420E-page 6 80 632 kHz 20 0 100 ISUPPLY (mA) 70 ISUPPLY (mA) 100 0 10 100,000 180 160 10,000 pF 120 20 FIGURE 2-7: Supply Current vs. Capacitive Load (VDD = 18V). 30 22,000 pF 40 20 kHz 200 kHz 20 90 VDD = 18V 47,000 pF 2 MHz 180 0 10 100 Frequency (kHz) 1000 FIGURE 2-12: Supply Current vs. Frequency (VDD = 6V). 2002-2012 Microchip Technology Inc. TC4421/TC4422 Note: Unless otherwise indicated, TA = +25°C with 4.5V VDD 18V. 50 120 VDD = 10V CLOAD = 10,000 pF 110 100 VDD = 18V CLOAD = 10,000 pF VIN = 5V 45 80 Time (nsec) Time (nsec) 90 70 60 tD2 50 40 35 tD2 tD1 30 40 tD1 30 25 20 10 20 –60 –40 –20 0 1 2 3 4 5 6 7 8 Input Amplitude (V) FIGURE 2-13: Amplitude. 9 10 Propagation Delay vs. Input 0 FIGURE 2-16: Temperature. 10-6 20 40 TA (°C) 60 80 100 120 Propagation Delay vs. 103 IQUIESCENT (µA) A•sec VDD = 18V 10-7 Input = 1 102 Input = 0 10-8 4 6 8 10 12 VDD (V) 14 16 18 NOTE: The values on this graph represent the loss seen by the driver during a complete cycle. For the loss in a single transition, divide the stated value by 2. FIGURE 2-14: Supply Voltage. -60 -40 -20 FIGURE 2-17: vs. Temperature. 40 60 80 100 120 Quiescent Supply Current Crossover Energy vs. 6 6 5.5 5 5 4.5 TJ = 150°C 4.5 4 RDS(ON) (Ω) RDS(ON) (Ω) 20 TJ (°C) 5.5 3.5 3 2.5 2 TJ = 25°C 1.5 4 3.5 TJ = 150°C 3 2.5 2 1.5 1 0.5 0 TJ = 25°C 1 4 6 8 10 12 VDD (V) 14 16 FIGURE 2-15: High-State Output Resistance vs. Supply Voltage. 2002-2012 Microchip Technology Inc. 18 0.5 4 6 8 10 12 VDD (V) 14 16 18 FIGURE 2-18: Low-State Output Resistance vs. Supply Voltage. DS21420E-page 7 TC4421/TC4422 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: PIN FUNCTION TABLE Pin No. 8-Pin PDIP, SOIC Pin No. 8-Pin DFN Pin No. 5-Pin TO-220 Symbol 1 1 — VDD 2 2 1 INPUT 3 3 — NC 4 4 2 GND Ground 5 5 4 GND Ground 6 6 5 OUTPUT CMOS push-pull output 7 7 — OUTPUT CMOS push-pull output 3.1 Description Supply input, 4.5V to 18V Control input, TTL/CMOS compatible input No connection 8 8 3 VDD Supply input, 4.5V to 18V — PAD — NC Exposed metal pad — — TAB VDD Metal tab is at the VDD potential Supply Input (VDD) The VDD input is the bias supply for the MOSFET driver and is rated for 4.5V to 18V with respect to the ground pin. The VDD input should be bypassed to ground with a local ceramic capacitor. The value of the capacitor should be chosen based on the capacitive load that is being driven. A minimum value of 1.0 µF is suggested. 3.3 The MOSFET driver output is a low-impedance, CMOS, push-pull style output capable of driving a capacitive load with 9.0A peak currents. The MOSFET driver output is capable of withstanding 1.5A peak reverse currents of either polarity. 3.4 3.2 Control Input The MOSFET driver input is a high-impedance, TTL/CMOS compatible input. The input also has 300 mV of hysteresis between the high and low thresholds that prevents output glitching even when the rise and fall time of the input signal is very slow. CMOS Push-Pull Output Ground The ground pins are the return path for the bias current and for the high peak currents that discharge the load capacitor. The ground pins should be tied into a ground plane or have very short traces to the bias supply source return. 3.5 Exposed Metal Pad The exposed metal pad of the 6x5 DFN package is not internally connected to any potential. Therefore, this pad can be connected to a ground plane or other copper plane on a printed circuit board to aid in heat removal from the package. DS21420E-page 8 2002-2012 Microchip Technology Inc. TC4421/TC4422 4.0 APPLICATIONS INFORMATION +5V 90% Input VDD = 18V 0V 4.7 µF 1 0.1 µF 2 +18V tD1 tD2 tF tR 90% 90% Output 8 0.1 µF Input 10% 6 10% 10% 0V Inverting Driver TC4421 Output 7 CL = 10,000 pF +5V 90% Input 4 5 0V +18V Input: 100 kHz, square wave, tRISE = tFALL 10 nsec tD1 90% tR Output 0V Note: Pinout shown is for the DFN, PDIP and SOIC packages. FIGURE 4-1: 10% 10% tD2 90% tF 10% Non-Inverting Driver TC4422 Switching Time Test Circuits. 2002-2012 Microchip Technology Inc. DS21420E-page 9 TC4421/TC4422 5.0 PACKAGING INFORMATION 5.1 Package Marking Information 5-Lead TO-220 XXXXXXXXX XXXXXXXXX YYWWNNN 8-Lead DFN TC4421 EMF 0420 256 8-Lead PDIP (300 mil) XXXXXXXX XXXXXNNN YYWW 8-Lead SOIC (208 mil) Legend: XX...X Y YY WW NNN e3 * Note: DS21420E-page 10 TC4421CAT XXXXXXXXX 0420256 Example: XXXXXXX XXXXXXX XXYYWW NNN XXXXXXXX XXXXXXXX YYWWNNN Example: Example: TC4421 CPA256 0420 Example: GTC4421 ESM 0420256 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 2002-2012 Microchip Technology Inc. TC4421/TC4422 5-Lead Plastic Transistor Outline (AT) (TO-220) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging L H1 Q b e3 e1 E e ØP EJECTOR PIN a (5X) C1 A J1 F D Units Dimension Limits e Lead Pitch Overall Lead Centers Space Between Leads Overall Height Overall Width Overall Length Flag Length Flag Thickness Through Hole Center Through Hole Diameter Lead Length Base to Bottom of Lead Lead Thickness Lead Width Mold Draft Angle e1 e3 A E D H1 F Q P L J1 C1 b a INCHES* MIN MAX .060 .072 .263 .273 .030 .040 .190 .160 .385 .415 .560 .590 .234 .258 .045 .055 .103 .113 .146 .156 .540 .560 .090 .115 .022 .014 .025 .040 3° 7° MILLIMETERS MAX MIN 1.52 1.83 6.68 6.93 0.76 1.02 4.83 4.06 9.78 10.54 14.22 14.99 5.94 6.55 1.14 1.40 2.62 2.87 3.71 3.96 14.22 13.72 2.29 2.92 0.36 0.56 0.64 1.02 3° 7° *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC equivalent: TO-220 Drawing No. C04-036 2002-2012 Microchip Technology Inc. DS21420E-page 11 TC4421/TC4422 8-Lead Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN-S) – Saw Singulated Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging DS21420E-page 12 2002-2012 Microchip Technology Inc. TC4421/TC4422 8-Lead Plastic Dual In-line (P) – 300 mil (PDIP) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E1 D 2 n 1 E A2 A L c A1 B1 p eB B Units Dimension Limits n p Number of Pins Pitch Top to Seating Plane Molded Package Thickness Base to Seating Plane Shoulder to Shoulder Width Molded Package Width Overall Length Tip to Seating Plane Lead Thickness Upper Lead Width Lower Lead Width Overall Row Spacing Mold Draft Angle Top Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic § A A2 A1 E E1 D L c B1 B eB MIN .140 .115 .015 .300 .240 .360 .125 .008 .045 .014 .310 5 5 INCHES* NOM MAX 8 .100 .155 .130 .170 .145 .313 .250 .373 .130 .012 .058 .018 .370 10 10 .325 .260 .385 .135 .015 .070 .022 .430 15 15 MILLIMETERS NOM 8 2.54 3.56 3.94 2.92 3.30 0.38 7.62 7.94 6.10 6.35 9.14 9.46 3.18 3.30 0.20 0.29 1.14 1.46 0.36 0.46 7.87 9.40 5 10 5 10 MIN MAX 4.32 3.68 8.26 6.60 9.78 3.43 0.38 1.78 0.56 10.92 15 15 Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-001 Drawing No. C04-018 2002-2012 Microchip Technology Inc. DS21420E-page 13 TC4421/TC4422 8-Lead Plastic Small Outline (SM) – Medium, 208 mil Body (SOIJ) (JEITA/EIAJ Standard, Formerly called SOIC) Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging E E1 p D 2 1 n B α c A2 A φ L β Units Dimension Limits n p MIN INCHES* NOM 8 .050 .075 .074 .005 .313 .208 .205 .025 4 .009 .017 12 12 A1 MAX MILLIMETERS NOM 8 1.27 1.78 1.97 1.75 1.88 0.05 0.13 7.62 7.95 5.11 5.28 5.13 5.21 0.51 0.64 0 4 0.20 0.23 0.36 0.43 0 12 0 12 MIN Number of Pins Pitch Overall Height A .080 .070 Molded Package Thickness A2 .078 .069 Standoff A1 .002 .010 Overall Width E .300 .325 Molded Package Width E1 .201 .212 Overall Length D .202 .210 Foot Length L .020 .030 φ Foot Angle 0 8 c Lead Thickness .008 .010 Lead Width B .014 .020 α Mold Draft Angle Top 0 15 β Mold Draft Angle Bottom 0 15 *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. MAX 2.03 1.98 0.25 8.26 5.38 5.33 0.76 8 0.25 0.51 15 15 Drawing No. C04-056 DS21420E-page 14 2002-2012 Microchip Technology Inc. TC4421/TC4422 6.0 REVISION HISTORY Revision E (December 2012) Added a note to each package outline drawing. 2002-2012 Microchip Technology Inc. DS21420E-page 15 TC4421/TC4422 NOTES: DS21420E-page 16 2002-2012 Microchip Technology Inc. TC4421/TC4422 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range XX XXX X Package Tape & Reel PB Free Device: TC4421: TC4422: Temperature Range: C E V Package: AT = TO-220, 5-lead (C-Temp Only) MF = Dual, Flat, No-Lead (6x5 mm Body), 8-lead MF713 = Dual, Flat, No-Lead (6x5 mm Body), 8-lead (Tape and Reel) PA = Plastic DIP (300 mil Body), 8-lead SM = Plastic SOIC (208 mil Body), 8-lead SM713 = Plastic SOIC (208 mil Body), 8-lead (Tape and Reel) PB Free G 9A High-Speed MOSFET Driver, Inverting 9A High-Speed MOSFET Driver, Non-Inverting = 0°C to +70°C (PDIP and TO-220 Only) = -40°C to +85°C = -40°C to +125°C Examples: a) TC4421CAT: b) TC4421ESMG: 9A High-Speed Inverting MOSFET Driver, PB Free SOIC package, -40°C to +85°C. c) TC4421VMF: 9A High-Speed Inverting MOSFET Driver, DFN package, -40°C to +125°C. a) TC4422VPA: 9A High-Speed Non-Inverting MOSFET Driver, PDIP package, -40°C to +125°C. b) TC4422EPA: 9A High-Speed Non-Inverting MOSFET Driver, PDIP package, -40°C to +85°C. c) TC4422EMF: 9A High-Speed Inverting MOSFET Driver, DFN package, -40°C to +85°C. = Lead-Free device = Blank * Available on selected packages. Contact your local sales representative for availability 9A High-Speed Inverting MOSFET Driver, TO-220 package, 0°C to +70°C. Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. Your local Microchip sales office The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. 2002-2012 Microchip Technology Inc. DS21420E-page 17 TC4421/TC4422 NOTES: DS21420E-page 18 2002-2012 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. 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Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. Analog-for-the-Digital Age, Application Maestro, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O, Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA and Z-Scale are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. GestIC and ULPP are registered trademarks of Microchip Technology Germany II GmbH & Co. & KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. © 2002-2012, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. ISBN: 9781620767955 QUALITY MANAGEMENT SYSTEM CERTIFIED BY DNV == ISO/TS 16949 == 2002-2012 Microchip Technology Inc. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. 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