SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 D Control Inputs VIH/VIL Levels Are DGV OR PW PACKAGE (TOP VIEW) VCCA DIR A1 A2 A3 A4 A5 A6 A7 A8 GND GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 RHL PACKAGE (TOP VIEW) VCCB VCCB OE B1 B2 B3 B4 B5 B6 B7 B8 GND DIR A1 A2 A3 A4 A5 A6 A7 A8 GND VCCB D 1 24 23 VCCB 22 OE 2 3 21 B1 20 B2 4 5 19 B3 18 B4 6 7 17 B5 16 B6 8 9 15 B7 14 B8 10 11 12 13 GND D D VCCA D D − 170 Mbps (1.2 V 3 (VCCA or VCCB) 3 3.3 V) − 320 Mbps (1.8 V 3 (VCCA or VCCB) 3 3.3 V) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) GND D D Max Data Rates: Referenced to VCCA Voltage VCC Isolation Feature − If Either VCC Input Is at GND, All I/O Ports Are in the High-Impedance State Ioff Supports Partial-Power-Down Mode Operation Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.4-V to 3.6-V Power-Supply Range I/Os Are 4.6-V Tolerant description/ordering information This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC8T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. ORDERING INFORMATION PACKAGE† TA QFN − RHL −40°C to 85°C TSSOP − PW ORDERABLE PART NUMBER Tape and reel SN74AVC8T245RHLR Tube SN74AVC8T245PW Tape and reel SN74AVC8T245PWR TOP-SIDE MARKING WE245 WE245 TVSOP − DGV Tape and reel SN74AVC8T245DGVR WE245 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($% %$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 description/ordering information (continued) The SN74AVC8T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses are effectively isolated. The SN74AVC8T245 is designed so the control pins (DIR and OE) are supplied by VCCA. The SN74AVC8T245 solution is compatible with a single-supply system and can be replaced later with a ’245 function, with minimal printed circuit board redesign. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE shall be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. FUNCTION TABLE (each 8-bit section) INPUTS OPERATION OE DIR L L B data to A bus L H A data to B bus H X All outputs Hi-Z logic diagram (positive logic) 2 DIR 22 OE A1 3 21 To Seven Other Channels 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 B1 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1): A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2): A port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCA + 0.5 V B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCB + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCCA, VCCB, or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88°C/W RHL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 recommended operating conditions (see Notes 4 through 6) VCCI VCCA VCCB VCCO MIN MAX Supply voltage 1.2 3.6 V Supply voltage 1.2 3.6 V VCCI × 0.65 1.6 1.2 V to 1.95 V VIH High-level input voltage Data inputs 1.95 V to 2.7 V 2.7 V to 3.6 V VIL Data inputs VCCI × 0.35 0.7 1.95 V to 2.7 V 2.7 V to 3.6 V High-level input voltage DIR (referenced to VCCA) VCCA × 0.65 1.6 1.95 V to 2.7 V 2.7 V to 3.6 V VI VO IOH IOL ∆t/∆v Low-level input voltage DIR (referenced to VCCA) VCCA × 0.35 0.7 1.95 V to 2.7 V 2.7 V to 3.6 V V 0.8 Input voltage Output voltage V 2 1.2 V to 1.95 V VIL V 0.8 1.2 V to 1.95 V VIH V 2 1.2 V to 1.95 V Low-level input voltage UNIT 0 3.6 V Active state 0 3-state 0 VCCO 3.6 V High-level output current Low-level output current 1.2 V −3 1.4 V to 1.6 V −6 1.65 V to 1.95 V −8 2.3 V to 2.7 V −9 3 V to 3.6 V −12 1.2 V 3 1.4 V to 1.6 V 6 1.65 V to 1.95 V 8 2.3 V to 2.7 V 9 3 V to 3.6 V 12 Input transition rise or fall rate 5 mA mA ns/V TA Operating free-air temperature −40 85 °C NOTES: 4. VCCI is the VCC associated with the data input port. 5. VCCO is the VCC associated with the output port. 6. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 7 and 8) PARAMETER TEST CONDITIONS 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V 1.4 V 1.4 V 1.05 1.65 V 1.65 V 1.2 IOH = −9 mA IOH = −12 mA 2.3 V 2.3 V 1.75 3V 3V 2.3 IOL = 100 µA IOL = 3 mA 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V IOH = −6 mA IOH = −8 mA IOL = 6 mA IOL = 8 mA VOL VI = VIH VI = VIL IOL = 9 mA IOL = 12 mA II Control inputs VI = VCCA or GND A or B port Ioff IOZ† A or B port A or B port ICCA Cio A or B port MIN MAX UNIT VCCO − 0.2 V 0.95 V 0.2 0.15 1.4 V 1.4 V 0.35 1.65 V 1.65 V 0.45 2.3 V 2.3 V 0.55 3V 3V 0.7 1.2 V to 3.6 V 1.2 V to 3.6 V 0V ±0.025 ±0.25 ±1 0 to 3.6 V ±0.1 ±1 ±5 0 to 3.6 V 0V ±0.1 ±1 ±5 3.6 V 3.6 V ±0.5 ±2.5 ±5 1.2 V to 3.6 V 1.2 V to 3.6 V 15 V µA A µA VO = VCCO or GND, OE = VIH VI = VCCI or GND IO = 0 0V 3.6 V −2 3.6 V 0V 15 1.2 V to 3.6 V 1.2 V to 3.6 V 15 µA µA µA 0V 3.6 V 15 3.6 V 0V −2 1.2 V to 3.6 V 1.2 V to 3.6 V 25 µA VI = 3.3 V or GND 3.3 V 3.3 V 3.5 4.5 pF VO = 3.3 V or GND 3.3 V 3.3 V 6 7 pF VI = VCCI or GND ICCA + ICCB Control Ci inputs MIN VI or VO = 0 to 3.6 V VI = VCCI or GND ICCB −40°C to 85°C VCCB IOH = −100 µA IOH = −3 mA VOH TA = 25°C TYP MAX VCCA VI = VCCI or GND IO = 0 IO = 0 † For I/O ports, the parameter IOZ includes the input leakage current. NOTES: 7. VCCO is the VCC associated with the output port. 8. VCCI is the VCC associated with the input port. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 switching characteristics over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 10) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V TYP VCCB = 1.5 V TYP VCCB = 1.8 V TYP VCCB = 2.5 V TYP VCCB = 3.3 V TYP 3.1 2.6 2.5 3 3.5 3.1 2.6 2.5 3 3.5 3.1 2.7 2.5 2.4 2.3 3.1 2.7 2.5 2.4 2.3 5.3 5.3 5.3 5.3 5.3 5.3 5.3 5.3 5.3 5.3 5.1 4 3.5 3.2 3.1 5.1 4 3.5 3.2 3.1 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.8 4.7 4 4.1 4.3 5.1 4.7 4 4.1 4.3 5.1 UNIT ns ns ns ns ns ns switching characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 10) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER 6 VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 2.7 0.5 5.4 0.5 4.6 0.5 4.9 0.5 6.8 2.7 0.5 5.4 0.5 4.6 0.5 4.9 0.5 6.8 2.6 0.5 5.4 0.5 5.1 0.5 4.7 0.5 4.5 2.6 0.5 5.4 0.5 5.1 0.5 4.7 0.5 4.5 3.7 1.1 8.7 1.1 8.7 1.1 8.7 1.1 8.7 3.7 1.1 8.7 1.1 8.7 1.1 8.7 1.1 8.7 4.8 1.1 7.6 1.1 7.1 1 5.6 1 5.2 4.8 1.1 7.6 1.1 7.1 1 5.6 1 5.2 3.1 0.5 8.6 0.5 8.6 0.5 8.6 0.5 8.6 3.1 0.5 8.6 0.5 8.6 0.5 8.6 0.5 8.6 4.1 0.5 8.4 0.5 7.6 0.5 7.2 0.5 7.8 4.1 0.5 8.4 0.5 7.6 0.5 7.2 0.5 7.8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns ns SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 switching characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 10) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 2.5 0.5 5.1 0.5 4.4 0.5 4 0.5 3.9 2.5 0.5 5.1 0.5 4.4 0.5 4 0.5 3.9 2.5 0.5 4.6 0.5 4.4 0.5 3.9 0.5 3.7 2.5 0.5 4.6 0.5 4.4 0.5 3.9 0.5 3.7 3 1 6.8 1 6.8 1 6.8 1 6.8 3 1 6.8 1 6.8 1 6.8 1 6.8 4.6 1.1 8.2 1 6.7 0.5 5.1 0.5 4.5 4.6 1.1 8.2 1 6.7 0.5 5.1 0.5 4.5 2.8 0.5 7.1 0.5 7.1 0.5 7.1 0.5 7.1 2.8 0.5 7.1 0.5 7.1 0.5 7.1 0.5 7.1 3.9 0.5 7.8 0.5 6.9 0.5 6 0.5 5.8 3.9 0.5 7.8 0.5 6.9 0.5 6 0.5 5.8 UNIT ns ns ns ns ns ns switching characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 10) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 2.4 0.5 4.7 0.5 3.9 0.5 3.1 0.5 2.8 2.4 0.5 4.7 0.5 3.9 0.5 3.1 0.5 2.8 3 0.5 4.9 0.5 4 0.5 3.1 0.5 2.9 3 0.5 4.9 0.5 4 0.5 3.1 0.5 2.9 2.2 0.5 4.8 0.5 4.8 0.5 4.8 0.5 4.8 2.2 0.5 4.8 0.5 4.8 0.5 4.8 0.5 4.8 4.5 1.1 7.9 0.5 6.4 0.5 4.6 0.5 4 4.5 1.1 7.9 0.5 6.4 0.5 4.6 0.5 4 1.8 0.5 5.1 0.5 5.1 0.5 5.1 0.5 5.1 1.8 0.5 5.1 0.5 5.1 0.5 5.1 0.5 5.1 3.6 0.5 7.1 0.5 6.3 0.5 5.1 0.5 3.9 3.6 0.5 7.1 0.5 6.3 0.5 5.1 0.5 3.9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns ns 7 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 switching characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 10) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 2.3 0.5 4.5 0.5 3.7 0.5 2.9 0.5 2.5 2.3 0.5 4.5 0.5 3.7 0.5 2.9 0.5 2.5 3.5 0.5 6.8 0.5 3.9 0.5 2.8 0.5 2.5 3.5 0.5 6.8 0.5 3.9 0.5 2.8 0.5 2.5 2 0.5 4 0.5 4 0.5 4 0.5 4 2 0.5 4 0.5 4 0.5 4 0.5 4 4.5 1.1 7.8 0.5 6.2 0.5 4.5 0.5 3.9 4.5 1.1 7.8 0.5 6.2 0.5 4.5 0.5 3.9 1.7 0.5 4 0.5 4 0.5 4 0.5 4 1.7 0.5 4 0.5 4 0.5 4 0.5 4 3.4 0.5 6.9 0.5 6 0.5 4.8 0.5 4.2 3.4 0.5 6.9 0.5 6 0.5 4.8 0.5 4.2 UNIT ns ns ns ns ns ns operating characteristics, TA = 25°C VCCA = VCCB = 1.2 V VCCA = VCCB = 1.5 V VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.3 V TYP TYP TYP TYP TYP 1 1 1 1 1 1 1 1 1 1 12 12 12 13 14 Outputs Disabled 1 1 1 1 1 Outputs Enabled 12 12 12 13 14 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 PARAMETER TEST CONDITIONS Outputs Enabled A to B CpdA† Outputs Disabled Outputs Enabled B to A A to B CpdB† Outputs Disabled Outputs Enabled B to A CL = 0, f = 10 MHz, tr = tf =1 ns CL = 0, f = 10 MHz, tr = tf =1 ns Outputs Disabled pF pF † Power-dissipation capacitance per transceiver 8 UNIT POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 typical total static power consumption (ICCA + ICCB) Table 1 VCCA VCCB 0V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 <0.5 <0.5 <0.5 <0.5 <0.5 1.2 V <0.5 <1 <1 <1 <1 1 1.5 V <0.5 <1 <1 <1 <1 1 1.8 V <0.5 <1 <1 <1 <1 <1 2.5 V <0.5 1 <1 <1 <1 <1 3.3 V <0.5 1 <1 <1 <1 <1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT µA A 9 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 TYPICAL CHARACTERISTICS TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.2 V 6 5 tPD − ns 4 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 0 VCCB = 2.5 V VCCB = 3.3 V 0 10 20 30 40 60 50 CL − pF Figure 1 6 6 5 5 4 4 tPHL − ns tPLH − ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.5 V 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 2 0 10 20 30 40 50 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 3.3 V 0 3 60 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 CL − pF 30 CL − pF Figure 2 10 20 Figure 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 40 50 60 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.8 V 6 6 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 5 VCCB = 2.5 V VCCB = 3.3 V 4 tPHL − ns tPLH − ns 5 VCCB = 2.5 V VCCB = 3.3 V 4 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 3 3 2 2 1 1 0 0 10 0 20 30 40 50 60 0 10 20 30 CL − pF 40 50 60 CL − pF Figure 5 Figure 4 TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 2.5 V 6 6 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 5 VCCB = 2.5 V VCCB = 3.3 V 4 tPHL − ns tPLH − ns 5 VCCB = 2.5 V VCCB = 3.3 V 4 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 3 3 2 2 1 1 0 0 0 10 20 30 40 50 60 0 10 20 30 40 50 60 CL − pF CL − pF Figure 7 Figure 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 3.3 V 6 6 VCCB = 1.2 V VCCB = 1.5 V 5 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 5 VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V VCCB = 2.5 V VCCB = 3.3 V 4 tPHL − ns tPLH − ns 4 3 3 2 2 1 1 0 0 0 10 20 30 40 50 60 0 10 CL − pF 30 CL − pF Figure 8 12 20 Figure 9 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 40 50 60 SCES517E − DECEMBER 2003 − REVISED OCTOBER 2004 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V CL RL 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ VTP 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCA Output Control (low-level enabling) VCCA/2 0V tPLZ tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output VOH VCCO/2 VOL VCCO/2 VCCO Output Waveform 1 S1 at 2 × VCCO (see Note B) tPHL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VCCA/2 VCCO/2 VOL tPHZ tPZH Output Waveform 2 S1 at GND (see Note B) VOL + VTP VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 10. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. 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