SCES567D − MAY 2004 − REVISED NOVEMBER 2004 D Control Inputs VIH/VIL Levels are D D D D D D D D D DGG OR DGV PACKAGE (TOP VIEW) Referenced to VCCA Voltage VCC Isolation Feature − If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range Ioff Supports Partial-Power-Down Mode Operation I/Os Are 4.6-V Tolerant Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors Max Data Rates − 380 Mbps (1.8-V to 3.3-V Translation) − 260 Mbps (<1.8-V to 3.3-V Translation) − 260 Mbps (Translate to 2.5 V) − 210 Mbps (Translate to 1.8 V) − 120 Mbps (Translate to 1.5 V) − 100 Mbps (Translate to 1.2 V) Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) 1DIR 1B1 1B2 GND 1B3 1B4 VCCB 1B5 1B6 1B7 GND 1B8 1B9 1B10 2B1 2B2 2B3 GND 2B4 2B5 2B6 VCCB 2B7 2B8 GND 2B9 2B10 2DIR 1 56 2 55 3 54 4 53 5 52 6 51 7 50 8 49 9 48 10 47 11 46 12 45 13 44 14 43 15 42 16 41 17 40 18 39 19 38 20 37 21 36 22 35 23 34 24 33 25 32 26 31 27 30 28 29 1OE 1A1 1A2 GND 1A3 1A4 VCCA 1A5 1A6 1A7 GND 1A8 1A9 1A10 2A1 2A2 2A3 GND 2A4 2A5 2A6 VCCA 2A7 2A8 GND 2A9 2A10 2OE description/ordering information This 20-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVCH20T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. ORDERING INFORMATION −40°C to 85°C ORDERABLE PART NUMBER PACKAGE† TA TOP-SIDE MARKING TSSOP − DGG Tape and reel SN74AVCH20T245GR AVCH20T245 TVSOP − DGV Tape and reel SN74AVCH20T245VR WK245 VFBGA − GQL SN74AVCH20T245KR VFBGA − ZQL (Pb-free) Tape and reel 74AVCH20T245ZQLR WK245 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2004, Texas Instruments Incorporated !"#$ % &'!!($ #% )'*+&#$ ,#$(!,'&$% &!" $ %)(&&#$% )(! $.( $(!"% (/#% %$!'"($% %$#,#!, 0#!!#$1- !,'&$ )!&(%%2 ,(% $ (&(%%#!+1 &+',( $(%$2 #++ )#!#"($(!%- POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 description/ordering information (continued) The SN74AVCH20T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so that the buses are effectively isolated. The SN74AVCH20T245 is designed so that the control (1DIR, 2DIR, 1OE, and 2OE) inputs are supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. GQL OR ZQL PACKAGE (TOP VIEW) 1 2 3 4 5 6 terminal assignments 1 2 3 4 5 6 A A 1B1 1B2 1DIR 1OE 1A2 1A1 B B 1B3 1B4 GND GND 1A4 1A3 C 1B5 1B6 1A5 1B7 1B8 VCCA GND 1A6 D VCCB GND E 1B9 1B10 C D E F G 1A7 1A9 F 2B1 2B2 2A2 2A1 G 2B3 2B4 GND GND 2A4 2A3 H 2B5 2B6 VCCA GND 2A6 2A5 2A8 2A7 2OE 2A10 2A9 H J 2B7 2B8 VCCB GND J K 2B9 2B10 2DIR K FUNCTION TABLE (each 10-bit section) INPUTS OE 2 1A8 1A10 DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 logic diagram (positive logic) 1DIR 1 2DIR 56 1A1 29 1OE 55 2A1 2 28 2OE 42 15 1B1 2B1 To Nine Other Channels To Nine Other Channels Pin numbers shown are for the DGG and DGV packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCCA and VCCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Input voltage range, VI (see Note 1): I/O ports (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V I/O ports (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Control inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V Voltage range applied to any output in the high or low state, VO (see Notes 1 and 2): (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCA + 0.5 V (B port) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCCB + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through each VCCA, VCCB, and GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 3): DGG package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48°C/W GQL/ZQL package . . . . . . . . . . . . . . . . . . . . . . . . . . . 42°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51-7. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 recommended operating conditions (see Notes 4 through 8) VCCI VCCA VCCB VCCO MIN MAX Supply voltage 1.2 3.6 V Supply voltage 1.2 3.6 V VCCI × 0.65 1.6 1.2 V to 1.95 V High-level input voltage VIH Data inputs (see Note 7) 1.95 V to 2.7 V 2.7 V to 3.6 V VIL Data inputs (see Note 7) VCCI × 0.35 0.7 1.95 V to 2.7 V 2.7 V to 3.6 V High-level input voltage VIH Low-level input voltage VIL VI DIR (Referenced to VCCA) (see Note 8) DIR (Referenced to VCCA) (see Note 8) Output voltage IOH VCCA ×0.65 1.6 1.2 V to 1.95 V 1.95 V to 2.7 V 2.7 V to 3.6 V VCCA × 0.35 0.7 1.95 V to 2.7 V 2.7 V to 3.6 V 0 3.6 V 0 3-state 0 VCCO 3.6 V 1.2 V −3 1.4 V to 1.6 V −6 1.65 V to 1.95 V −8 2.3 V to 2.7 V −9 3 V to 3.6 V −12 1.2 V 3 1.4 V to 1.6 V 6 1.65 V to 1.95 V 8 2.3 V to 2.7 V 9 3 V to 3.6 V 12 Input transition rise or fall rate TA NOTES: 4. 5. 6. V 0.8 Active state Low-level output current ∆t/∆v V 2 1.2 V to 1.95 V High-level output current IOL V 0.8 Input voltage VO V 2 1.2 V to 1.95 V Low-level input voltage UNIT Operating free-air temperature −40 mA mA 5 ns/V 85 °C VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. 7. For VCCI values not specified in the data sheet, VIH(min) = VCCI x 0.7 V, VIL(max) = VCCI x 0.3 V. 8. For VCCI values not specified in the data sheet, VIH(min) = VCCA x 0.7 V, VIL(max) = VCCA x 0.3 V. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Note 9) PARAMETER TEST CONDITIONS 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V 1.4 V 1.4 V 1.05 1.65 V 1.65 V 1.2 IOH = −9 mA IOH = −12 mA 2.3 V 2.3 V 1.75 3V 3V 2.3 IOL = 100 µA IOL = 3 mA 1.2 V to 3.6 V 1.2 V to 3.6 V 1.2 V 1.2 V IOH = −6 mA IOH = −8 mA IOL = 6 mA IOL = 8 mA VOL VI = VIH II IBHL† IBHH‡ IBHHO¶ MIN MAX VCCO − 0.2 V V 0.2 0.15 1.4 V 0.35 1.65 V 0.45 2.3 V 2.3 V 0.55 3V 3V 0.7 1.2 V to 3.6 V 1.2 V to 3.6 V VI = 0.42 V VI = 0.49 V 1.2 V 1.2 V 1.4 V 1.4 V 15 VI = 0.58 V VI = 0.7 V 1.65 V 1.65 V 25 2.3 V 2.3 V 45 VI = 0.8 V VI = 0.78 V 3.3 V 3.3 V 1.2 V 1.2 V VI = VCCA or GND VI = 0.91 V VI = 1.07 V VI = 0 to VCC VI = 0 to VCC UNIT 0.95 1.4 V VI = 1.6 V VI = 2 V IBHLO§ MIN 1.65 V VI = VIL IOL = 9 mA IOL = 12 mA Contr ol inputs −40°C to 85°C VCCB IOH = −100 µA IOH = −3 mA VOH TA = 25°C TYP MAX VCCA ±0.025 ±0.25 ±1 V µA 25 µA 100 −25 1.4 V 1.4 V −15 1.65 V 1.65 V −25 2.3 V 2.3 V −45 3.3 V 3.3 V 1.2 V 1.2 V 1.6 V 1.6 V 125 1.95 V 1.95 V 200 2.7 V 2.7 V 300 3.6 V 3.6 V 500 1.2 V 1.2 V 1.6 V 1.6 V −125 1.95 V 1.95 V −200 2.7 V 2.7 V −300 3.6 V 3.6 V −500 µA −100 50 µA −50 µA † The bus-hold circuit can sink at least the minimum low sustaining current at VIL max. IBHL should be measured after lowering VIN to GND and then raising it to VIL max. ‡ The bus-hold circuit can source at least the minimum high sustaining current at VIH min. IBHH should be measured after raising VIN to VCC and then lowering it to VIH min. § An external driver must source at least IBHLO to switch this node from low to high. ¶ An external driver must sink at least IBHHO to switch this node from high to low. NOTE 9: VCCO is the VCC associated with the output port. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) (see Notes 10 and 11) (continued) PARAMETER TEST CONDITIONS B port A or B ports IOZ† B port Cio A or B ports −40°C to 85°C MIN MAX UNIT ±0.1 ±1 ±5 0V ±0.1 ±1 ±5 OE = VIH 3.6 V 3.6 V ±0.5 ±2.5 ±5 OE = don’t care 0V 3.6 V ±5 3.6 V 0V ±5 1.2 V to 3.6 V 1.2 V to 3.6 V 35 0V 3.6 V −5 3.6 V 0V 35 1.2 V to 3.6 V 1.2 V to 3.6 V 35 0V 3.6 V 35 3.6 V 0V −5 1.2 V to 3.6 V 1.2 V to 3.6 V 65 VI = 3.3 V or GND 3.3 V 3.3 V 3.5 pF VO = 3.3 V or GND 3.3 V 3.3 V 7 pF VO = VCCO or GND, VI = VCCI or GND VI = VCCI or GND, ICCA ) ICCB Control Ci inputs TA = 25°C TYP MAX 0 to 3.6 V VI = VCCI or GND, ICCB MIN 0V VI or VO = 0 to 3.6 V A port ICCA VCCB 0 to 3.6 V A port Ioff VCCA VI = VCCI or GND, IO = 0 IO = 0 IO = 0 µA A A µA µA µA µA † For I/O ports, the parameter IOZ includes the input leakage current. NOTES: 10. VCCO is the VCC associated with the output port. 11. VCCI is the VCC associated with the input port. switching characteristics over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER 6 VCCB = 1.2 V TYP VCCB = 1.5 V TYP VCCB = 1.8 V TYP VCCB = 2.5 V TYP VCCB = 3.3 V TYP 3.8 3.1 2.8 2.7 3.3 3.8 3.1 2.8 2.7 3.3 4.1 3.8 3.6 3.5 3.4 4.1 3.8 3.6 3.5 3.4 6.5 6.5 6.5 6.5 6.5 6.5 6.5 6.5 6.5 6.5 5.6 4.4 3.8 3.3 3.2 5.6 4.4 3.8 3.3 3.2 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 5.7 4.6 4.7 4.1 5.4 5.7 4.6 4.7 4.1 5.4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns ns SCES567D − MAY 2004 − REVISED NOVEMBER 2004 switching characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.8 0.5 6.4 0.5 5.4 0.5 4.3 0.5 3.9 3.8 0.5 6.4 0.5 5.4 0.5 4.3 0.5 3.9 3.1 0.5 6.4 0.5 6.1 0.5 5.8 0.5 5.7 3.1 0.5 6.4 0.5 6.1 0.5 5.8 0.5 5.7 4.3 1.5 10.3 1.5 10.3 1.5 10.2 1.5 10.2 4.3 1.5 10.3 1.5 10.3 1.5 10.2 1.5 10.2 5.2 1 10.3 1 8.4 0.5 6.1 0.5 5.3 5.2 1 10.3 1 8.4 0.5 6.1 0.5 5.3 4.5 2 9 2 9 2 9 2 9 4.5 2 9 2 9 2 9 2 9 5.1 1.5 9 1.5 7.8 1 6.4 1 5.9 5.1 1.5 9 1.5 7.8 1 6.4 1 5.9 UNIT ns ns ns ns ns ns switching characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.6 0.5 6.1 0.5 5 0.5 3.9 0.5 3.5 3.6 0.5 6.1 0.5 5 0.5 3.9 0.5 3.5 2.8 0.5 5.4 0.5 5 0.5 4.7 0.5 4.6 2.8 0.5 5.4 0.5 5 0.5 4.7 0.5 4.6 3.4 1 8.1 1 7.9 1 7.9 1 7.9 3.4 1 8.1 1 7.9 1 7.9 1 7.9 5 0.5 10 0.5 7.9 0.5 5.7 0.5 4.8 5 0.5 10 0.5 7.9 0.5 5.7 0.5 4.8 4.1 2 7.4 2 7.4 2 7.4 2 7.4 4.1 2 7.4 2 7.4 2 7.4 2 7.4 4.9 1.5 8.7 1.5 7.4 1 5.8 1 5.1 4.9 1.5 8.7 1.5 7.4 1 5.8 1 5.1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns ns 7 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 switching characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.5 0.5 5.8 0.5 4.7 0.5 3.5 0.5 3 3.5 0.5 5.8 0.5 4.7 0.5 3.5 0.5 3 2.7 0.5 4.3 0.5 3.9 0.5 3.5 0.5 3.4 2.7 0.5 4.3 0.5 3.9 0.5 3.5 0.5 3.4 2.5 0.5 5.4 0.5 5.3 0.5 5.2 0.5 5.2 2.5 0.5 5.4 0.5 5.3 0.5 5.2 0.5 5.2 4.8 0.5 9.6 0.5 7.6 0.5 5.3 0.5 4.3 4.8 0.5 9.6 0.5 7.6 0.5 5.3 0.5 4.3 3 1.1 5.2 1.1 5.2 1.1 5.2 1.1 5.2 3 1.1 5.2 1.1 5.2 1.1 5.2 1.1 5.2 4.7 1.2 8.2 1.2 6.9 1 5.3 1 5 4.7 1.2 8.2 1.2 6.9 1 5.3 1 5 UNIT ns ns ns ns ns ns switching characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 1) FROM (INPUT) TO (OUTPUT) tPLH tPHL A B tPLH tPHL B A tPZH tPZL OE A tPZH tPZL OE B tPHZ tPLZ OE A tPHZ tPLZ OE B PARAMETER 8 VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.4 0.5 5.7 0.5 4.6 0.5 3.4 0.5 2.9 3.4 0.5 5.7 0.5 4.6 0.5 3.4 0.5 2.9 3.3 0.5 3.9 0.5 3.5 0.5 3 0.5 2.9 3.3 0.5 3.9 0.5 3.5 0.5 3 0.5 2.9 2.2 0.5 4.4 0.5 4.3 0.5 4.2 0.5 4.1 2.2 0.5 4.4 0.5 4.3 0.5 4.2 0.5 4.1 4.7 1 9.6 0.5 7.5 0.5 5.1 0.5 4.1 4.7 1 9.6 0.5 7.5 0.5 5.1 0.5 4.1 3.4 0.8 5 0.8 5 0.8 5 0.8 5 3.4 0.8 5 0.8 5 0.8 5 0.8 5 4.6 1.2 8.1 1.2 6.7 1 5.1 0.8 5 4.6 1.2 8.1 1.2 6.7 1 5.1 0.8 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT ns ns ns ns ns ns SCES567D − MAY 2004 − REVISED NOVEMBER 2004 operating characteristics, TA = 25°C VCCA = VCCB = 1.2 V VCCA = VCCB = 1.5 V VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.3 V TYP TYP TYP TYP TYP 1 1 1 1 2 1 1 1 1 1 12 13 14 15 16 Outputs Disabled 1 1 1 1 1 Outputs Enabled 13 13 14 15 16 1 1 1 1 1 1 1 1 2 2 1 1 1 1 1 PARAMETER TEST CONDITIONS Outputs Enabled A to B CpdA† Outputs Disabled Outputs Enabled B to A A to B CpdB† Outputs Disabled Outputs Enabled B to A CL = 0, f = 10 MHz, tr = tf =1 ns CL = 0, f = 10 MHz, tr = tf =1 ns Outputs Disabled UNIT pF pF † Power-dissipation capacitance per transceiver POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 power-up considerations A proper power-up sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other anomalies. To guard against power-up problems, take the following precautions: 1. Connect ground before any supply voltage is applied. 2. Power up VCCA. 3. VCCB can be ramped up along with or after VCCA. typical total static power consumption (ICCA + ICCB) TABLE 1 VCCB 10 VCCA 0V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 <0.5 <0.5 <0.5 <0.5 <0.5 1.2 V <0.5 <1 <1 <1 <1 1 1.5 V <0.5 <1 <1 <1 <1 1 1.8 V <0.5 <1 <1 <1 <1 <1 2.5 V <0.5 1 <1 <1 <1 <1 3.3 V <0.5 1 <1 <1 <1 <1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 UNIT µA A SCES567D − MAY 2004 − REVISED NOVEMBER 2004 TYPICAL CHARACTERISTICS 6 6 5 5 4 4 tPHL − ns tPLH − ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.2 V 3 2 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 3 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 VCCB = 2.5 V VCCB = 3.3 V 0 60 0 10 20 CL − pF 30 40 50 60 CL − pF Figure 1 Figure 2 6 6 5 5 4 4 tPHL − ns tPLH − ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.5 V 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 3 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 60 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 CL − pF 20 30 40 50 60 CL − pF Figure 3 Figure 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 11 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 6 6 5 5 4 4 tPHL − ns tPLH − ns TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 1.8 V 3 2 2 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 3 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 1 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 VCCB = 2.5 V VCCB = 3.3 V 0 60 0 10 20 CL − pF 30 40 50 60 40 50 60 CL − pF Figure 5 Figure 6 TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 2.5 V 6 6 5 5 4 VCCB = 2.5 V VCCB = 3.3 V 4 tPHL − ns tPLH − ns VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 3 2 VCCB = 1.2 V VCCB = 1.5 V 1 VCCB = 1.8 V 3 2 1 VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 60 0 0 10 CL − pF 30 CL − pF Figure 7 12 20 Figure 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 TYPICAL PROPAGATION DELAY (A to B) vs LOAD CAPACITANCE TA = 25°C, VCCA = 3.3 V 6 6 5 5 4 VCCB = 2.5 V VCCB = 3.3 V 4 tPHL − ns tPLH − ns VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V 3 2 3 2 VCCB = 1.2 V VCCB = 1.5 V 1 VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 50 60 1 0 0 10 CL − pF 20 30 40 50 60 CL − pF Figure 9 Figure 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 13 SCES567D − MAY 2004 − REVISED NOVEMBER 2004 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V CL RL 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ VTP 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCA Output Control (low-level enabling) VCCA/2 0V tPLZ tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VOH VCCO/2 VOL VCCO/2 VCCA/2 VCCO Output Waveform 1 S1 at 2 × VCCO (see Note B) VCCO/2 VOL tPHZ tPZH Output Waveform 2 S1 at GND (see Note B) VOL + VTP VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 11. Load Circuit and Voltage Waveforms 14 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000 DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE 24 PINS SHOWN 0,40 0,23 0,13 24 13 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0°–8° 1 0,75 0,50 12 A Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,08 14 16 20 24 38 48 56 A MAX 3,70 3,70 5,10 5,10 7,90 9,80 11,40 A MIN 3,50 3,50 4,90 4,90 7,70 9,60 11,20 DIM 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins – MO-153 14/16/20/56 Pins – MO-194 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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