TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 DUAL OUTPUT BOOST WLED DRIVER USING SINGLE INDUCTOR FEATURES • • • • • • • • • • • • 2.5-V to 6-V Input Voltage Range Two Outputs Each up to 27 V 0.7-A Integrated Switch Built-In Power Diode 1.2-MHz Fixed PWM Frequency Individually Programmable Output Current Input-to-Output Isolation Built-In Soft Start Overvoltage Protection Up to 83% Efficiency Up to 30 kHz PWM Dimming Frequency Available in a 10 Pin, 3 × 3 mm QFN Package In addition to the small inductor, small capacitor and 3 mm x 3 mm QFN package, the built-in MOSFET and diode eliminate the need for any external power devices. Overall, the IC provides an extremely compact solution with high efficiency and plenty of flexibility. TYPICAL APPLICATION 2.5 V to 6 V Input L1 10 mH C1 1 mF SW Vin • • Sub and Main Display Backlight in Clam Shell Phones Display and Keypad Backlight Up to 14 WLED Driver DESCRIPTION C2 1 mF Gnd SEL1 APPLICATIONS • Iout SEL2 IFB1 IFB2 ISET1 ISET2 R1 R2 The TPS61150/1 is a high frequency boost converter with two regulated current outputs for driving WLEDs. Each current output can be individually programmed through external resistors. There is dedicated selection pin for each output, so the two outputs can be turned on separately or simultaneously. The output current can be reduced by a pulse width modulation (PWM) signal on the select pins or an analog voltage on the ISET pin, resulting in PWM dimming of the WLEDs. The boost regulator runs at 1.2 MHz fixed switching frequency to reduce output ripple and avoid audible noises associated with PFM control. The two current outputs are ideal for driving WLED backlight for the sub and main displays in clam shell phones. The two outputs can also be used for driving display and keypad backlights. When used together, the two outputs can drive up to 14 WLED for one large display. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2007, Texas Instruments Incorporated TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION TA PACKAGE (1) OVP (Typ.) PACKAGE MARKING –40 to 85°C TPS61150DRCR 28 V BCQ –40 to 85°C TPS61151DRCR 22 V BRH –40 to 85°C TPS61150DRCT 28 V BCQ –40 to 85°C TPS61151DRCT 22 V BRH (1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI Web site at www.ti.com. DEVICE INFORMATION 10 pin 3*3 mm QFN PACKAGE (TOP VIEW) IFB1 1 10 IFB2 Iset1 2 9 Iset2 SEL1 3 8 GND SEL2 4 7 Iout Vin 5 6 SW Exposed Thermal Pad TERMINAL FUNCTIONS TERMINAL NAME I/O NO. DESCRIPTION Vin 5 I The input pin to the IC. It provides the current to the boost power stage, and also powers the IC circuit. When Vin is below the undervoltage lockout threshold, the IC turns off and disables outputs; thereby disconnecting the WLEDs from the input. GND 8 O The ground of the IC. Connect the input and output capacitors very close to this pin. SW 6 I This is the switching node of the IC. Iout 7 O The output of the constant current supply. It is directly connected to the boost converter output. IFB1, IFB2 10 I The return path for the Iout regulation. Current regulator is connected to this pin, and it can be disabled to open the current path. ISET1, ISET2 2 9 I Output current programming pin. The resistor connected to the pin programs its corresponding output current. SEL1, SEL2 3 4 I Mode selection pins. See Table 1 for details. The thermal pad should be soldered to the analog ground. If possible, use thermal via to connect to ground plane for ideal power dissipation. Thermal Pal Table 1. TPS61150/1 Mode Selection 2 SEL1 SEL2 IFB1 IFB2 H L Enable Disable L H Disable Enable H H Enable Enable L L IC Shutdown Submit Documentation Feedback TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 FUNCTIONAL BLOCK DIAGRAM SW IOUT VIN + − 1.2 MHz Current Mode Control PWM GND IFB1 Current Sink SEL1 0.33 V ISET1 Error Amplifier IFB2 SEL2 Current Sink TPS61150/1 ISET2 ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) Supply voltages on pin VIN (2) Voltages on pins SEL1/2, ISET1/2 (2) Voltage on pin IOUT, SW, IFB1 and IFB2 (2) Continuous power dissipation VALUE UNIT –0.3 to 7 V –0.3 to 7 V 30 V See Dissipation Rating Table Operating junction temperature range –40 to 150 °C Storage temperature range –65 to 150 °C 260 °C Lead Temperature (soldering, 10 sec) (1) (2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to network ground terminal. DISSIPATION RATINGS PACKAGE QFN (1) QFN (2)(2 (1) (2) RθJA TA≤ 25°C POWER RATING TA = 70°C POWER RATING TA = 85°C POWER RATING 270oC/W 370 mW 204 mW 148 mW 48.7oC/W 2.05 W 1.13 W 821 mW Soldered PowerPAD on a standard 2-layer PCB without vias for thermal pad. Soldered PowerPAD on a standard 4-layer PCB with vias for thermal pad . Submit Documentation Feedback 3 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) MIN MAX UNIT Input voltage range 2.5 6 V VO Output voltage range Vin 27 V L Inductor (1) Ci Input capacitor (1) 1 µF CO Output capacitor (1) 1 µF TA Operating ambient temperature –40 85 °C TJ Operating junction temperature –40 125 °C (1) 4 NOM VI µH 10 See Application Section for further information. Submit Documentation Feedback TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 ELECTRICAL CHARACTERISTICS VI = 3.6 V, SELx = Vin, Rset = 80 kΩ, VIO = 15 V, TA = –40°C to 85°C, typical values are at TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SUPPLY CURRENT VI Input voltage range IQ Operating quiescent current into Vin Device PWM switching no load 2.5 ISD Shutdown current SELx = GND VUVLO Undervoltage lockout threshold Vin falling Vhys Undervoltage lockout hysterisis 1.65 6 V 2 mA 1.5 µA 1.8 70 V mV ENABLE AND SOFT START V(selh) SEL logic high voltage Vin = 2.7 V to 6 V V(sell) SEL logic low voltage Vin = 2.7 V to 6 V R(en) SEL pull down resistor Toff SEL pulse width to disable Kss IFB soft start current steps Tss Soft start time step Measured as clock divider Soft start enable time Time between falling and rising of two adjacent SELx pulses Tss_en 1.2 300 SELx high to low V 0.4 700 V kΩ 40 ms 16 64 40 ms CURRENT FEEDBACK V(ISET) ISET pin voltage K(ISET) Current multiplier Iout/Iset KM Current matching In reference to the average of two output current V(IFB) IFB Regulation voltage V(IFB_L) IFB low threshold hysteresis Tisink Current sink settle time measured from SELx rising edge (1) Ilkg IFB pin leakage current 1.204 1.229 1.254 820 900 990 -6 300 330 6 % 360 mV 60 IFB voltage = 25 V V mV 6 µs 1 µA POWER SWITCH AND DIODE rDS(on) N-channel MOSFET on-resistance VIN = VGS = 3.6 V I(LN_NFET) N-channel leakage current VDS = 25 V VF Power diode forward voltage Id = 0.7 A 0.9 Ω 1 µA 0.83 1.0 V 0.6 OC AND OVP ILIM N-Channel MOSFET current limit I(IFB_MAX) Current sink max output current VOVP Overvoltage threshold VOVP(hys) Overvoltage hysteresis Dual output, Iout=15 V, D=76% 0.75 1.0 1.25 Single output , Iout=15 V, D=76% 0.40 0.55 0.7 IFB = 330 mV 35 TPS61150 27 28 29 TPS61151 21 22 23 A mA TPS61150 550 TPS61151 440 V mV PWM AND PFM CONTROL fS Oscillator frequency Dmax Maximum duty cycle VFB = 1 V 1.0 1.2 90 93 1.5 MHz % 160 °C 15 °C THERMAL SHUTDOWN Tshutdown Thermal shutdown threshold Thys Thermal shutdown threshold hysteresis (1) This specification determines the minimum on time required for PWM dimming for desirable linearity. The maximum PWM dimming frequency can be calculated from the minimum duty cycle required in the application. Submit Documentation Feedback 5 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 TYPICAL CHARACTERISTICS Table of Graphs FIGURES Overcurrent Limit Vin = 3 V, 3.6 V, and 4 V, Single and dual output 1,2 WLED efficiency Vin = 3.3 V, 3.6 V and 4 V, 3 WLED, WLED voltage= 11 V 3 WLED efficiency Vin = 3.3 V, 3.6 V and 4 V, 4 WLED, WLED voltage = 15 V 4 WLED efficiency Vin = 3.3 V, 3.6 V and 4 V, 5 WLED, WLED voltage = 19 V 5 WLED efficiency Vin = 3.3 V, 3.6 V and 4 V, 6 WLED, WLED voltage= 23 V 6 Both on efficiency Vin = 3.3 V, 3.6 V and 4 V, 4 WLED on each output 7 K value over current Vin = 3.6 V, Iload = 2 mA to 25 mA 8 PWM dimming linearity Frequency = 20 kHz and 30 KHz 9 Single output PWM dimming waveform 10 Multiplexed PWM dimming waveform 11 Start up waveform 12 OVERCURRENT LIMIT (SINGLE OUTPUT) vs DUTY CYCLE OVERCURRENT LIMIT (DUAL OUTPUT) vs DUTY CYCLE 1200 600 Vin = 3 V VI = 4.2 V 1000 VI = 3.6 V Current Limit - mA Current Limit - mA 500 400 VI = 3 V 300 200 800 Vin = 3.6 V 400 200 100 0 0 10 20 30 40 50 60 Duty Cycle - % 70 80 90 10 20 30 40 50 60 Duty Cycle - % Figure 1. 6 Vin = 4.2 V 600 Figure 2. Submit Documentation Feedback 70 80 90 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 EFFICIENCY vs LOAD CURRENT EFFICIENCY vs LOAD CURRENT 90 90 WLED Voltage = 15 V, 4 WLED Single Output WLED Voltage = 11 V, 3 WLED, Single Output VI = 3.6 V 80 VI = 3.3 V Efficiency - % Efficiency - % 80 VI = 3.3 V VI = 3.6 V 70 VI = 4.2 V 60 70 VI = 4.2 V 60 50 50 0 5 10 15 20 25 0 5 WLED Current - mA 15 20 25 20 25 WLED Current - mA Figure 3. Figure 4. EFFICIENCY vs LOAD CURRENT EFFICIENCY vs LOAD CURRENT 90 90 WLED Voltage = 19 V, 5 WLED Single Output WLED Voltage = 23 V, 6 WLED Single Output V I = 4.2 V VI = 3.6 V 80 80 VI = 3.3 V Efficiency - % Efficiency - % 10 VI = 4.2 V 70 VI = 3.6 V VI = 3.3 V 70 60 60 50 0 5 10 15 WLED Current - mA 20 25 50 0 5 10 15 WLED Current - mA Figure 5. Figure 6. Submit Documentation Feedback 7 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 BOTH ON EFFICIENCY vs TOTAL OUTPUT CURRENT 90 WLED1 Voltage = 15 V WLED2 Voltage = 15 V 85 K VALUE vs WLED CURRENT 950 VI = 4.2 V 910 80 VI = 3.3 V 75 890 VI = 3.6 V 870 70 K Value Efficiency - % VI = 3.6 V WLED Voltage = 15 V 930 65 850 60 830 55 810 50 790 45 770 40 0 750 5 10 15 20 25 30 35 40 IO -Total Output Current - mA 45 50 0 2 4 6 8 10 12 14 16 18 20 WLED Current - mA Figure 7. Figure 8. WLED BRIGHTNESS DIMMING LINEARITY SINGLE OUTPUT WLED PWM BRIGHTNESS DIMMING 22 24 25 SELI 5 V/div, DC WLED current - mA 20 SW Pin 10 V/div, DC 15 IOUT pin 1 V/div, DC 15 V Offset WLED Current 20 mA/div, DC 10 f = 20 kHz 5 t - Time - 20 ms/div f = 30 kHz 0 0 20 40 60 PWM Duty cycle - % 80 100 Figure 9. 8 Figure 10. Submit Documentation Feedback TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 MULTIPLEXED PWM DIMMING (ISEL1: 4 WLED, ISEL2: 2 WLED) WLED START UP SELI 5 V/div, DC ISEL1 5 V/div, DC IOUT pin 10 V/div, DC ISEL2 5 V/div, DC Inductor Current 500 mA/div, DC WLED Current 20 mA/div, DC IOUT pin 5 V/div, DC 5 V Offset t - Time - 200 ms/div t - Time - 2 ms/div Figure 11. Figure 12. Submit Documentation Feedback 9 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 DETAILED DESCRIPTION CURRENT REGULATION The TPS61150/1 uses a single boost regulator to drive 2 WLED strings whose current can be programmed independently. The boost converter adopts PWM control which is ideal for high output current and low output ripple noises. The feedback loop regulates the IFB pin to a threshold voltage (330 mV typical), giving the current sink circuit just enough headroom to operate. The regulation current is set by the resistor on the Iset pin based on V I O + ISET KISET RSET (1) where Io = output current VISET = Iset pin voltage (1.229 V typical) RSET = Iset pin resistor value KISET = current multiplier (900 typical) When both outputs are enabled, the boost converter regulates to the IFB pin that demands higher Iout pin voltage, V(IOUT), and let the other IFB pin rise above its regulation voltage. The feedback path dynamically switches to the other IFB pin if its voltage drops more than the IFB low hysterisis (60 mV typical) below its regulation voltage. This ensures proper current regulation for both outputs. When both IFB voltages are low, IFB1 is used for regulation. Once IFB1 reaches its regulation voltage, the feedback path may hand over to IFB2 if it is still low, and the boost output will continue to rise. The overall efficiency in this mode depends on the voltage different between the IFB1 and IFB2. A large difference reduces the efficiency due to power losses across the current sink circuit. To improve the efficiency of the both-on mode, the two current outputs can be turned on complimentarily by applying out of phase enable signal to the SEL pins. The ISET pin resistors need to be recalculated to compensate for the reduced dc current. START UP During start up, both the boost converter and the current sink circuitry are trying to establish steady state simultaneously. The current sink circuitry ramps up current in 16 steps, with each step taking 64 clock cycles. This ensures that the current sink loop is slower than the boost converter response during startup. Therefore, the boost converter output comes up slowly as current sink circuitry ramps up the current. This ensures smooth start up and minimizes in-rush current. OVERVOLTAGE PROTECTION To prevent the boost output run away as the result of WLED disconnection, there is an overvoltage protection circuit which stops the boost converter from switching as soon as its output exceeds the OVP threshold. When the voltage falls below the OVP threshold, the converter resumes switching. The two OVP options offer the choices to prevent a 25 V rated output capacitor or the internal 30 V FET from breaking down. UNDERVOLTAGE LOCKOUT An internal thermal shutdown circuit turns off the IC when the typical junction temperature of 160°C is exceeded. The thermal shutdown has a hysteresis of typically 15°C. THERMAL SHUTDOWN An internal thermal shutdown turns off the IC when the typical junction temperature of 160°C is exceeded. The thermal shutdown has a hysteresis of typically 15°C. 10 Submit Documentation Feedback TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 DETAILED DESCRIPTION (continued) ENABLE Pulling either the SEL1 or SEL2 pin low turns off the corresponding output. If both SEL1 and SEL2 are low for more than 40 ms, the IC shuts down and consumes less than 1 µA current. The SEL pin can also be used for PWM brightness dimming. To improve PWM dimming linearity, soft start is disabled if the time between falling and rising edges of two adjacent SELx pulses is less than 40 ms. See APPLICATION INFORMATION for details. Each SEL input pin has an internal pull down resistor to disable the device when the pin is floating. Submit Documentation Feedback 11 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 APPLICATION INFORMATION MAXIMUM OUTPUT CURRENT The over-current limit in a boost converter limits the maximum input current and thus maximum input power for a given input voltage. Maximum output power is less than maximum input power due to power conversion losses. Therefore, the current limit, input voltage, output voltage and efficiency can all change maximum current output. Since current limit clamps peak inductor current, ripple has to be subtracted to derive maximum DC current. The ripple current is a function of switching frequency, inductor value and duty cycle. The following equations take into account of all the above factors for maximum output current calculation. 1 Ip + 1 L ) 1 Fs Viout)Vf*Vin Vin (2) ƪ ǒ Ǔ ƫ where Ip = inductor peak to peak ripple L = inductor value Vf = power diode forward voltage Fs = switching frequency Viout = boost output voltage. It is equal to 330 mV + voltage drop across WLED. Vin Iout_max + ǒ Ilim * Ip 2 Ǔ h Viout (3) where Iout_max = maximum output current of the boost converter Ilim = overcurrent limit η = efficiency To keep a tight range of the overcurrent limit, The TPS61150/1 uses the Vin and Iout pin voltage to compensate for the overcurrent limit variation caused by the slope compensation. However, the current threshold still has residual dependency on the Vin and Iout voltage. Use Figure 1 and Figure 2 to identify the typical overcurrent limit in your application, and use ±25% tolerance to account for temperature dependency and process variations. The maximum output current can also be limited by the current capability of the current sink circuitry. It is designed to provide maximum 35 mA current regardless of the current capability of the boost converter. WLED BRIGHTNESS DIMMING There are three ways to change the output current on the fly for WLED dimming. The first method parallels an additional resistor with the ISET pin resistor as shown in Figure 13 . The switch (Q1) can change the ISET pin resistance, and therefore modify the output current. This method is very simple, but can only provide limited dimming steps. ISET R1 RISET Q1 ON/OFF Logic Figure 13. Switching In/Out an Additional Resistor to Change Output Current 12 Submit Documentation Feedback TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 APPLICATION INFORMATION (continued) Alternatively, a PWM dimming signal at the SEL pin can modulate the output current by the duty cycle of the signal. The logic high of the signal turns on the current sink circuit, while the logic low turns it off. This operation creates an averaged DC output current proportional to the duty cycle of the PWM signal. The frequency of the PWM signal has to be high enough to avoid flashing of the WLEDs. The soft start of the current sink circuit is disabled during the PWM dimming to improve linearity. The major concern of the PWM dimming is the creation of audible noises which can come from the inductor and/or output capacitor of the boost converter. The audible noises on the output capacitor are created by the presence of voltage ripple in range of audible frequencies. The TPS61150/1 alleviates the problem by disconnecting the WLEDs from the output capacitor when the SEL pin is low. Therefore, the output capacitor is not discharged by the WLEDs, which reduces the voltage ripple during PWM dimming. The audible noises can be eliminated by using PWM dimming frequency above or below the audible frequency range. The maximum PWM dimming frequency of the TPS61150/1 is determined by the current settling time (Tisink) which is the time required for the circuit sink circuit to reach steady state after the SEL pin transitions from low to high. The maximum dimming frequency can be calculated by D F PWM_MAX + T min isink (4) Dmin = min duty cycle of the PWM dimming required in the application. For 20% Dmin, PWM dimming frequency up to 33 kHz is possible, making the noise frequency above the audible range. The third method uses an external DC voltage and resistor as shown in Figure 14 to change the ISET pin current, and thus control the output current. The DC voltage can be the output of a filtered PWM signal. The equation to calculate the output current is I I WLED WLED +K +K ǒ ǒ 1.229 ) R ISET ISET 1.229 * V R1 Ǔ Ǔ DC 1.229 * V 1.229 ) DC R R 1 ) 10K ISET ISET for DC voltage input (5) for PWM signal input (6) KISET = current multiplier between the ISET pin current and the IFB pin current. VDC= voltage of the dc voltage source or the dc voltage of the PWM signal. ISET ISET Filter PWM Signal R1 RISET DC Voltage 10 kW 0.1 mF R1 RISET Figure 14. Analog Dimming Uses an External Voltage Source to Control the Output Current INDUCTOR SELECTION Because the selection of the inductor affects the power supply steady state operation, transient behavior and loop stability, the inductor is the most important component in power regulator design. There are three specifications most important to the performance of the inductor, inductor value, dc resistance and saturation current. Considering inductor value alone is not enough. The inductor’s inductance value determines the inductor ripple current. It is generally recommended to set peak to peak ripple current given by Equation 2 to 30–40% of dc current. It is a good compromise of power losses and inductor size. For this reason, 10-µH inductors are recommended for TPS61150/1. Inductor dc current can be calculated as Submit Documentation Feedback 13 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 APPLICATION INFORMATION (continued) V I L_DC + iout V in I out h (7) Use the maximum load current and minimum Vin for calculation. The internal loop compensation for PWM control is optimized for the external component shown in the typical application circuit with consideration of component tolerance. Inductor values can have ±20% tolerance with no current bias. When the inductor current approaches saturation level, its inductance can decrease 20 to 35% from the 0-A value depending on how the inductor vendor defines saturation. Using an inductor with a smaller inductance value forces discontinuous PWM in which inductor current ramps down to zero before the end of each switching cycle. It reduces the boost converter’s maximum output current, and causes large input voltage ripple. An inductor with larger inductance will reduce the gain and phase margin of the feedback loop, possibly resulting in instability Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with the PWM switch and power diode. Although the TPS61150/1 has optimized the internal switches, the overall efficiency still relies on inductor’s DC resistance (DCR); Lower DCR improves efficiency. However, there is a trade off between DCR and inductor size, and shielded inductors typically have higher DCR than unshielded ones. DCR in range of 150 mΩ to 350 mΩ is suitable for applications requiring both on mode. DCR is the range of 250 mΩ to 450 mΩ is a good choice for single output application. Table 2 and Table 3 list recommended inductor models. Table 2. Recommended Inductors for Single Output L (µH) DCR Typ (mΩ) Isat (A) SIZE (L×W×H mm) VLF3012AT-100MR49 10 360 0.49 2.8×3.0×1.2 VLCF4018T-100MR74-2 10 163 0.74 4.0×4.0×1.8 CDRH2D11/HP 10 447 0.52 3.2×3.2×1.2 CDRH3D16/HP 10 230 0.84 4.0×4.0×1.8 TDK Sumida Table 3. Recommended Inductors for Dual Output L (µH) DCR Typ (mΩ) Isat (A) SIZE (L×W×H mm) VLCF4018T-100MR74-2 10 163 0.74 4×4.0×1.8 VLF4012AT-100MR79 10 300 0.85 3.5×3.7×1.2 CDRH3D16/HP 10 230 0.84 4×4.0×1.8 CDRH4D11/HP 10 340 0.85 4.8×4.8×1.2 TDK Sumida INPUT AND OUTPUT CAPACITOR SELECTION The output capacitor is mainly selected for the output ripple of the converter. This ripple voltage is the sum of the ripple caused by the capacitor’s capacitance and its equivalent series resistance (ESR). Assuming a capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated by C out + ǒViout * VinǓ Iout V iout Fs V ripple (8) Vripple = Peak to peak output ripple. 14 Submit Documentation Feedback TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 For Vin = 3.6 V, Viout = 20 V, and Fs = 1.2 MHz, 0.1% ripple (20 mV) would require 1 µF capacitor. For this value, ceramic capacitors are the best choice for its size, cost and availability. The additional output ripple component caused by ESR is calculated using: Vripple_ESR = Iout× RESR Due to its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or electrolytic capacitors are used. During a load transient, the capacitor at the output of the boost converter has to supply or absorb additional current before the inductor current ramps up the steady state value. Larger capacitors always help to reduce the voltage over and under shoot during a load transient. A larger capacitor also helps loop stability. Care must be taken when evaluating a ceramic capacitor’s derating due to applied dc voltage, aging and frequency response. For example, larger form factor capacitors (in 1206 size) have their self resonant frequencies in the range of TPS61150/1’s switching frequency. So the effective capacitance is significantly lower. Therefore, it may be necessary to use small capacitors in parallel instead of one large capacitor. The popular vendors for high value ceramic capacitors are: TDK (http://www.component.tdk.com/components.php) Murata (http://www.murata.com/cap/index.html) Table 4. Recommended Input and Output Capacitors Capacitance (µF) Voltage (V) Case C3216X5R1E475K 4.7 25 1206 C2012X5R1E105K 1 25 805 C1005X5R0J105K 1 6.3 402 GRM319R61E475KA12D 4.7 25 1206 GRM216R61E105KA12D 1 25 805 GRM155R60J105KE19D 1 6.3 402 TDK Murata LAYOUT CONSIDERATION As for all switching power supplies, especially those providing high current and using high switching frequencies, layout is an important design step. If layout is not carefully done, the regulator could show instability as well as EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor needs not only to be close to the Vin pin, but also to the GND pin in order to reduce the input ripple seen by the IC. The Vin and SW pins are conveniently located on the edges of the IC; therefore, the inductor can be placed close to the IC. The output capacitor needs to be placed near the load to minimize ripple and maximize transient performance. It is also beneficial to have the ground of the output capacitor close to the GND pin since there will be large ground return current flowing between them. When laying out signal ground, it is recommended to use short traces separated from power ground traces, and connect them together at a single point. Submit Documentation Feedback 15 TPS61150, TPS61151 www.ti.com SLVS625A – FEBRUARY 2006 – REVISED MARCH 2007 ADDITIONAL APPLICATION CIRCUIT L1 10 mH Vin C2 1 mF Vin SW Iout C2 1 mF GND EN/PWM Dimming SEL1 SEL2 IFB1 IFB2 ISET1 ISET2 R1 R2 Figure 15. Driving Up to 12 WLEDs With One LCD Backlight Display Vin IFB1 ON C1 1 mF IFB1 ON Keypad L1 10 mH Vin SW Iout SEL1 C2 1 mF GND IFB2 ON IFB2 ON SEL1 SEL2 SEL2 40 ms IC Shutdown ISET1 R1 IFB1 IFB2 ISET2 R2 Figure 16. Driving a Keypad and LCD Backlight by applying interleaved PWM signal to the SEL1 and SEL2 pins. The duty cycle of the PWM signal controls brightness dimming 16 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 5-Feb-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS61150DRCR ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61150DRCRG4 ACTIVE SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR TPS61150DRCRT PREVIEW SON DRC 10 TPS61150DRCT ACTIVE SON DRC 10 TPS61150DRCTG4 ACTIVE SON DRC TPS61151DRCR ACTIVE SON TPS61151DRCRG4 ACTIVE TPS61151DRCT TPS61151DRCTG4 Lead/Ball Finish MSL Peak Temp (3) TBD Call TI Call TI 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR SON DRC 10 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR ACTIVE SON DRC 10 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. 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