TI TPS61187

TPS61187
www.ti.com
SLVSA85D – JUNE 2010 – REVISED FEBRUARY 2012
WLED Driver for Notebooks with PWM Interface and Auto Phase Shift
Check for Samples: TPS61187
FEATURES
DESCRIPTION
•
•
•
•
The TPS61187 IC provides a highly integrated WLED
driver solution for notebook LCD backlight. This
device has a built-in high efficiency boost regulator
with integrated 2.0A /40V power MOSFET. The six
current sink regulators provide high precision current
regulation and matching. In total, the device can
support up to 60 WLEDs. In addition, the boost output
automatically adjusts its voltage to the WLED forward
voltage to optimize efficiency.
1
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
4.5 V to 24 V Input Voltage
38 V Maximum Output Voltage
Integrated 2 A 40 V MOSFET
300 kHz to 1 MHz Programmable Switching
Frequency
Adaptive Boost Output to WLED Voltages
Wide PWM Dimming Frequency Range
– 100 Hz to 50 KHz for Direct PWM Mode
– 100 Hz to 22 KHz for Frequency
Programmable Mode
100:1 Dimming Ratio at 20 kHz
10000:1 Dimming Ratio at 200 Hz (Direct PWM
mode)
Small External Components
Integrated Loop Compensation
Six Current Sinks of 30 mA Max
1.5% (Typ) Current Matching
PWM Brightness Interface Control
PWM Phase Shift Mode Brightness Dimming
Method or Direct PWM Dimming Method
4 kV HBM ESD Protection
Programmable Over Voltage Threshold
Built-in WLED Open/Short Protection
Thermal Shutdown
20 Lead 4mm × 4mm × 0.8 mm TQFN Package
The TPS61187 supports the auto phase shift
dimming method and direct PWM dimming method.
During phase shift PWM dimming, the WLED current
is turned on/off at the duty cycle controlled by the
input PWM signal and each channel is shifted
according to the frequency determined by an
integrated pulse width modulation (PWM) signal. The
frequency of this signal is resistor programmable,
while the duty cycle is controlled directly from an
external PWM signal input to the PWM pin. During
direct PWM dimming, the WLED current is turned
on/off synchronized with the input PWM signal.
L1
10uH
4.5V~24V
D1
C3
4.7uF
C1
2.2uF
R4
Open
R5
VIN
C2
1.0 uF
R7
1.2 KW
FAULT
VDDIO
SW
PGND
OVC
EN
FSLCT
APPLICATIONS
R8
10 KW
R3
499 KW
TPS61187
PWM
•
Notebook LCD Display Backlight
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
VDD_GPIO
R1
62 KW
Open
ISET
FPO
AGND
19.8 mA
RFPWM
/MODE
R2
9.09 KW
Figure 1. Typical Application – Phase Shift PWM
Mode
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010–2012, Texas Instruments Incorporated
TPS61187
SLVSA85D – JUNE 2010 – REVISED FEBRUARY 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
PACKAGE INFORMATION (1)
(1)
PACKAGE
PACKAGE MARKING
TPS61187RTJ
TPS61187
For the most current package and ordering information, see the
Package Option Addendum at the end of this document, or see the
TI website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
(1)
VALUE
UNIT
MIN
MAX
VIN, FAULT
–0.3
24
V
FPO
–0.3
7
V
SW
–0.3
40
V
EN, PWM, IFB1 to IFB4
–0.3
20
V
VDDIO
–0.3
3.7
V
All other pins
–0.3
3.6
V
HBM ESD rating
4
kV
MM ESD rating
200
V
CDM ESD rating
1.5
kV
Voltage range
(2)
Continuous power dissipation
See Thermal Information
Table
Operating junction temperature range
–40
150
°C
Storage temperature range
–65
150
°C
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
RECOMMENDED OPERATING CONDITIONS
over ooperating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
UNIT
VIN
Input voltage range
4.5
24
VOUT
Output voltage range
VIN
38
V
L1
Inductor, 600 kHz ~ 1 MHz switching frequency
10
22
µH
L1
Inductor, 300 kHz ~ 600 kHz swtching frequency
22
47
µH
CI
Input capacitor
CO
Output capacitor
1.0
FPWM_O
IFBx PWM dimming frequency - frequency programmable mode
0.1
22 (1)
KHz
FPWM_O
IFBx PWM dimming frequency - direct PWM mode
0.1
50
KHz
FPWM_I
PWM input signal frequency
0.1
22
KHz
FBOOST
Boost regulator switching frequency
300
1000
KHz
TA
Operating free-air temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
(1)
2
1
V
µF
4.7
10
µF
5 µs min pulse on time.
Copyright © 2010–2012, Texas Instruments Incorporated
TPS61187
www.ti.com
SLVSA85D – JUNE 2010 – REVISED FEBRUARY 2012
THERMAL INFORMATION
TPS61187
THERMAL METRIC (1)
RTJ
UNITS
20
θJA
Junction-to-ambient thermal resistance
39.9
θJC(top)
Junction-to-case(top) thermal resistance
34.0
θJB
Junction-to-board thermal resistance
9.9
ψJT
Junction-to-top characterization parameter
0.6
ψJB
Junction-to-board characterization parameter
9.5
θJC(bottom)
Junction-to-case(bottom) thermal resistance
2
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
ELECTRICAL CHARACTERISTICS
VIN = 12V, PWM/EN = high, IFB current = 20mA, IFB voltage = 500mV, TA = –40°C to 85°C, typical values are at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY CURRENT
VIN
Input voltage range
4.5
Iq_VIN
Operating quiescent current into Vin
Device enable, switching 1MHz and no
load, VIN = 24 V
VDDIO
VDDIO pin output voltage
Iload = 5 mA
ISD
Shutdown current
VIN_UVLO
VIN under-voltage lockout threshold
VIN_Hys
VIN under-voltage lockout hysterisis
3.0
3.3
24
V
4.0
mA
3.6
V
VIN = 12 V , EN = low
11
VIN = 24 V, EN = low
16
VIN ramp down
3.50
VIN ramp up
3.75
250
µA
V
mV
PWM
VH
EN Logic high threshold
EN
VL
EN Logic low threshold
EN
VH
PWM Logic high threshold
PWM
VL
PWM Logic low threshold
PWM
RPD
Pull down resistor on PWM and EN
2.1
0.8
2.1
V
0.8
400
800
1600
kΩ
1.204
1.229
1.253
V
CURRENT REGULATION
VISET
ISET pin voltage
KISET
Current multiplier
IFB
Current accuracy
Km
(Imax–Imin) / IAVG
980
IISET = 20 µA, 0°C to 70°C
IISET = 20 µA, –40°C to 85°C
–2%
2%
–2.3%
2.3%
IISET = 20 µA
1.3%
IFB voltage = 15 V, each pin
2
5
IFB voltage = 5 V, each pin
1
2
Ileak
IFB pin leakage current
IIFB_max
Current sink max output current
IFB = 350 mV
fdim
PWM dimming frequency
RFPWM = 9.09 kΩ
30
µA
mA
20
kHz
BOOST OUTPUT REGULATION
VIFB_L
Output voltage up threshold
Measured on VIFB(min)
350
mV
VIFB_H
Ouput voltage down threshold
Measured on VIFB(min)
650
mV
0.25
POWER SWITCH
RPWM_SW
PWM FET on-resistance
VIN = 12 V
ILN_NFET
PWM FET leakage current
VSW = 40 V, TA = 25°C
0.35
Ω
2
µA
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TPS61187
SLVSA85D – JUNE 2010 – REVISED FEBRUARY 2012
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ELECTRICAL CHARACTERISTICS (continued)
VIN = 12V, PWM/EN = high, IFB current = 20mA, IFB voltage = 500mV, TA = –40°C to 85°C, typical values are at TA = 25°C
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.0
1.2
MHz
3.0
A
OSCILLATOR
fS
Oscillator frequency
RFSW = 499 kΩ
Dmax
Maximum duty cycle
IFB = 0
0.8
94%
OC, SC, OVP AND SS
ILIM
N-Channel MOSFET current limit
D = Dmax
2.0
VCLAMP_TH
Ouput voltage clamp program threshold
VOVP_IFB
IFB overvoltage threshold
Measured on the IFBx pin, IFB on
VFPO_L
FPO Logic low voltage
I_SOURCE = 0.5 mA
VFAULT_HIGH
Fault high voltage
Measured as VIN – VFAULT
VFAULT_LOW
Fault low voltage
Measured as VIN – VFAULT , Sink, 10 µA
IFAULT
Maximum sink current
VIN – VFAULT = 0 V
1.90
1.95
2.00
V
12
13.5
15
V
0.4
V
FPO, FAULT
0.1
6
8
20
V
10
V
µA
THERMAL SHUTDOWN
Tshutdown
4
Thermal shutdown threshold
150
Thermal shutdown hysteresis
15
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°C
Copyright © 2010–2012, Texas Instruments Incorporated
Product Folder Link(s): TPS61187
TPS61187
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SLVSA85D – JUNE 2010 – REVISED FEBRUARY 2012
DEVICE INFORMATION
PWM
VIN
FAULT
NC
SW
20 PIN 4mm × 4mm RTJ PACKAGE
TOP VIEW
20
19
18
17
16
VDDIO 1
15
PGND
2
14
OVC
13
RFPWM
/ MODE
ISET 4
12
IFB1
FPO 5
11
IFB2
8
9
10
IFB3
7
GND
IFB6
6
IFB4
TPS61187
FSLCT 3
IFB5
EN
PowerPAD information goes here.
PIN FUNCTIONS
PIN
DESCRIPTION
NAME
NO.
VDDIO
1
Internal pre_regulator. Connect a 1.0 µF ceramic capacitor to VDDIO.
EN
2
Enable
FSLCT
3
Switching frequency selection pin. Use a resistor to set the frequency between 300kHz to 1.0MHz
ISET
4
Full-scale LED current set pin. Connecting a resistor to the pin programs the current level.
5
Fault protection output to indicate fault conditions including OVP, OC, and OT
FPO
IFB1 to IFB6
6,7,8,
10,11,12
Regulated current sink input pins
GND
9,
Analog ground
RFPWM /
MODE
13
Dimming frequency program pin with an external resistor / mode selection, see (1)
OVC
14
Over-voltage clamp pin / voltage feedback, see
PGND
15
Power ground
SW
16
Drain connection of the internal power FET
NC
17
No connection
FAULT
18
Fault pin to drive external ISO FET
VIN
19
Supply input pin
PWM
20
PWM signal input pin
(1)
(1)
See Application Information section for details.
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TYPICAL CHARACTERISTICS
TABLE OF GRAPHS
TITLE
DESCRIPTION
FIGURE
Efficiency vs Load current by output voltage
VIN = 12 V, VOUT = 28 V, 32 V, 36 V, L = 10 µH
Figure 2
Efficiency vs Load current by input voltage
VOUT = 32 V , VIN = 8 V, 12 V, 24 V, L = 10 µH
Figure 3
Efficiency vs PWM duty
VOUT = 32 V , VIN = 8 V, 12 V, 24 V, FDIM = 200 Hz, L = 10 µH, RISET = 62 kΩ
Figure 4
Dimming linearity
VOUT = 32 V, VIN = 8 V, 12 V, 24 V, FDIM = 20 KHz, L = 10 µH, RISET = 62 kΩ
Figure 5
Dimming linearity
VOUT = 32 V, VIN = 8 V, 12 V, 24 V, FDIM = 200 Hz, L = 10 µH, RISET = 62 kΩ
Figure 6
Boost switching frequency
VIN = 12 V, VOUT = 33.8 V, L = 10 µH, RISET = 62 kΩ
Figure 7
Phase shift dimming frequency
VIN = 12 V, VOUT = 33.8 V, L = 10 µH, RISET = 62 kΩ
Figure 8
Switch waveform
VIN = 8 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET = 62 kΩ
Figure 9
Switch waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET = 62 kΩ
Figure 10
Phase shift PWM dimming FDIM = 200Hz, duty = 50%
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 45%, L = 10 µH, RISET = 62 kΩ
Figure 11
Phase shift PWM dimming FDIM = 20KHz, duty = 50%
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 51%, L = 10 µH, RISET = 62 kΩ
Figure 12
Output ripple of Phase shift PWM dimming
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET = 62 kΩ
Figure 13
Output ripple of Phase shift PWM dimming
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 70%, L = 10 µH, RISET = 62 kΩ
Figure 14
Start up waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 100%, L = 10 µH, RISET = 62 kΩ
Figure 15
Start up waveform
VIN = 12 V, VOUT = 33.8 V, FDIM = 20 kHz, Duty = 50%, L = 10 µH, RISET = 62 kΩ
Figure 16
100
100
VI = 12 V
VO = 32 V
VO = 28 V
VO = 32 V
VO = 36 V
90
90
VI = 8 V
85
85
80
80
0
0.05
0.1
0.15
IL - Load current - A
0.2
0.25
0
0.05
Figure 2. Efficiency
0.1
0.15
IL - Load current - A
0.2
0.25
Figure 3. Efficiency
0.12
100
VI = 8 V
FDIM = 20 KHz
0.1
VI = 8 V
80
IO - Output Current - A
VI = 24 V
VI = 12 V
Efficiency - %
VI = 12 V
95
Efficiency - %
Efficiency - %
95
VI = 24 V
60
40
0.08
VI = 24 V
VI = 12 V
0.06
0.04
20
0.02
VO = 30 V
0
0
10
20
30
40
50
60
PWM duty - %
70
80
90
100
0
0
10
Figure 4. Efficiency
6
20
30
40
50
60
70
Dimming duty cycle - %
80
90
100
Figure 5. Output Current
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SLVSA85D – JUNE 2010 – REVISED FEBRUARY 2012
1100
0.12
VI = 8 V
FDIM = 200 Hz
1000
0.1
fs - Switching Frequency - Hz
IO - Output Current - A
VI = 8 V
0.08
VI = 12 V
VI = 24 V
0.06
0.04
0.02
0
0
900
800
700
600
10
20
30
40
50
60
70
Dimming duty cycle - %
80
90
100
500
500
600
Figure 6. Output Current
700
800
RFSLCT - kW
900
1000
Figure 7. Switching Frequency
20000
VI = 8 V
Dimming Frequency - Hz
15000
10000
5000
0
10
110
210
310
410
510
610
RFPWM - kW
710
810
910
Figure 8. Dimming Frequency
VO
100 mV/div
AC
VO
100 mV/div
AC
SW
20 V/div
DC
SW
20 V/div
DC
Inductor
Current
500 mA/div
DC
Inductor
Current
500 mA/div
DC
Figure 9. Switch Waveform
Figure 10. Switch Waveform
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IFB1
10 V/div
DC
IFB1
10 V/div
DC
IFB2
10 V/div
DC
IFB2
10 V/div
DC
IFB3
10 V/div
DC
IFB3
10 V/div
DC
Output
Current
50 mA/div
DC
Output
Current
50 mA/div
DC
Figure 11. Phase Shift Waveform
Figure 12. Phase Shift Waveform
IFB1
10 V/div
DC
IFB1
10 V/div
DC
IFB2
10 V/div
DC
VO
100 mV/div
AC
IFB2
10 V/div
DC
VO
100 mV/div
AC
Output
Current
50 mA/div
DC
Output
Current
50 mA/div
DC
Figure 13. Output Ripple Waveform
Figure 14. Output Ripple Waveform
EN
5 V/div
DC
EN
5 V/div
DC
VDDIO
5 V/div
DC
VDDIO
5 V/div
DC
VO
10 mV/div
DC
Output
Current
50 mA/div
DC
VO
10 mV/div
DC
Output
Current
50 mA/div
DC
Figure 15. Start Up Waveform
8
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Figure 16. Start Up Waveform
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SLVSA85D – JUNE 2010 – REVISED FEBRUARY 2012
FUNCTIONAL BLOCK DIAGRAM
Optional
L
Diode
VIN
C1
2.2uF
R6
OUTPUT
C4
C3
4.7uF
FAULT
VIN
VDDIO
19
1
NC
18
Linear
Regulator
Fault
Protection
17
SW
R4
16
Fault
Condition
OVP
Protection
OVC
14
OVC
C2
0.1uF
R
S
VDD_GPIO
R5
Q
Vref
PGND
15
Slope
Compensation
5
Optional
A
Comp
3
R3
FSLCT
R2
RFPWM
/ MODE
Oscillator
13
D
M
U
X
Vref
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
12
IFB1
EA
Maximum
LED current
Current Mirror
Selection
Logic
Dimming
Control
EN
PWM Signal
Generator
Phase
Shift
PWM
/
Direct
PWM
Direct PWM
PWM
Error
Amp
PWM Signal
Generator
/
MODE
selection
4
R1
RISETH
S
Detector
R7
RFPO
20
Frequency /
duty decoding
circuit
Duty
control
Signal
Current Sink
9
AGND
Current Sink
11
IFB2
Current Sink
10
IFB3
Current Sink
8
IFB4
Current Sink
7
IFB5
Current Sink
6
IFB6
oscillator
EN
2
Shutdown
IFB no use
OCP
Protection
TSD
Protection
Open / Short
LED
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DETAILED DESCRIPTION
NORMAL OPERATION
The TPS61187 is a high efficiency, high output voltage white LED driver for notebook panel backlighting
applications. The advantages of white LEDs compared to CCFL backlights are higher power efficiency and lower
profile design. Due to the large number of white LEDs required to provide backlighting for medium to large
display panels, the LEDs must be arranged in parallel strings of several LEDs in series. Therefore, the backlight
driver for battery powered systems is almost always a boost regulator with multiple current sink regulators.
Having more white LEDs in series reduces the number of parallel strings and therefore improves overall current
matching. However, the efficiency of the boost regulator declines due to the need for high output voltage. Also,
there must be enough white LEDs in series to ensure the output voltage stays above the input voltage range.
The TPS61187 IC has integrated all of the key function blocks to power and control up to 60 white LEDs. The
device includes a 40 V / 2 A boost regulator, six 30 mA current sink regulators, and a protection circuit for overcurrent, over-voltage, Open LED, Short LED, and output short circuit failures.
The TPS61187 integrates auto phase shifted PWM dimming methods with the PWM interface to reduce the
output ripple voltage and audible noise. An optional direct PWM mode is user selectable through the MODE
selection function.
SUPPLY VOLTAGE
The TPS61187 IC has a built-in linear regulator to supply the IC analog and logic circuit. The VDDIO pin, output
of the regulator, is connected to a 1 µF bypass capacitor for the regulator to be controlled in a stable loop.
VDDIO does not have high current sourcing capability for external use but it can be tied to the EN pin for start
up.
BOOST REGULATOR AND PROGRAMMABLE SWITCH FREQUENCY (FSCLT)
The fixed-frequency PWM boost converter uses current-mode control and has integrated loop compensation.
The internal compensation ensures stable output over the full input and output voltage ranges assuming the
recommended inductance and output capacitance values shown in the Typical Application – Phase Shift PWM
Mode figure are used. The output voltage of the boost regulator is automatically set by the IC to minimize voltage
drop across the IFB pins. The IC regulates the lowest IFB pin to 350 mV, and consistently adjusts the boost
output voltage to account for any changes in LED forward voltages. If the input voltage is higher than the sum of
the white LED forward voltage drops (e.g., at low duty cycles), the boost converter is not able to regulate the
output due to its minimum duty cycle limitation. In this case, increase the number of WLEDs in series or include
series ballast resistors in order to provide enough headroom for the converter to boost the output voltage. Since
the TPS61187 integrates a 2.0A/40V power MOSFET, the boost converter can provide up to a 38 V output
voltage.
The TPS61187 switching frequency can be programmed between 300 kHz to 1.0MHz by the resistor value on
the FSLCT pin according to Equation 1:
FSW =
5 ´ 1011
RFSLCT
(1)
Where: RFSLCT = FSCLT pin resistor
See Figure 7 for boost converter switching frequency adjustment resistor RFSLCT selection.
The adjustable switching frequency feature provides the user with the flexibility of choosing a faster switching
frequency, and therefore, an inductor with smaller inductance and footprint or slower switching frequency, and
therefore, potentially higher efficiency due to lower switching losses. Use Equation 1 or refer to Table 1 to select
the correct value:
Table 1. RFSLCT Recommendations
10
RFLCT
FSW
833K
600 KHz
625K
800 KHz
499K
1 MHz
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LED CURRENT SINKS
The six current sink regulators embedded in the TPS61187 can be collectively configured to provide up to a
maximum of 30 mA each. These six specialized current sinks are accurate to within ±2% max for currents at 20
mA, with a string-to-string difference of ±1.5% typical.
The IFB current must be programmed to the highest WLED current expected using the ISETH pin resistor and
Equation 2.
V
IFB = ISETH ´ KISET
RISETH
(2)
Where:
KISET = 980 (current multiple)
VISETH = 1.229V (ISETH pin voltage)
RISETH = ISETH pin resistor
ENABLE AND STARTUP
The internal regulator which provides VDDIO wakes up as soon as VIN is applied even when EN is low. This
allows the IC to start when EN is tied to the VDDIO pin. VDDIO does not come to full regulation until EN is high.
The TPS61187 checks the status of all current feedback channels and shuts down any unused feedback
channels. It is recommended to short the unused channels to ground for faster startup.
After the device is enabled, if the PWM pin is left floating, the output voltage of the TPS61187 regulates to the
minimum output voltage. Once the IC detects a voltage on the PWM pin, the TPS61187 begins to regulate the
IFB pin current, as pre-set per the ISETH pin resistor, according to the duty cycle of the signal on the PWM pin.
The boost converter output voltage rises to the appropriate level to accommodate the sum of the white LED
string with the highest forward voltage drops plus the headroom of the current sink at that current.
Pulling the EN pin low shuts down the IC, resulting in the IC consuming less than 11 µA in shutdown mode.
IFB PIN UNUSED
The TPS61187 has open/short string detection. For an unused IFB string, simply short it to ground or leave it
open. Shorting unused IFB pins to ground for faster startup is recommended.
BRIGHTNESS DIMMING CONTROL
The TPS61187 has auto phase shifted PWM dimming control with the PWM control interface.
The internal decoder block detects duty information from the input PWM signal, saves it in an eight bit register
and delivers it to the output PWM dimming control circuit. The output PWM dimming control circuit turns on/off
six output current sinks at the PWM frequency set by RFPWM and the duty cycle from the decoder block.
The TPS61187 also has direct PWM dimming control with the PWM control interface. In direct PWM mode, each
current sink turns on/off at the same frequency and duty cycle as the input PWM signal. See the Mode Selection
section for dimming mode selection.
When in phase shifted PWM mode, it is recommended to insert a series resistor of 10kΩ to 20kΩ value close to
PWMIN pin. This resistor together with an internal capacitor forms a low pass R-C filter with 30ns to 60ns time
constant. This prevents possible high frequency noises being coupled into the input PWM signal and causing
interference to the internal duty cycle decoding circuit. However, it is not necessary for direct PWM mode since
the duty cycle decoding circuit is disabled during the direct PWM mode.
ADJUSTBLE PWM DIMMING FREQUENCY AND MODE SELECTION (R_FPWM / MODE)
The TPS61187 can operate in auto phase shift mode or direct PWM mode. Tying the RFPWM/MODE pin to
VDDIO forces the IC to operate in direct PWM mode. A resistor between the RFPWM/MODE pin and ground
sets the IC into auto phase shift mode and the value of the resistor determines the PWM dimming frequency.
Use Equation 3 or refer to Table 2 to select the correct value:
FDIM =
1.818 ´ 108
RFPWM
(3)
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Where: RFPWM = RFPWM pin resistor
Table 2. RFPWM Recommendations
RFPWM
FDIM
866 kΩ
210 Hz
432 kΩ
420 Hz
174 kΩ
1.05 kHz
9.09 kΩ
20 kHz
MODE SELECTION – PHASE SHIFT PWM OR DIRECT PWM DIMMING
The phase shift PWM dimming method or direct PWM dimming method can be selected through the RFPWM
pin. By attaching an external resistor to the RFPWM pin, the default phase shift PWM mode can be selected. To
select direct PWM mode, the RFPWM pin needs to be tied to the VDDIO pin. The RFPWM/MODE pin can be
noise sensitive when R2 has high impedance. In this case, careful layout or a parallel bypassing capacitor
improves noise sensitivity but the value of the parallel capacitor may not exceed 33 pF for oscillator stability.
VDDIO
RFPWM
/MODE
RFPWM
/MODE
Pin13
R2
9.09 KW
Pin13
Figure 17. Phase Shift PWM Dimming Mode
Selection
Figure 18. Direct PWM Dimming Mode Selection
PHASE SHIFT PWM DIMMING
In phase shift PWM mode, all current feedback channels are turned on and off at FDIM frequency with a constant
delay. However, the number of used channels and PWM dimming frequency determine the delay time between
two neighboring channels per Equation 4.
1
T_delay =
n ´ FDIM
(4)
Where: n is the number of used channels
FDIM is the PWM dimming frequency which is determined by the value of RFPWM on the RFPWM pin. Figure 19
provides the detailed timing diagram of the phase shift PWM dimming mode.
In phase shift PWM mode, the internal decoder converts the duty cycle information from the applied PWM signal
at the PWM pin into an 8-bit digital signal and stores it into a register. The integrated dimming control circuit
reconstructs the PWM duty cycle per the register value and sends it to each of the current sinks. In order to
avoid any flickering while the duty cycle information is reconstructed from the register, one LSB (1/256) of duty
cycle hysteresis is included which results in 1/256 resolution when incrementing the applied signal's duty cycle
but 2/256 resolution when decrementing the duty cycle.
12
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PWM
25%
50 ms
IFB1
IFB2
IFB3
IFB4
IFB5
IFB6
8.33 ms
- PWM input 25%, Iset = 20 mA
- PWM output 20 kHz, T = 50 ms
n = 6, T/n = 8.33 ms
Figure 19. Phase Shift PWM Dimming Timing Diagram
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DIRECT PWM DIMMING
In direct PWM mode, all current feedback channels are turned on and off and are synchronized with the input
PWM signal.
PWM
IFB_CH1
IFB_CH2
IFB_CH3
IFB_CH4
IFB_CH5
IFB_CH6
Input PWM frequency and 6 - CH output dimming frequency are exactly same.
Figure 20. Direct PWM Dimming Timing Diagram
OVER VOLTAGE CLAMP / VOLTAGE FEEDBACK (OVC / FB)
The correct divider ratio is important for optimum operation of the TPS61187. Use the following guidelines to
choose the divider value. It can be noise sensitive if Rupper and Rdown have high impedance. Careful layout is
required. Also, choose lower resistance values for Rupper and Rdown when power dissipation allows.
Step1. Determine the maximum output voltage, VO, for the system according to the number of series WLEDs.
Step2. Select an Rupper resistor value (1 MΩ for a typical application; a lower value such as 100 kΩ for a noisy
environment).
Step3. Calculate Rdown using Equation 5.
æ Rupper
ö
VOVP = ç
+1÷ ´ VOV_TH
R
è down
ø
(5)
Where: VOV_TH = 1.95 V
When the IC detects that the OVC pin exceeds 1.95 V typical, indicating that the output voltage is over the set
threshold point, the OVC circuitry clamps the output voltage to the set threshold.
14
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CURRENT SINK OPEN PROTECTION
For the TPS61187, if one of the WLED strings is open, the IC automatically detects and disables that string. The
IC detects the open WLED string by sensing no current in the corresponding IFB pin. As a result, the IC
deactivates the open IFB pin and removes it from the voltage feedback loop. Subsequently, the output voltage
drops and is regulated to the minimum voltage required for the connected WLED strings. The IFB current of the
connected WLED strings remains in regulation.
If any IFB pin voltage exceeds the IFB over-voltage threshold (13.5 V typical), the IC turns off the corresponding
current sink and removes this IFB pin from the regulation loop. The current regulation of the remaining IFB pins
is not affected. This condition often occurs when there are several shorted WLEDs in one string. WLED
mismatch typically does not create large voltage differences among WLED strings.
The IC only shuts down if it detects that all of the WLED strings are open. If an open string is reconnected again,
a power-on reset (POR) or EN pin toggling is required to reactivate a previously deactivated string.
OVER CURRENT AND SHORT CIRCUIT PROTECTION
The TPS61187 has a pulse-by-pulse over-current limit of 2.0 A (min). The PWM switch turns off when the
inductor current reaches this current threshold. The PWM switch remains off until the beginning of the next
switching cycle. This protects the IC and external components during on overload conditions. When there is a
sustained over-current condition, the IC turns off and requires a POR or EN pin toggling to restart. Under severe
over-load and/or short circuit conditions, the boost output voltage can be pulled below the required regulated
voltage to keep all of the white LEDs operating. Under this condition, the current flows directly from input to
output through the inductor and schottky diode. To protect the TPS61187, the device shuts down immediately.
The IC restarts after input POR or EN pin toggling.
THERMAL PROTECTION
When the junction temperature of the TPS61187 is over 150°C, the thermal protection circuit is triggered and
shuts down the device immediately. Only a POR or EN pin toggling clears the protection and restarts the device.
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APPLICATION INFORMATION
INDUCTOR SELECTION
Because selection of the inductor affects power supply steady state operation, transient behavior, and loop
stability, the inductor is the most important component in switching power regulator design. There are three
specifications most important to the performance of the inductor: inductor value, dc resistance, and saturation
current. The TPS61187 is designed to work with inductor values between 10 µH and 47 µH. A 10 µH inductor is
typically available in a smaller or lower profile package, while a 47 µH inductor may produce higher efficiency
due to a slower switching frequency and/or lower inductor ripple. If the boost output current is limited by the overcurrent protection of the IC, using a 10 µH inductor and the highest switching frequency maximizes controller
output current capability.
Internal loop compensation for PWM control is optimized for the external component values, including typical
tolerances, recommended in Table 3. Inductor values can have ±20% tolerance with no current bias. When the
inductor current approaches saturation level, its inductance can decrease 20% to 35% from the 0 A value
depending on how the inductor vendor defines saturation. In a boost regulator, the inductor dc current can be
calculated with Equation 6.
Vout ´ Iout
IDC =
Vin ´ h
(6)
Where:
Vout = boost output voltage
Iout = boost output current
Vin = boost input voltage
η = power conversion efficiency, use 90% for TPS61187 applications
The inductor current peak-to-peak ripple can be calculated with Equation 7.
1
IPP =
1
1 ö
æ
L ´ ç
+
÷ ´ FS
è Vout - Vin Vin ø
(7)
Where:
IPP = inductor peak-to-peak ripple
L = inductor value
FS = Switching frequency
Vout = boost output voltage
Vin = boost input voltage
Therefore, the peak current seen by the inductor is calculated with Equation 8.
I
IP = IDC + PP
2
(8)
Select an inductor with a saturation current over the calculated peak current. To calculate the worst case inductor
peak current, use the minimum input voltage, maximum output voltage, and maximum load current.
Regulator efficiency is dependent on the resistance of its high current path and switching losses associated with
the PWM switch and power diode. Although the TPS61187 IC has optimized the internal switch resistances, the
overall efficiency is affected by the inductor dc resistance (DCR). Lower DCR improves efficiency. However,
there is a trade off between DCR and inductor footprint; furthermore, shielded inductors typically have higher
DCR than unshielded ones. Table 3 lists the recommended inductors.
16
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Table 3. Recommended Inductor for TPS61187
L(µH)
DCR(mΩ)
Isat(A)
Size (L × W × H mm)
A915AY – 4R7M
4.7
38
1.87
5.2 × 5.2 × 3.0
A915AY – 100M
10
75
1.24
5.2 × 5.2 × 3.0
SLF6028T – 4R7N1R6
4.7
38
1.87
5.2 × 5.2 × 3.0
SLF6028T – 4R7N1R6
10
75
1.24
5.2 × 5.2 × 3.0
TOKO
TDK
OUTPUT CAPACITOR SELECTION
The output capacitor is mainly selected to meet the requirement for output ripple and loop stability. This ripple
voltage is related to the capacitance of the capacitor and its equivalent series resistance (ESR). Assuming a
capacitor with zero ESR, the minimum capacitance needed for a given ripple can be calculated with Equation 9:
(Vout - Vin ) ´ Iout
Cout =
Vout ´ FS ´ Vripple
(9)
Where:
Vripple = peak-to-peak output ripple. The additional part of the ripple caused by ESR is calculated using:
Vripple_ESR = Iout x RESR
Due to its low ESR, Vripple_ESR can be neglected for ceramic capacitors, but must be considered if tantalum or
electrolytic capacitors are used. The controller output voltage also ripples due to the load transient that occurs
during PWM dimming. The TPS61187 adopts a patented technology to limit this type of output ripple even with
the minimum recommended output capacitance. In a typical application, the output ripple is less than 250 mV
during PWM dimming with a 4.7 µF output capacitor. However, the output ripple decreases with higher output
capacitances.
ISOLATION FET SELECTION
The TPS61187 provides a gate driver to an external P channel MOSFET which can be turned off during device
shutdown or fault condition. This MOSFET can provide a true shutdown function and also protect the battery
from output short circuit conditions. The source of the PMOS should be connected to the input, and a pull-up
resistor is required between the source and gate of the FET to keep the FET off during IC shutdown. To turn on
the isolation FET, the FAULT pin is pulled low and clamped at 8 V below the VBAT pin voltage. During device
shutdown or fault condition, the isolation FET is turned off, and the input voltage is applied on the isolation
MOSFET. During a short circuit condition, the catch diode (D2 in the typical application circuit) is forward biased
when the isolation FET is turned off. The drain of the isolation FET swings below ground. The voltage across the
isolation FET can be momentarily greater than the input voltage. Therefore, select a 30 V PMOS for a 24 V
maximum input. The on resistance of the FET has a large impact on power conversion efficiency since the FET
carries the input voltage. Select a MOSFET with Rds(on) less than 100 mΩ to limit the power losses.
LAYOUT CONSIDERATION
As for all switching power supplies, especially those providing high current and using high switching frequencies,
layout is an important design step. If layout is not carefully done, the regulator could show instability as well as
EMI problems. Therefore, use wide and short traces for high current paths. The input capacitor, C1 in the Typical
Application – Phase Shift PWM Mode figure, needs not only to be close to the VIN pin, but also to the GND pin
in order to reduce the input ripple seen by the IC. The input capacitor, C1 in the typical application circuit, should
also be placed close to the inductor. C2 is the filter and noise decoupling capacitor for the internal linear
regulator powering the internal digital circuits. It should be placed as close as possible between the VDDIO and
AGND pins to prevent any noise insertion to the digital circuits. The SW pin carries high current with fast rising
and falling edges. Therefore, the connection between the pin to the inductor and schottky diode should be kept
as short and wide as possible. It is also beneficial to have the ground of the output capacitor C3 close to the
PGND pin since there is a large ground return current flowing between them. When laying out signal grounds, it
is recommended to use short traces separated from power ground traces, and connect them together at a single
point, for example on the thermal pad. The thermal pad needs to be soldered on to the PCB and connected to
the GND pin of the IC. An additional thermal via can significantly improve power dissipation of the IC.
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REVISION HISTORY
Changes from Original (June 2010) to Revision A
Page
•
Changed Typical Application graphic ................................................................................................................................... 1
•
Changed cermaic capacitor value, attached to VDDIO, from 0.1 to 1.0 µF ......................................................................... 5
•
Changed bypass capacitor value in SUPPLY VOLTAGE section from 0.1 to 1.0 µF. ....................................................... 10
•
Changed BRIGHTNESS DIMMING CONTROL section ..................................................................................................... 11
•
Deleted PWM BRIGHTNESS CONTROL INTERFACE section ......................................................................................... 12
Changes from Revision A (July 2010) to Revision B
•
Page
Changed in ABS MAX table, in row "All other pins", MAX col: from 3.6 to 3.7 .................................................................... 2
Changes from Revision B (April 2011) to Revision C
Page
•
Changed From: TPS61187 To: TPS61187RTJ in the PACKAGE INFORMATION table .................................................... 2
•
Added a description paragraph and replaced Figure 19 in the PHASE SHIFT PWM DIMMING section .......................... 12
Changes from Revision C (September 2011) to Revision D
Page
•
Changed Figure 2 X axis unit from mA to A ......................................................................................................................... 6
•
Changed Figure 3 X axis unit from mA to A ......................................................................................................................... 6
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PACKAGE OPTION ADDENDUM
www.ti.com
5-May-2012
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
TPS61187RTJR
ACTIVE
QFN
RTJ
20
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
TPS61187RTJT
ACTIVE
QFN
RTJ
20
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-May-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPS61187RTJR
QFN
RTJ
20
3000
330.0
12.4
4.25
4.25
1.15
8.0
12.0
Q2
TPS61187RTJT
QFN
RTJ
20
250
180.0
12.4
4.25
4.25
1.15
8.0
12.0
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-May-2012
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS61187RTJR
QFN
RTJ
20
3000
346.0
346.0
29.0
TPS61187RTJT
QFN
RTJ
20
250
210.0
185.0
35.0
Pack Materials-Page 2
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