TI TPS62290DRVR

TPS62290
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SLVS764 – JUNE 2007
1-A Step Down Converter in 2 x 2 SON Package
FEATURES
DESCRIPTION
High Efficiency Step Down Converter
Output Current up to 1000 mA
VIN Range From 2.3 V to 6 V
2.25 MHz Fixed Frequency Operation
Power Save Mode at Light Load Currents
Output Voltage Accuracy in PWM mode ±1.5%
Typ. 15-µA Quiescent Current
100% Duty Cycle for Lowest Dropout
Voltage Positioning at Light Loads
Available in a 2 × 2 × 0,8 mm SON Package
APPLICATIONS
•
•
•
•
•
•
TPS62290DRV
VIN
CIN
GND
MODE
VOUT 1.8 V,
1000 mA
L1
2.2 mH
R1
360 kW
10 mF
The TPS62290 operates at 2.25-MHz fixed switching
frequency and enters Power Save Mode operation at
light load currents to maintain high efficiency over
the entire load current range.
The TPS62290 is available in a 2 mm × 2 mm 6 pin
SON package.
SW
EN
With an input voltage range of 2.3 V to 6 V, the
device supports batteries with extended voltage
range and are ideal to power portable applications
like mobile phones and other portable equipment.
The Power Save Mode is optimized for low output
voltage ripple. For low noise applications, the device
can be forced into fixed frequency PWM mode by
pulling the MODE pin high. In the shutdown mode,
the current consumption is reduced to less than
1 µA. TPS62290 allows the use of small inductors
and capacitors to achieve a small solution size.
Cell Phones, Smart-phones
WLAN
PDAs, Pocket PCs
Low Power DSP Supply
Portable Media Players
POL
VIN 2.7 V to 6 V
The TPS62290 device is a high efficient synchronous
step down dc-dc converter optimized for battery
powered portable applications. It provides up to
1000-mA output current from a single Li-Ion cell.
C1
22 pF
100
VIN = 4.2 V
90
VIN = 3.8 V
COUT
10 mF
80
FB
R2
180 kW
Efficiency - %
•
•
•
•
•
•
•
•
•
•
70
VIN = 5 V
VIN = 4.5 V
60
50
40
VOUT = 3.3 V,
MODE = GND,
L = 2.2 mH
30
0.00001 0.0001 0.001
0.01
0.1
IO - Output Current - A
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
TPS62290
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SLVS764 – JUNE 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ORDERING INFORMATION
TA
PART
NUMBER (1)
OUTPUT
VOLTAGE (2)
PACKAGE (3)
PACKAGE
DESIGNATOR
ORDERING
PACKAGE
MARKING
–40°C to 85°C
TPS62290
adjustable
SON 2 x 2
DRV
TPS62290DRV
BYN
(1)
(2)
(3)
The DRV package is available in tape on reel. Add R suffix to order quantities of 3000 parts per reel.
Contact TI for other fixed output voltage options
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted) (1)
VALUE
VI
Input voltage
range (2)
–0.3 to 7
–0.3 to VIN +0.3, ≤ 7
Voltage range at EN, MODE
Voltage on SW
ESD rating (3)
Internally limited
HBM Human body model
2
CDM Charge device model
1
Machine model
A
kV
200
V
TJ
Maximum operating junction temperature
–40 to 125
Tstg
Storage temperature range
–65 to 150
(2)
(3)
V
–0.3 to 7
Peak output current
(1)
UNIT
°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to network ground terminal.
The human body model is a 100-pF capacitor discharged through a 1.5-kΩ resistor into each pin. The machine model is a 200-pF
capacitor discharged directly into each pin.
DISSIPATION RATINGS
PACKAGE
RθJA
POWER RATING FOR TA≤ 25°C
DERATING FACTOR ABOVE TA = 25°C
DRV
76°C/W
1300 mW
13 mW/°C
RECOMMENDED OPERATING CONDITIONS
MIN
VIN
2
Supply voltage
NOM
MAX
2
6
UNIT
V
Output voltage range for adjustable voltage
0.6
VIN
V
TA
Operating ambient temperature
–40
85
°C
TJ
Operating junction temperature
–40
125
°C
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ELECTRICAL CHARACTERISTICS
Over full operating ambient temperature range, typical values are at TA = 25°C. Unless otherwise noted, specifications apply
for condition VIN = EN = 3.6V. External components CIN = 4.7µF 0603, COUT = 10µF 0603, L = 2.2µH, refer to parameter
measurement information.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
SUPPLY
VI
Input voltage range
2.3
6
VIN 2.7 V to 6 V
IO
Output current
IQ
Operating quiescent current
ISD
Shutdown current
UVLO
Undervoltage lockout threshold
V
1000
VIN 2.5 V to 2.7 V
600
VIN 2.3 V to 2.5 V
300
mA
IO = 0 mA, PFM mode enabled
(MODE = GND) device not switching,
See (1)
15
µA
IO = 0 mA, switching with no load
(MODE = VIN) PWM operation,
VO = 1.8 V, VIN = 3V
3.8
mA
EN = GND
0.1
Falling
1.85
Rising
1.95
1
µA
V
ENABLE, MODE
VIH
High level input voltage, EN,
MODE
2.3 V ≤ VIN ≤ 6 V
1
VIN
VIL
Low level input voltage, EN,
MODE
2.3 V ≤ VIN ≤ 6 V
0
0.4
II
Input bias current, EN, MODE
EN, MODE = GND or VIN
0.01
1
240
480
185
380
1.4
1.68
V
V
µA
POWER SWITCH
RDS(on)
ILIMF
TSD
High side MOSFET on-resistance
Low side MOSFET on-resistance
VIN = VGS = 3.6 V, TA = 25°C
Forward current limit MOSFET
high-side and low side
VIN = VGS = 3.6 V
Thermal shutdown
Increasing junction temperature
140
Thermal shutdown hysteresis
Decreasing junction temperature
20
1.19
mΩ
A
°C
OSCILLATOR
fSW
Oscillator frequency
2.3 V ≤ VIN ≤ 6 V
2.0
2.25
2.5
MHz
VI
V
OUTPUT
VO
Adjustable output voltage range
Vref
Reference voltage
0.6
600
VFB(PWM)
Feedback voltage
MODE = VIN, PWM operation,
2.3 V ≤ VIN ≤ 6 V, See (2)
VFB(PFM)
Feedback voltage PFM mode
MODE = GND, device in PFM mode,
+1% voltage positioning active, See (1)
Load regulation
–1.5%
0
- 0.5
%/A
500
µs
µs
tStart Up
Start-up time
tRamp
VO ramp-up time
Time to ramp from 5% to 95% of VO
250
Leakage current into SW pin
VI = 3.6 V, VI = VO = VSW, EN = GND,
See (3)
0.1
(1)
(2)
(3)
1.5%
1%
Time from active EN to reach 95% of
VO
Ilkg
mV
1
µA
In PFM mode, the internal reference voltage is set to typ. 1.01 × Vref . See the parameter measurement information.
For VIN = VO + 1.0 V
In fixed output voltage versions, the internal resistor divider network is disconnected from FB pin.
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PIN ASSIGNMENTS
DRV PACKAGE
(TOP VIEW)
SW
MODE
FB
1
2
3
D 6
PA 5
r
we
4
Po
GND
VIN
EN
TERMINAL FUNCTIONS
TERMINAL
NAME
I/O
NO.
DESCRIPTION
VIN
5
PWR
VIN power supply pin.
GND
6
PWR
GND supply pin
EN
4
I
SW
1
OUT
This is the switch pin and is connected to the internal MOSFET switches. Connect the external inductor
between this terminal and the output capacitor.
FB
3
I
Feedback Pin for the internal regulation loop. Connect the external resistor divider to this pin. In case of
fixed output voltage option, connect this pin directly to the output capacitor
MODE
2
I
MODE pin = high forces the device to operate in fixed-frequency PWM mode. Mode pin = low enables
the Power Save Mode with automatic transition from PFM mode to fixed-frequency PWM mode.
This is the enable pin of the device. Pulling this pin to low forces the device into shutdown mode.
Pulling this pin to high enables the device. This pin must be terminated.
FUNCTIONAL BLOCK DIAGRAM
VIN
Current
Limit Comparator
VIN
Undervoltage
Lockout 1.8 V
Thermal
Shutdown
Limit
High Side
EN
Reference
0.6 V VREF
FB
PFM Comp .
+1% Voltage positioning
VREF + 1%
Mode
MODE
Softstart
VOUT RAMP
CONTROL
Error Amp
Control
Stage
Gate Driver
Anti
Shoot-Through
SW1
VREF
Integrator
FB
FB
Zero-Pole
AMP.
PWM
Comp .
Limit
RI1
Low Side
Int. Resistor
Network
RI3
RI..N
Sawtooth
Generator
Current
Limit Comparator
2.25 MHz
Oscillator
GND
4
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GND
TPS62290
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SLVS764 – JUNE 2007
PARAMETER MEASUREMENT INFORMATION
TPS62290DRV
VIN
C IN
10 mF
SW
R1
EN
GND
L1
2 .2 mH
V OUT
C1
22 pF
C OUT
10 mF
FB
MODE
R2
L: LPS3015 2.2 mH, 110 mW
CIN: GRM188R60J106M 10 mF Murata 0603 size
COUT: GRM188R60J106M 10 mF Murata 0603 size
TYPICAL CHARACTERISTICS
Table 1. Table Of Graphs
FIGURE
Efficiency
vs VO 1.8 V Power Save Mode
Figure 1
Efficiency
vs VO 1.8 V Forced Save Mode
Figure 2
Efficiency
vs VO 3.3 V Power Save Mode
Figure 3
Efficiency
vs VO 3.3 V Forced Save Mode
Figure 4
VO ACCURACY
Figure 5
PFM LOAD TRANSIENT
Figure 6
PFM LINE TRANSIENT
Figure 7
PWM LOAD TRANSIENT
Figure 8
PWM LINE TRANSIENT
Figure 9
TYPICAL OPERATION PFM
MODE
Figure 10
TYPICAL OPERATION PWM
MODE
Figure 11
Shutdown Current Into VIN
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
Figure 12
Quiescent Current
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
Figure 13
Static Drain-Source On-State
Resistance
vs Input Voltage, (TA = 85°C, TA = 25°C, TA = -40°C)
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Figure 14
Figure 15
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EFFICIENCY (Power Save Mode)
vs
OUTPUT CURRENT
EFFICIENCY (Forced PWM Mode)
vs
OUTPUT CURRENT
100
100
VIN = 2.7 V
90
L = 2.2 mH
VIN = 3.3 V
VIN = 3.3 V
VIN = 4.5 V
Efficiency - %
Efficiency - %
80
VIN = 3.6 V
80
70
VIN = 5 V
60
50
30
0.01
VIN = 2.7 V
VIN = 4.5 V
50
VIN = 3.6 V
20
0.1
100
10
1
IO - Output Current - mA
1000
100
10
IO - Output Current - mA
1
Figure 1.
Figure 2.
EFFICIENCY (Power Save Mode)
vs
OUTPUT CURRENT
EFFICIENCY (Forced PWM Mode)
vs
OUTPUT CURRENT
1000
100
VIN = 4.2 V
VIN = 3.8 V
80
VIN = 3.8 V
80
VIN = 5 V
VIN = 5 V
70
Efficiency - %
VIN = 4.5 V
70
60
60
VIN = 4.5 V
50
40
30
VOUT = 3.3 V,
MODE = GND,
L = 2.2 mH
40
30
0.01
VIN = 4.2 V
90
50
20
VOUT = 3.3 V,
MODE = VIN,
10
L = 2.2 mH
0
0.1
100
10
1
IO - Output Current - mA
1000
1
Figure 3.
6
VIN = 5 V
60
30
100
Efficiency - %
70
40
VOUT = 1.8 V,
MODE = GND,
L = 2.2 mH
40
90
VOUT = 1.8 V,
MODE = VIN,
90
100
10
IO - Output Current - mA
Figure 4.
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OUTPUT VOLTAGE ACCURACY
vs
OUTPUT CURRENT
PFM LOAD TRANSIENT
1.854
SW 2V/Div
MODE = VIN,
L = 2.2 mH
1.836
DC Output Voltage - V
VIN = 2.7 V, TA = -40°C
VOUT 50 mV/Div
VIN = 3.6 V, TA = -40°C
1.818
VIN 3.6 V,
VOUT 1.8 V,
IOUT 50 mA to 250 mA,
250 mA
MODE = GND
VIN = 4.5 V, TA = -40°C
1.8
1.782
VIN = 2.7 V,
TA = 25°C
VIN = 4.5 V,
TA = 85°C
VIN = 3.6 V,
TA = 25°C
1.764
1.746
0.01
VIN = 3.6 V,
TA = 85°C
VIN = 4.5 V,
TA = 25°C
0.1
IOUT 200 mA/Div
50 mA
VIN = 2.7 V,
TA = 85°C
1
10
100
IO - Output Current - mA
Icoil 500 mA/Div
1000
Time Base - 20 ms/Div
Figure 5.
Figure 6.
PFM LINE TRANSIENT
PWM LOAD TRANSIENT
VIN 3.6 V,
VOUT 1.8 V,
IOUT 300 mA to 800 mA,
MODE = GND VOUT 100 mV/Div
IOUT 500 mA/Div
VIN 3.6 V to 4.2 V
500 mV/Div
800 mA
300 mA
VOUT = 1.8 V,
50 mV/Div,
IOUT = 50 mA,
MODE = GND
Icoil 500 mA/Div
Time Base - 100 ms/Div
Time Base - 20 ms/Div
Figure 7.
Figure 8.
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TYPICAL OPERATION
vs
PFM MODE
PWM LINE TRANSIENT
VIN 3.6 V to 4.2 V,
500 mV/Div
VOUT 20 mV/Div
VIN 3.6 V,
VOUT 1.8 V, IOUT 10 mA,
L 2.2 mH, COUT 10 mF 0603
SW 2 V/Div
VOUT = 1.8 V,
50 mV/Div,
IOUT = 250 mA,
MODE = GND
Icoil 200 mA/Div
Time Base - 100 ms/Div
Time Base - 10 ms/Div
Figure 9.
Figure 10.
TYPICAL OPERATION
vs
PWM MODE
SHUTDOWN CURRENT INTO VIN
vs
INPUT VOLTAGE
0.8
VIN 3.6 V,
VOUT 1.8 V, IOUT 150 mA,
L 2.2 mH, COUT 10 mF 0603
SW 2 V/Div
Icoil 200 mA/Div
ISD - Shutdown Current Into VIN − mA
VOUT 10 mV/Div
EN = GND
0.7
0.6
o
TA = 85 C
0.5
0.4
0.3
0.2
o
o
TA = 25 C
TA = -40 C
0.1
0
Time Base - 10 ms/Div
2
2.5
3
3.5
4
4.5
VIN − Input Voltage − V
Figure 11.
8
Figure 12.
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5.5
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QUIESCENT CURRENT
vs
INPUT VOLTAGE
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
INPUT VOLTAGE
MODE = GND,
EN = VIN,
Devise Not Switching
TA = 85oC
16
o
TA = 25 C
14
12
TA = -40oC
10
8
2
2.5
3
3.5
4
4.5
5
5.5
6
VIN − Input Voltage − V
High Side Switching
0.7
0.6
o
TA = 85 C
0.5
o
TA = 25 C
0.4
0.3
0.2
TA = -40oC
0.1
0
2
2.5
3
3.5
4
4.5
5
VIN − Input Voltage − V
Figure 13.
Figure 14.
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
INPUT VOLTAGE
RDS(on) - Static Drain-Source On-State Resistance − W
IQ - Quiescent Current − mA
18
0.8
RDS(on) - Static Drain-Source On-State Resistance − W
20
0.4
Low Side Switching
0.35
0.3
o
TA = 85 C
0.25
o
TA = 25 C
0.2
0.15
0.1
TA = -40oC
0.05
0
2
2.5
3
3.5
4
4.5
5
VIN − Input Voltage − V
Figure 15.
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DETAILED DESCRIPTION
OPERATION
The TPS62290 step down converter operates with typically 2.25-MHz fixed frequency pulse width modulation
(PWM) at moderate to heavy load currents. At light load currents, the converter can automatically enter Power
Save Mode and operates then in PFM mode.
During PWM operation, the converter use a unique fast response voltage mode controller scheme with input
voltage feed-forward to achieve good line and load regulation allowing the use of small ceramic input and output
capacitors. At the beginning of each clock cycle initiated by the clock signal, the High Side MOSFET switch is
turned on. The current flows now from the input capacitor via the High Side MOSFET switch through the
inductor to the output capacitor and load. During this phase, the current ramps up until the PWM comparator
trips and the control logic turns off the switch. The current limit comparator also turns off the switch if the current
limit of the High Side MOSFET switch is exceeded. After a dead time preventing shoot through current, the Low
Side MOSFET rectifier is turned on and the inductor current ramps down. The current flows now from the
inductor to the output capacitor and to the load. It returns to the inductor through the Low Side MOSFET
rectifier.
The next cycle is initiated by the clock signal again turning off the Low Side MOSFET rectifier and turning on the
on the High Side MOSFET switch.
POWER SAVE MODE
The Power Save Mode is enabled with MODE Pin set to low level. If the load current decreases, the
converter will enter Power Save Mode operation automatically. During Power Save Mode the converter skips
switching and operates with reduced frequency in PFM mode with a minimum quiescent current to maintain
high efficiency. The converter will position the output voltage typically +1% above the nominal output
voltage. This voltage positioning feature minimizes voltage drops caused by a sudden load step.
The transition from PWM mode to PFM mode occurs once the inductor current in the Low Side MOSFET
switch becomes zero, which indicates discontinuous conduction mode.
During the Power Save Mode the output voltage is monitored with a PFM comparator. As the output voltage
falls below the PFM comparator threshold of VOUT nominal +1%, the device starts a PFM current pulse. For
this the High Side MOSFET switch will turn on and the inductor current ramps up. After the On-time expires,
the switch is turned off and the Low Side MOSFET switch is turned on until the inductor current becomes
zero.
The converter effectively delivers a current to the output capacitor and the load. If the load is below the
delivered current, the output voltage will rise. If the output voltage is equal or higher than the PFM
comparator threshold, the device stops switching and enters a sleep mode with typical 15µA current
consumption.
If the output voltage is still below the PFM comparator threshold, a sequence of further PFM current pulses
are generated until the PFM comparator threshold is reached. The converter starts switching again once the
output voltage drops below the PFM comparator threshold.
With a fast single threshold comparator, the output voltage ripple during PFM mode operation can be kept
small. The PFM Pulse is time controlled, which allows to modify the charge transferred to the output
capacitor by the value of the inductor. The resulting PFM output voltage ripple and PFM frequency depend
in first order on the size of the output capacitor and the inductor value. Increasing output capacitor values
and inductor values will minimize the output ripple. The PFM frequency decreases with smaller inductor
values and increases with larger values.
The PFM mode is left and PWM mode entered in case the output current can not longer be supported in
PFM mode. The Power Save Mode can be disabled through the MODE pin set to high. The converter will
then operate in fixed frequency PWM mode.
Dynamic Voltage Positioning
This feature reduces the voltage under/overshoots at load steps from light to heavy load and vice versa. It is
active in Power Save Mode and regulates the output voltage 1% higher than the nominal value. This provides
more headroom for both the voltage drop at a load step, and the voltage increase at a load throw-off.
10
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DETAILED DESCRIPTION (continued)
Output voltage
Voltage Positioning
Vout +1%
PFM Comparator
threshold
Light load
PFM Mode
Vout (PWM)
moderate to heavy load
PWM Mode
Figure 16. Power Save Mode Operation
100% Duty Cycle Low Dropout Operation
The device starts to enter 100% duty cycle Mode once the input voltage comes close the nominal output
voltage. To maintain the output voltage, the High Side MOSFET switch is turned on 100% for one or more
cycles.
With further decreasing VIN the High Side MOSFET switch is turned on completely. In this case, the converter
offers a low input-to-output voltage difference. This is particularly useful in battery-powered applications to
achieve longest operation time by taking full advantage of the whole battery voltage range.
The minimum input voltage to maintain regulation depends on the load current and output voltage, and can be
calculated as:
VINmin = VOmax + IOmax × (RDS(on)max + RL)
With:
IOmax = maximum output current plus inductor ripple current
RDS(on)max = maximum P-channel switch RDS(on).
RL = DC resistance of the inductor
VOmax = nominal output voltage plus maximum output voltage tolerance
Undervoltage Lockout
The undervoltage lockout circuit prevents the device from malfunctioning at low input voltages and from
excessive discharge of the battery and disables the output stage of the converter. The undervoltage lockout
threshold is typically 1.85V with falling VIN.
MODE SELECTION
The MODE pin allows mode selection between forced PWM mode and Power Save Mode.
Connecting this pin to GND enables the Power Save Mode with automatic transition between PWM and PFM
mode. Pulling the MODE pin high forces the converter to operate in fixed frequency PWM mode even at light
load currents. This allows simple filtering of the switching frequency for noise sensitive applications. In this
mode, the efficiency is lower compared to the power save mode during light loads.
The condition of the MODE pin can be changed during operation and allows efficient power management by
adjusting the operation mode of the converter to the specific system requirements.
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DETAILED DESCRIPTION (continued)
ENABLE
The device is enabled setting EN pin to high. During the start up time tStart Up the internal circuits are settled.
Afterwards, the device activates the soft start circuit. The EN input can be used to control power sequencing in a
system with various dc/dc converters. The EN pin can be connected to the output of another converter, to drive
the EN pin high and getting a sequencing of supply rails. With EN = GND, the device enters shutdown mode. In
this mode, all circuits are disabled. In fixed output voltage versions, the internal resistor divider network is
disconnected from FB pin.
SOFT START
The TPS62290 has an internal soft start circuit that controls the ramp up of the output voltage. The output
voltage ramps up from 5% to 95% of its nominal value within typical 250µs. This limits the inrush current in the
converter during ramp up and prevents possible input voltage drops when a battery or high impedance power
source is used. The soft start circuit is enabled within the start up time tStart Up.
SHORT-CIRCUIT PROTECTION
The High Side and Low Side MOSFET switches are short-circuit protected with maximum switch current = ILIMF.
The current in the switches is monitored by current limit comparators. Once the current in the High Side
MOSFET switch exceeds the threshold of it's current limit comparator, it turns off and the Low Side MOSFET
switch is activated to ramp down the current in the inductor and High Side MOSFET switch. The High Side
MOSFET switch can only turn on again, once the current in the Low Side MOSFET switch has decreased below
the threshold of its current limit comparator.
THERMAL SHUTDOWN
As soon as the junction temperature, TJ, exceeds 140°C (typical) the device goes into thermal shutdown. In this
mode, the High Side and Low Side MOSFETs are turned-off. The device continues its operation when the
junction temperature falls below the thermal shutdown hysteresis.
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APPLICATION INFORMATION
TPS62290DRV
VIN 2.7 V to 6 V
VIN
CIN
2.2 mH
SW
R1
EN
10 mF
GND
L1
360 kW
COUT
FB
10 mF
R2
MODE
VOUT 1.8 V,
1000 mA
C1
22 pF
180 kW
Figure 17. TPS62290DRV Adjustable 1.8 V
TPS62290DRV
VIN 3.7 V to 6 V
VIN
CIN
GND
MODE
2.2 mH
SW
R1
EN
10 mF
L1
820 kW
VOUT 3.3 V,
1000 mA
C1
22 pF
COUT
FB
R2
10 mF
182 kW
Figure 18. TPS62290DRV Adjustable 3.3 V
OUTPUT VOLTAGE SETTING
The output voltage can be calculated to:
R
V OUT + VREF
1) 1
R2
with an internal reference voltage VREF typical 0.6V.
ǒ
Ǔ
To minimize the current through the feedback divider network, R2 should be 180 kΩ or 360 kΩ. The sum of R1
and R2 should not exceed ~1MΩ, to keep the network robust against noise. An external feed forward capacitor
C1 is required for optimum load transient response. The value of C1 should be in the range between 22pF and
33pF.
Route the FB line away from noise sources, such as the inductor or the SW line.
OUTPUT FILTER DESIGN (INDUCTOR AND OUTPUT CAPACITOR)
The TPS62260 is designed to operate with inductors in the range of 1.5µH to 4.7µH and with output capacitors
in the range of 4.7µF to 22µF. The part is optimized for operation with a 2.2µH inductor and 10µF output
capacitor. Larger or smaller inductor values can be used to optimize the performance of the device for specific
operation conditions. For stable operation, the L and C values of the output filter may not fall below 1µH effective
inductance and 3.5µF effective capacitance.
Inductor Selection
The inductor value has a direct effect on the ripple current. The selected inductor has to be rated for its dc
resistance and saturation current. The inductor ripple current (∆IL) decreases with higher inductance and
increases with higher VI or VO.
The inductor selection has also impact on the output voltage ripple in PFM mode. Higher inductor values will
lead to lower output voltage ripple and higher PFM frequency, lower inductor values will lead to a higher output
voltage ripple but lower PFM frequency.
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13
TPS62290
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SLVS764 – JUNE 2007
APPLICATION INFORMATION (continued)
Equation 1 calculates the maximum inductor current under static load conditions. The saturation current of the
inductor should be rated higher than the maximum inductor current as calculated with Equation 2. This is
recommended because during heavy load transient the inductor current will rise above the calculated value.
DI L + Vout
1 * Vout
Vin
ƒ
L
I Lmax + I outmax )
(1)
DI L
2
(2)
With:
f = Switching Frequency (2.25MHz typical)
L = Inductor Value
∆IL = Peak to Peak inductor ripple current
ILmax = Maximum Inductor current
A more conservative approach is to select the inductor current rating just for the maximum switch current of the
corresponding converter.
Accepting larger values of ripple current allows the use of low inductance values, but results in higher output
voltage ripple, greater core losses, and lower output current capability.
The total losses of the coil have a strong impact on the efficiency of the dc/dc conversion and consist of both the
losses in the dc resistance (R(DC)) and the following frequency-dependent components:
• The losses in the core material (magnetic hysteresis loss, especially at high switching frequencies)
• Additional losses in the conductor from the skin effect (current displacement at high frequencies)
• Magnetic field losses of the neighboring windings (proximity effect)
• Radiation losses
Table 2. List of Inductors
DIMENSIONS [mm3]
INDUCTOR TYPE
SUPPLIER
3 × 3 × 1.5
LPS3015
Coilcraft
Output Capacitor Selection
The advanced fast-response voltage mode control scheme of the TPS62290 allows the use of tiny ceramic
capacitors. Ceramic capacitors with low ESR values have the lowest output voltage ripple and are
recommended. The output capacitor requires either an X7R or X5R dielectric. Y5V and Z5U dielectric
capacitors, aside from their wide variation in capacitance over temperature, become resistive at high
frequencies.
At nominal load current, the device operates in PWM mode and the RMS ripple current is calculated as:
1 * Vout
1
Vin
I RMSCout + Vout
ƒ
L
2
Ǹ3
(3)
At nominal load current, the device operates in PWM mode and the overall output voltage ripple is the sum of
the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and
discharging the output capacitor:
DVout + Vout
1 * Vout
Vin
L
ƒ
ǒ8
1
Cout
ƒ
Ǔ
) ESR
(4)
At light load currents the converter operates in Power Save Mode and the output voltage ripple is dependent on
the output capacitor and inductor value. Larger output capacitor and inductor values minimize the voltage ripple
in PFM mode and tighten dc output accuracy in PFM mode.
14
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TPS62290
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SLVS764 – JUNE 2007
Input Capacitor Selection
The buck converter has a natural pulsating input current; therefore, a low ESR input capacitor is required for
best input voltage filtering and minimizing the interference with other circuits caused by high input voltage
spikes. For most applications, a 10-µF ceramic capacitor is recommended. The input capacitor can be increased
without any limit for better input voltage filtering.
Take care when using only small ceramic input capacitors. When a ceramic capacitor is used at the input and
the power is being supplied through long wires, such as from a wall adapter, a load step at the output or VIN step
on the input can induce ringing at the VIN pin. The ringing can couple to the output and be mistaken as loop
instability or could even damage the part by exceeding the maximum ratings.
Table 3. List of Capacitor
CAPACITANCE
TYPE
SIZE
SUPPLIER
10µF
GRM188R60J106M69D
0603 1.6x0.8x0.8mm3
Murata
LAYOUT CONSIDERATIONS
As for all switching power supplies, the layout is an important step in the design. Proper function of the device
demands careful attention to PCB layout. Care must be taken in board layout to get the specified performance. If
the layout is not carefully done, the regulator could show poor line and/or load regulation, stability issues as well
as EMI problems. It is critical to provide a low inductance, impedance ground path. Therefore, use wide and
short traces for the main current paths. The input capacitor should be placed as close as possible to the IC pins
as well as the inductor and output capacitor.
Connect the GND Pin of the device to the Power Pad of the PCB and use this Pad as a star point. Use a
common Power GND node and a different node for the Signal GND to minimize the effects of ground noise.
Connect these ground nodes together to the Power Pad (star point) underneath the IC. Keep the common path
to the GND PIN, which returns the small signal components and the high current of the output capacitors as
short as possible to avoid ground noise. The FB line should be connected right to the output capacitor and
routed away from noisy components and traces (e.g., SW line).
Submit Documentation Feedback
15
TPS62290
www.ti.com
SLVS764 – JUNE 2007
VOUT
R2
GND
C1
R1
COUT
CIN
VIN
L
G
N
D
U
Figure 19. Layout
16
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PACKAGE OPTION ADDENDUM
www.ti.com
23-Jul-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TPS62290DRVR
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62290DRVRG4
ACTIVE
SON
DRV
6
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62290DRVT
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TPS62290DRVTG4
ACTIVE
SON
DRV
6
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
27-Jun-2007
TAPE AND REEL INFORMATION
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
27-Jun-2007
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
TPS62290DRVR
DRV
6
NSE
179
8
2.2
2.2
1.2
4
8
Q2
TPS62290DRVT
DRV
6
NSE
179
8
2.2
2.2
1.2
4
8
Q2
TAPE AND REEL BOX INFORMATION
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
TPS62290DRVR
DRV
6
NSE
195.0
200.0
45.0
TPS62290DRVT
DRV
6
NSE
195.0
200.0
45.0
Pack Materials-Page 2
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