bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 SINGLE-CHIP CHARGER AND DC/DC CONVERTER IC FOR PORTABLE APPLICATIONS FEATURES • • • • • • DESCRIPTION Li-Ion Or Li-Pol Charge Management and Synchronous DC-DC Power Conversion In a Single Chip Charges and Powers the System from Either the AC Adapter or USB with Autonomous Power Source Selection Integrated USB Charge Control with Selectable 100 mA and 500 mA Charge Rates Integrated Power FET and Current Sensor for Up to 500 mA Charge Applications AND 300 mA DC-DC Controller with Integrated FETs Reverse Leakage Protection Prevents Battery Drainage Automatic Power Save Mode For High Efficiency at Low Current, or Forced PWM for Frequency Sensitive Applications The bq25015/7 are highly integrated charge and power management devices targeted at space-limited bluetooth applications. The bq25015/7 devices offer integrated power FET and current sensor for charge control, reverse blocking protection, high accuracy current and voltage regulation, charge status, charge termination, and a highly efficient and low-power dc-dc converter in a small package. The bq25015/7 devices charge the battery in three phases: conditioning, constant current and constant voltage. Charge is terminated based on minimum current. An internal charge timer provides a backup safety feature for charge termination. The bq25015/7 automatically re-starts the charge if the battery voltage falls below an internal threshold. The bq25015/7 automatically enters sleep mode when VCC supply is removed. The integrated low-power high-efficiency dc-dc converter is designed to operate directly from a single-cell Li-ion or Li-Pol battery pack. The output voltage is either adjustable from 0.7 V to VBAT, or fixed at 1.8 V (bq25017) and is capable of delivering up to 300-mA of load current. The dc-dc converter operates at a synchronized 1 MHz switching frequency allowing for the use of small inductors. APPLICATIONS • • • MP3 Players PDAs, Smartphones Digital Cameras TYPICAL APPLICATION bq25017RHL AC Adapter PG 14 10 μH 1.8 V VDC 5 AC 3 VSS FB 9 VSS CE 15 D+ D− 18 VSS BAT/OUT 17 VBUS 6 USB BAT/OUT 16 7 STAT1 ISET1 12 8 STAT2 ISET2 13 4 EN FPWM 20 10 μF GND 10 μF 2 Battery Pack SYSTEM PACK+ 10 μF GND SW 19 USB Port 1 μF RSET + PACK− sim_app2a_lus721 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2007, Texas Instruments Incorporated bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION (1) TA OUTPUT VOLTAGE (V) PART NUMBER (2) (3) STATUS PACKAGE MARKING Adjustable bq25015RHLR Production BZL Adjustable bq25015RHLT Production BZL 1.8 V bq25017RHLR Production BZM 1.8 V bq25017RHLT Production BZM -40°C to 125°C (1) (2) (3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com The RHL package is available taped and reeled only in quantities of 3,000 devices per reel. This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight, and is suitable for use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including bromine (Br) or antimony (Sb) above 0.1% of total product weight. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) bq25015/7 Supply voltage Input voltage Output sink/source current Output source current AC, USB (wrt VSS) –0.3 V to 7 V PG, OUT, ISET1, ISET2, STAT1, STAT2, TS (wrt VSS) –0.3 V to 7 V EN, FB, FPWM, SW (wrt VSS) VOUT + 0.3 V PG, STAT1, STAT2 15 mA TS 200 µA OUT 1.5 A Storage temperature range, Tstg –65°C to 150°C Junction temperature range, TJ –40°C to 125°C Lead temperature (solderig, 10 seconds) 260°C ESD rating (human body model, HBM) 1500 V (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage values are with respect to the network ground terminal unless otherwise noted. RECOMMENDED OPERATING CONDITIONS VCC Supply voltage (from AC input) VCC Supply voltage (from USB input) TA Operating temperature range IOUT_L Maximum DC-DC output current MIN MAX 4.5 6.5 4.35 6.5 0 20-pin (1) 2 RHL (1) 85 °C mA TA < 40°C POWER RATING DERATING FACTOR ABOVE TA = 40°C θJA 1.81 W 21 mW/°C 46.87°C/W This data is based on using the JEDEC High-K board and the exposed die pad is connected to a Cu pad on the board. This is connected to the ground plane by a 2×3 via matrix. Submit Documentation Feedback V 300 DISSIPATION RATINGS PACKAGE UNIT bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 ELECTRICAL CHARACTERISTICS over operating temperature range (TA = 0°C to 125°C) and recommended supply voltage range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT INPUT CURRENT ICC(VCC) Supply current 1, VCC VVCC > VVCC(min) ICC(SLP) Sleep current Sum of currents into OUT/BAT, VVCC < V(SLP) ICC(STDBY) Standyby current CE = High, 0°C ≤ TJ≤ 85°C IIB(OUT) Input current, OUT Charge DONE, VVCC > VVCC(min), IOUT(SW) = 0 mA, Converter not switching IIB(CE) Input current, CE 1.2 2.0 2 5 150 15 mA µA 35 1 CHARGE VOLTAGE REGULATION (VBAT(REG) + V(DO-MAX) ≤ VVCC, I(TERM) < IOUT(BAT)≤ 0.5 A) VREG(BAT) (V(AC)– V(OUT)) (V(USB)– V(OUT)) Charger regulation voltage 4.2 V Charge voltage regulation accuracy TA = 25°C AC dropout voltage VOUT (BAT) = VREG (BAT), IOUT(BAT)= 0.5 A 175 250 VOUT (BAT) = VREG (BAT), ISET2 = High 350 500 VOUT (BAT) = VREG (BAT), ISET2 = Low 60 100 USB dropout voltage –0.35% 0.35% –1% 1% mV CHARGE CURRENT REGULATION IOUT IOUT (BAT) (BAT) AC output current range USB output current range V(SET) Output current set voltage K(SET) Output current set factor VVCC≥ 4.5 V, VOUT (BAT) = V(LOWV), VVCC– VOUT (BAT) > V(DO-MAX), IOUT(BAT) = (K(SET) × V(SET) / RSET) 50 500 VVCC(min)≥ 4.5 V, VOUT (BAT) = V(LOWV), VVCC– VOUT (BAT) > V(DO-MAX), ISET2= Low 80 100 VVCC(min)≥ 4.5 V, VOUT (BAT) = V(LOWV), VVCC– VOUT (BAT) > V(DO-MAX), ISET2 = High 400 500 Voltage on ISET1, VVCC≥ 4.5 V, VOUT (BAT) = V(LOWV), VVCC– VOUT (BAT) > V(DO-MAX), ISET2 = High 2.436 2.500 2.538 50 mA ≤ IOUT(OUT)≤ 1000 mA 307 322 337 10 mA ≤ IOUT(OUT)≤ 50 mA 296 320 346 10 mA ≤ IOUT(OUT)≤ 10 mA 246 320 416 mA V PRECHARGE and SHORT-CIRCUIT CURRENT REGULATION V(LOWV) Precharge to fast-charge transition threshold Voltage on OUT/BAT 2.8 3.0 3.2 V tPRECHG_DG Deglitch time for fast-charge to precharge transition VVCC(min)≥ 4.5 V, tFALL = 100 ns, 10 mV overdrive, VIN(BAT) decreasing below threshold 250 375 500 ms IOUT(PRECHG) Precharge range 0 V < VIN(BAT) < V(LOWV), t < t(PRECHG), IOUT(PRECHG) = (K(SET) × V(PRECHG))/ RSET 100 mA V(PRECHG) Precharge set voltage Voltage on ISET1, VREG(BAT) = 4.2 V, 0 V < VIN(BAT) < V(LOWV), t < t(PRECHG) 270 mV 100 mA 5 240 255 CHARGE TAPER and TERMINATION DETECTION I(TAPER) Charge taper detection range VIN(BAT) > V(RCH), t < t(PRECHG), I(TAPER) = (K(SET) × V(TAPER))/ RSET V(TAPER) Charge taper detection set voltage Voltage on ISET1, VREG(BAT) = 4.2 V, VIN(BAT) > V(RCH), t < t(PRECHG) 235 250 265 V(TERM) Charge termination detection set voltage Voltage on ISET1, VREG(BAT) = 4.2 V, VIN(BAT) > V(RCH), t < t(PRECHG), I(TERM) = (K(SET) × V(TERM))/ RSET 11 18 25 Submit Documentation Feedback 5 mV 3 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 ELECTRICAL CHARACTERISTICS (continued) over operating temperature range (TA = 0°C to 125°C) and recommended supply voltage range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP 375 tTPRDET_DG Deglitch time for taper detection VVCC(min)≥ 4.5 V, tFALL = 100 ns, 10 mV overdrive, ICHG increasing above or decreasong below threshold 250 tTERMDET_DG Deglitch time for termination detection VVCC(min)≥ 4.5 V, tFALL = 100 ns, 10 mV overdrive, ICHG decreasing below threshold 350 MAX UNIT 500 ms 375 500 VREG(BAT) VREG(BAT) – 0.115 – 0.10 VREG(BAT) – 0.085 BATTERY RECHARGE THRESHOLD VRCH Recharge threshold voltage tRCHDET Deglitch time for recharge detect VVCC(min)≥ 4.5 V, tFALL = 100 ns, 10 mV overdrive, ICHG decreasing below or increasing above threshold 250 375 V 500 ms 0.25 V STAT1, STAT2 and PG OUTPUTS VOL Low-level output voltage IOL = 5 mA ISET2 and CE INPUTS VIL Low-level input voltage IIL= 10 µA 0 VIH High-level input voltage IIL= 20 µA 1.4 IIL Low-level input current, CE IIH High-level input current, CE IIL Low-level input current, ISET2 VISET2 = 0 V IIH High-level input current, ISET2 VISET2 = VCC IIHZ High-Z input current, ISET2 VISET2 = High-Z 0.4 V –1 1 –20 µA 40 1 TIMERS t(PRECHG) Precharge time limit 1620 1800 t(TAPER) Taper time limit 1620 1800 1930 1930 t(CHG) Charge time limit 16200 18000 19300 I(FAULT) Timer fault recovery current 200 s µA SLEEP COMPARATOR for CHARGER V(SLP) Sleep mode entry threshold VVCC≤ VIN(BAT) +80 mV 2.3 V ≤ VIN(BAT)≤ VREG(BAT) V(SLP_DG) Sleep mode exit threshold 2.3 V ≤ VIN(BAT)≤ VREG(BAT) t(DEGL) Deglitch time for sleep mode VCC decreasing below threshold, tFALL = 100 ns, 10 mV overdrive, VVCC≥ VIN(BAT) +190 mV 250 375 500 V ms THERMAL SHUTDOWN T(SHTDWN) Thermal trip threshold temperature 165 Thermal hysteresis °C 15 UNDERVOLTAGE LOCKOUT AND POR V(UVLO_CHG) Undervoltage lockout threshold voltage Decreasing VCC 2.4 Hysteresis VPOR POR threshold 2.5 2.6 27 voltage (1) 2.3 2.4 V mV 2.5 V DC-DC INPUT V(BAT) Input voltage range V(UVLO) Undervoltage lockout (1) 4 Input power absent V(LOWV) 4.2 Input power present V(UVLO) 4.2 2.0 Ensured by design. Not production tested. Submit Documentation Feedback V bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 ELECTRICAL CHARACTERISTICS (continued) over operating temperature range (TA = 0°C to 125°C) and recommended supply voltage range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT FPWM – bq25015 VIH(FPWM) High-level input voltage VIL(FPWM) Low-level input voltage 2.0 0.4 FPWM – bq25017 VIH(FPWM) High-level input voltage VIL(FPWM) Low-level input voltage IFPWM Input bias current 1.3 V 0.4 VEN = GND or VBAT, VFPWM = GND or VBAT 0.01 0.1 µA ENABLE VIH(EN) High-level input voltage VIL(EN) Low-level input voltage 1.3 IEN Input bias current VEN = GND or VBAT, VFPWM = GND or VBAT 0.01 0.1 Internal P-channel MOSFET on-resistance VIN = VGS = 3.6 V 530 790 VIN = VGS = 2.5 V 670 930 Internal N-channel MOSFET on-resistance VIN = VGS = 3.6 V 430 620 VIN = VGS = 2.5 V 530 740 ILEAK(P) P-channel leakage current VDS = 6.0 V 0.1 1.0 ILEAK(N) N-channel leakage current VDS = 6.0 V 0.1 1.0 I(LIM) P-channel current limit 2.5 V < VBAT < 4.2 V 380 480 670 0.65 1.00 1.50 MHz V 0.4 µA POWER SWITCH RDS(on) mΩ µA mA OSCILLATOR fSW Switching frequency OUTPUT VREF Reference voltage bq25015 VFB Feedback voltage (2) bq25015 3.6 V ≤ VBAT≤ 4.2 V, 0 mA ≤ IOUT≤ 150 mA Adjustable output voltage range bq25015 Fixed output voltage bq25017 3.6 V ≤ VBAT≤ 4.2 V, 0 mA ≤ IOUT≤ 150 mA VDC-DC (2) 0.5 –3% +3% 0.7 VBAT 1.746 1.8 V 1.854 For output voltages ≤ 1.2 V a 22-µF output capacitor value is required to achieve a maximum output voltage accuracy of +3% while operating in power save mode (PFM). Submit Documentation Feedback 5 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 TYPICAL OPERATING CHARACTERISTICS EFFICIENCY vs LOAD CURRENT 100 EFFICIENCY vs LOAD CURRENT 100 Vbat = 2.7 V Vbat = 2.7 V 95 95 90 85 80 Vbat = 4.2 V 75 70 75 70 65 60 60 VO = 1.8 V, FPWM = High 55 50 100 150 200 250 IL - Load Current - mA VO = 1.8 V, FPWM = Low 55 50 50 300 0 50 Figure 2. EFFICIENCY vs LOAD CURRENT EFFICIENCY vs LOAD CURRENT 300 100 Vbat = 2.7 V 95 Vbat = 2.7 V 95 90 90 85 85 Efficiency - % Vbat = 3.7 V 80 Vbat = 4.2 V 75 70 Vbat = 3.7 V 80 Vbat = 4.2 V 75 70 65 65 60 60 VO =1.5 V, FPWM = High 55 VO = 1.5 V, FPWM = Low 55 50 50 0 50 100 150 200 250 IL - Load Current - mA 300 0 Figure 3. 50 100 150 200 250 IL - Load Current - mA Figure 4. SHORT CIRCUIT INDUCTOR CURRENT Figure 5. 6 100 150 200 250 IL - Load Current - mA Figure 1. 100 Efficiency - % Vbat = 4.2 V 80 65 0 Vbat = 3.7 V 85 Vbat = 3.7 V Efficiency - % Efficiency - % 90 Submit Documentation Feedback 300 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 TYPICAL OPERATING CHARACTERISTICS (continued) LOAD TRANSIENT, 3 mA TO 300 mA, Vbat = 3.7 V, Vo = 1.8 V FPWM = HIGH, FORCE PWM LOAD TRANSIENT, 3 mA TO 300 mA, Vbat = 3.7 V, Vo = 1.8 V FPWM = LOW, POWER SAVE MODE Figure 6. Figure 7. LIGHT LOAD WAVEFORM, Vbat = 3.7 V, Vo = 1.8 V LOAD CURRENT = 36 mA, FPWM = HIGH, FORCE PWM LIGHT LOAD WAVEFORM, Vbat = 3.7 V, Vo = 1.8 V LOAD CURRENT = 36 mA, FPWM = LOW, FORCE PWM Figure 8. Figure 9. START-UP AND SHUT-DOWN, Vbat = 3.7 V, Vo = 1.8 V LOAD CURRENT = 300 mA, FPWM = HIGH, FORCE PWM START-UP AND SHUT-DOWN, Vbat = 3.7 V, Vo = 1.8 V LOAD CURRENT = 300 mA, FPWM = LOW, POWER SAVE MODE Figure 10. Figure 11. Submit Documentation Feedback 7 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 DEVICE INFORMATION FPWM N/C bq25015, bq25017 RHL PACKAGE (TOP VIEW) FB 2 VSS 3 18 VSS EN 4 17 BAT/OUT AC 5 16 BAT/OUT USB 6 15 CE STAT1 7 14 PG STAT2 8 SW 13 ISET2 10 11 12 ISET1 N/C 20 19 N/C 9 VSS 1 TERMINAL FUNCTIONS TERMINAL NAME I/O DESCRIPTION Charge input voltage from AC adapter, connect 10 µF capacitor to ground AC 5 I BAT/OUT 16 I/O BAT/OUT 17 I Battery input to DC-DC converter CE 15 I Charge enable input (active low) EN 4 I Enable input for DC-DC converter; EN=HIGH for device enable FB 2 I Feedback pin for DC-DC converter; connect to voltage divider for bq25015, or connect to system OUT voltage for bq25017 FPWM 20 I PWM control input for the DC-DC converter. A high on FPWM = forced PWM mode. A low = power save mode. ISET1 12 I Charge current set point for AC input and precharge and taper set point for both AC and USB ISET2 13 I Charge current set point for USB port (High = 500 mA, Low = 100 mA, High-Z = disable USB charge) NC 1, 10, 11 – No connect. These pins must be left floating. PG 14 O Power good status output (active low, open-drain) STAT1 7 O Charge status output 1 (open-drain) STAT2 8 O Charge status output 2 (open-drain) SW 19 O Phase node of the DC/DC converter; connect series inductor and capacitor to ground USB 6 I Charge input voltage from USB adapter; connect to 10 µF capacitor to ground – Ground Input. Also note that there is an internal electrical connection between the exposed thermal pad and VSS pins of the device. The exposed thermal pad must be connected to the same potential as the Vss pin on the printed circuit board. Do not use the thermal pad as the primary ground input for the device. All VSS pins must be connected to ground at all times. VSS 8 NO. 3, 9, 18 Charge current output Submit Documentation Feedback bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 FUNCTIONAL BLOCK DIAGRAM AC VI(AC) AC BAT/OUT VI(OUT) 5 16 ISET1 VI(BAT) VI(ISET) + VO(REG) VI(ISET) Sense FET + VI(SET) USB 12 AC/USB 6 Sense FET 17 BAT/OUT EN 4 FPWM 20 VSS 3 VSS 9 DC−DC Controller VCC 19 SW Reference and Bias VI(FB) 2 FB VO(REG) AC/USB VSS 18 VI(BAT) Sleep Deglitch CHG ENABLE 500 mA/ 100 mA VI(SLP) Thermal Shutdown VO(REG) VI(OUT) Suspend Recharge Deglitch Precharge VI(OUT) 15 CE 500 mA/ 100 mA Charge Control, Timer and Display Logic V(ISET1) USB Charge 14 PG 7 STAT1 8 STAT2 Taper V(ISET1) Deglitch V(ISET1) 13 ISET2 Deglitch Term UDG−04072 Submit Documentation Feedback 9 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 FUNCTIONAL DESCRIPTIONS BATTERY CHARGER The bq2501x supports a precision Li-Ion or Li-Pol charging system suitable for single-cell battery packs and a low-power DC-DC converter for providing power to system processor. See a typical charge profile, application circuit and an operational flow chart in Figure 12 through Figure 14 respectively. Figure 13 is the typical application circuit for a high-current application (300 mA). Here the battery charge current is 500 mA, input voltage range of 4.5V – 6.5V. Figure 12. Typical Charger Profile bq25015RHL AC Adapter SW 19 VDC 5 AC FB 2 C2 R2 VBUS 6 10μF USB COUT 10 µF C1 R1 10μF GND LOUT 10 µH SYSTEM Battery Pack BAT/OUT 17 10kΩ PACK+ BAT/OUT 16 10kΩ CCHG 1 µF 7 STAT1 8 STAT2 4 EN ISET1 12 3 VSS ISET2 13 9 VSS CE 15 18 VSS PG 14 GND + PACK− USB Port 1.62 kΩ R1=261 kΩ R2=100 kΩ C1=68 pF C2=100 pF Control and Status Signals typ_app_lus721 Figure 13. Typical Application Circuit 10 Submit Documentation Feedback bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 FUNCTIONAL DESCRIPTIONS (continued) POR SLEEP MODE Vcc > VI(BAT) No checked at all times Indicate SLEEP MODE Yes VI(BAT)<V(LOWV) Regulate IO(PRECHG) Reset and Start t(PRECHG) timer Yes Indicate Charge− In−Progress No Reset all timers, Start t(CHG) timer Regulate Current or Voltage Indicate Charge− In−Progress No VI(BAT)<V(LOWV) Suspend charge Tj < T (SHTDWN) No Yes Indicate CHARGE SUSPEND Yes t(PRECHG) Expired? Yes No Tj < T (SHTDWN) t(CHG) Expired? No Yes No Yes Fault Condition Yes VI(BAT)<V(LOWV) Indicate Fault No I(TERM) detection? VI(BAT) > V(RCH)? Yes No No No t(TAPER) Expired? Enable I(FAULT) current I(TAPER) detection? Yes No No Yes Yes VI(BAT) > V(RCH)? Turn off charge Yes Indicate DONE Disable I(FAULT) current No VI(BAT) < V(RCH)? Yes Figure 14. Operational Flow Chart Submit Documentation Feedback 11 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 FUNCTIONAL DESCRIPTIONS (continued) Autononous Power Source Selection As default, the bq25015/7 attempts to charge the battery from the AC input. If AC input is not present, the USB input is selected. If both inputs are available, the AC adapter has the priority. Refer to Figure 15 for details. AC > BATTERY USB MODE AC MODE AC < BATTERY USB > BATTERY Figure 15. Power Source Selection Battery Pre-Conditioning During a charge cycle if the battery voltage is below the V(LOWV) threshold, the bq25015/7 applies a precharge current, IO(PRECHG), to the battery. This feature revives deeply discharged cells. The resistor connected between the ISET1 and VSS pins, RSET, determines the precharge rate. The V(PRECHG) and K(SET) parameters are specified in the specifications table. V(PRECHG) K(SET) I O (PRECHG) + RSET (1) The bq25015/7 activates a safety timer, t(PRECHG), during the conditioning phase. If V(LOWV) threshold is not reached within the timer period, the bq25015/7 turns off the charger and enunciates FAULT on the STAT1 and STAT2 pins. Please refer to Timer Fault Recovery section for additional details. Battery Charge Current The bq25015/7 offers on-chip current regulation with programmable set point. The resistor connected between the ISET1 and VSS pins, RSET, determines the charge rate. The V(SET) and K(SET) parameters are specified in the specifications table. V(SET) K(SET) I O (OUT) + RSET (2) When charging from a USB port, the host controller has the option of selecting either 100 mA or 500 mA charge rate using the ISET2 pin. A low-level signal sets the current at 100 mA and a high-level signal sets the current at 500 mA. A high-Z input disables USB charging. Battery Voltage Regulation The voltage regulation feedback is through the BAT/OUT pin. This input is tied directly to the positive side of the battery pack. The bq25015/7 monitors the battery-pack voltage between the BAT/OUT and VSS pins. When the battery voltage rises to VO(REG) threshold, the voltage regulation phase begins and the charging current begins to taper down. As a safety backup, the bq25015/7 also monitors the charge time in the charge mode. If taper threshold is not detected within this time period, t(CHG), the bq25015/7 turns off the charger and enunciates FAULT on the STAT1 and STAT2 pins. Please refer to section titled Timer Fault Recoverysection for additional details. Charge Taper Detection, Termination and Regharge The bq25015/7 monitors the charging current during the voltage regulation phase. Once the taper threshold, I(TAPER), is detected the bq25015/7 initiates the taper timer, t(TAPER). Charge is terminated after the timer expires. The resistor connected between the ISET1 and VSS pins, RSET, determines the taper detection level. The V(TAPER) and K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging. V(TAPER) K(SET) I (TAPER) + RSET (3) 12 Submit Documentation Feedback bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 FUNCTIONAL DESCRIPTIONS (continued) The bq25015/7 resets the taper timer in the event that the charge current returns above the taper threshold, I(TAPER). In addition to the taper current detection, the bq25015/7 terminates charge in the event that the charge current falls below the I(TERM) threshold. This feature allows for quick recognition of a battery removal condition or insertion of a fully charged battery. Note that taper timer is not activated. The resistor connected between the ISET1 and VSS pins, RSET, determines the taper detection level. The V(TERM) and K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging. V(TERM) K(SET) I (TERM) + R SET (4) After charge termination, the bq25015/7 restarts the charge once the voltage on the BAT/OUT pin falls below the V(RCH) threshold. This feature keeps the battery at full capacity at all times. Sleep Mode for Charger The bq25015/7 enters the low-power sleep mode if both AC and USB are removed from the circuit. This feature prevents draining the battery during the absence of VCC. Operation Modes Operational modes of the bq25015/7 are summarized in Table 1. Operation of DC-DC is not recommended while charger is in precharge mode. Table 1. Operation Modes BATTERY VOLTAGE AC or USB ADAPTER STATUS CHARGER STATUS DC-DC STATUS VI(BAT) > V(LOWV) Present Fast EN 0 V < VI(BAT) < V(LOWV) Present Precharge EN VI(BAT) < V(UVLO) Both absent Off Off Status Outputs The STAT1 and STAT2 open-drain outputs indicate various charger and battery conditions as shown in Table 2. These status pins can be used to communicate to the host processor. Note that OFF indicates the open-drain transistor is turned off. Table 2. Status Pins Summary CHARGE STATE INPUT POWER STATE STAT1 STAT2 Precharge in progress Present ON ON Fast charge in progress Present ON OFF Charge done Not reported OFF ON Timer fault Not reported OFF OFF Speel mode Absent OFF OFF PG Output (Power Good) The open-drain PG output indicates when the AC adapter is present. The output turns ON when a valid voltage is detected. This output is turned off in the sleep mode. The PG pin can be used to drive an LED or communicate to the host processor. CE Input (Charge Enable) The CE digital input is used to enable or disable the charge process. A low-level signal on this pin enables the charge and a high-level signal disables the charge and places the device into a low-power mode. A high-to-low transition on this pin also resets all timers and timer fault conditions. Note that this applies to both AC and USB charging. Submit Documentation Feedback 13 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 Thermal Shutdown and Protection The bq25015/7 monitors the junction temperature, TJ, of the die and suspends charging if TJ exceeds T(SHTDWN). Charging resumes when TJ falls below T(SHTDWN) by approximately 15°C. TImer Fault Recovery As shown in Figure 14, bq25015/7 provides a recovery method to deal with timer fault conditions. The following summarizes this method: Condition 1: Charge voltage above recharge threshold (V(RCH)) and timeout fault occurs. Recovery method: bq25015/7 waits for the battery voltage to fall below the recharge threshold. This could happen as a result of a load on the battery, self-discharge or battery removal. Once the battery falls below the recharge threshold, the bq25015/7 clears the fault and starts a new charge cycle. A POR or CE toggle also clears the fault. Condition 2: Charge voltage below recharge threshold (V(RCH)) and timeout fault occurs. Recovery method: Under this scenario, the bq25015/7 applies the I(FAULT) current. This small current is used to detect a battery removal condition and remains on as long as the battery voltage stays below the recharge threshold. If the battery voltage goes above the recharge threshold, then the bq25015/7 disables the I(FAULT) current and executes the recovery method described for Condition 1. Once the battery falls below the recharge threshold, the bq25015/7 clears the fault and starts a new charge cycle. A POR or CE toggle also clears the fault. DC-DC CONVERTER The bq25015/7 provides a low quiescent-current synchronous DC-DC converter. The internally compensated converter is designed to operate over the entire voltage range of a single-cell Li-Ion or Li-Pol battery. Under nominal load current, the device operates with a fixed PWM switching frequency of typically 1 MHz. At light load currents, the device enters the power save mode of operation; the switching frequency is reduced and the quiescent current drawn by the converter from the BAT/OUT pin is typically only 15 µA. During PWM operation the converter uses a unique fast-response voltage mode controller scheme with input voltage feedforward to achieve good line and load regulation allowing the use of small ceramic input and output capacitors. At the beginning of each clock cycle initiated by the clock signal (S), the P-channnel MOSFET switch is turned on and the inductor current ramps up until the comparator trips and the control logic turns off the switch. The current limit comparator also turns off the switch in case the current limit of the P-channel switch is exceeded. After the dead time preventing current shoot through the N-channnel MOSFET rectifier is turned on and the inductor current ramps down. The next cycle is initiated by the clock signal again turning off the N-channel rectifier and turning on the on the P-channel switch. The gM amplifier as well as the input voltage determines the rise time of the saw-tooth generator and therefore any change in input voltage or output voltage directly controls the duty cycle of the converter giving a very good line and load transient regulation. Power Save Mode Operation As the load current decreases the converter enters the power save mode operation. During power save mode the converter operates with reduced switching frequency in PFM mode and with a minimum quiescent current to maintain high efficiency. Two conditions allow the converter to enter the power save mode operation. One is the detection of discontinuous conduction mode. The other is when the peak switch current in the P-channel switch goes below the skip current limit. The typical skip current limit can be calculated as: VIN I SKIP + 66 mA ) 160 W (5) During the power save mode the output voltage is monitored with the comparator by the thresholds comp low and comp high. As the output voltage falls below the comp low threshold (set to typically 0.8% above VOUT nominal) the P-channel switch turns on. The P-channel switch is turned off as the peak switch current is reached. The typical peak switch current can be calculated as: V I PEAK + 66 mA ) IN 80 W (6) 14 Submit Documentation Feedback bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 The N-channel rectifier is turned on and the inductor current ramps down. As the inductor current approaches zero the N-channel rectifier is turned off and the P-channel switch is turned on again starting the next pulse. The converter continues these pulses until the comp high threshold (set to typically 1.6% above VOUT nominal) is reached. The converter enters a sleep mode, reducing the quiescent current to a minimum. The converter wakes up again as the output voltage falls below the comp low threshold again. This control method reduces the quiescent current to typically to 15 µA and the switching frequency to a minimum, thereby achieving high converter efficiency. Setting the skip current thresholds to typically 0.8% and 1.6% above the nominal output voltage at light load current results in a dynamic output voltage achieving lower absolute voltage drops during heavy load transient changes. This allows the converter to operate with a small output capacitor of only 10 µF and still have a low absolute voltage drop during heavy load transient changes. Refer to Figure 16 as well for detailed operation of the power save mode. PFM Mode at Light Load 1.6% Comparator High 0.8% Comparator Low VOUT Comparator Low 2 PWM Mode at Medium to Full Load Figure 16. Power Save Mode Thresholds and Dynamic Voltage Positioning The converter enters the fixed-frequency PWM mode again as soon as the output voltage drops below the comp low 2 threshold. Dynamic Voltage Positioning As described in the power save mode operation section and as detailed in Figure 16, the output voltage is typically 0.8% above the nominal output voltage at light load currents as the device is in power save mode. This gives additional headroom for the voltage drop during a load transient from light load to full load. During a load transient from full load to light load the voltage overshoot is also minimized due to active regulation turning on the N-Channel rectifier switch. Soft-Start The bq25015/7 has an internal soft-start circuit that limits the inrush current during startup. This soft-start is implemented as a digital circuit increasing the switch current in steps of typically 60 mA, 120 mA, 240 mA and then the typical switch current limit of 480 mA. Therefore the starup time depends mainly on the output capacitor and load current. Typical startup time with a 10-µF output capacitor and a 100-mA load current is 1.6 ms. 100% Duty Cycle Low Dropout Operation The bq2501 offers a low input-to-output voltage difference while still maintaining operation with the use of the 100% duty cycle mode. In this mode the P-channel switch is constantly turned on. This is particularly useful in battery-powered applications to achieve longest operation time by taking full advantage of the whole battery voltage range. The minimum input voltage to maintain regulation depends on the load current and output voltage and can be calculated as: V IN(min) + VOUT(max) ) I OUT(max) ǒRDS(on)MAX ) RLǓ (7) where IOUT(max) = maximum output current plus indicator ripple current RDS(on)MAX = maximum P-channel switch RDS(on) RL = DC resistance of the inductor VOUT(max) = nominal output voltage plus maximum output voltage tolerance Submit Documentation Feedback 15 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 Enable Pulling the enable pin (EN) low forces the DC-DC converter into shutdown mode, with a shutdown quiescent current of typically 0.1 µA. In this mode the P-channel switch and N-channel rectifier are turned off, the internal resistor feedback divider is disconnected, and the converter enters shutdown mode. If an output voltage, which could be an external voltage source or a super capacitor, is present during shut down, the reverse leakage current is specified under electrical characteristics. For proper operation the EN pin must be terminated and should not be left floating. Pulling the EN pin high starts up the DC-DC converter with the soft-start as previously described. Undervoltage Lockout The undervoltage lockout circuit prevents the converter from turning on the switch or rectifier MOSFET at low input voltages or under undefined conditions. Forced PWM Mode The FPWM input pin allows the host system to override the power save mode by driving the FPWM pin high. In this state, the DC-DC converter remains in the PWM mode of operation with continuous current conduction regardless of the load conditions. Tying the FPWM pin low allows the device to enter power save mode automatically as previously described. 16 Submit Documentation Feedback bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 APPLICATION INFORMATION ADJUSTABLE OUTPUT VOLTAGE VERSION (bq25015) When the adjustable output voltage version is being used (bq25015), the output is set by the external resistor divider, as shown in Figure 13. The output voltage can be calculated as: V OUT + 0.5 V ǒ1 ) R1 Ǔ R2 (8) where R1 + R2 ≤ 1 MΩ Internal reference voltage VREF(typ) = 0.5 V C1 and C2 should be selected as: 1 C1 + 2p 10 kHz R1 (9) where R1 = upper resistor of the voltage divider C1 = upper capacitor of the voltage divider For C1, a value should be chosen that comes closest to the calculated result. C2 + R1 C1 R2 (10) where R2 = lower resistor of the voltage divider C2 = lower capacitor of the voltage divider For C2, the selected capacitor value should always be selected larger than the calculated result. For example, in Figure 13, a 100-pF capacitor is selected for a calculated result of C2 = 86.17 pF. If quiescent current is not a key design parameter, C1 and C2 can be omitted and a low-impedance feedback divider must be used with R1 + R2 < 100 kΩ. This design reduces the noise available on the feedback pin (FB) as well, but increases the overall quiescent current during operation. FIXED OUTPUT VOLTAGE VERSION (bq25017) When a fixed output voltage version of the device is being used, no external resistive divider network is necessary. In this case, the output of the inductor should be connected directly the FB pin, as shown in Figure 13. INPUT CAPACITOR SELECTION In most applications, all that is needed is a high-frequency decoupling capacitor. A 0.1-µF ceramic, placed in close proximity to AC/USB and VSS pins, works fine. The bq2501x is designed to work with both regulated and unregulated external DC supplies. If a non-regulated supply is chosen, the supply unit should have enough capacitance to hold up the supply voltage to the minimum required input voltage at maximum load. If not, more capacitance has to be added to the input of the charger. CHARGER OUTPUT CAPACITOR (DC-DC CONVERTER INPUT CAPACITOR) SELECTION Because the buck converter has a pulsating input current, a low ESR input capacitor is required. This results in the best input voltage filtering and minimizes the interference with other circuits caused by high input voltage spikes. Also, the input capacitor must be sufficiently large to stabilize the input voltage during heavy load transients. For good input voltage filtering, usually a 4.7-µF input capacitor is sufficient and can be increased without any limit for better input voltage filtering. Submit Documentation Feedback 17 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 APPLICATION INFORMATION (continued) If ceramic output capacitors are used, the capacitor RMS ripple current rating ensures the application requirements. For completeness, the RMS ripple current is calculated as: I RMS + I OUT(max) Ǹ ǒ VOUT V IN 1* Ǔ V OUT VIN (11) The worst case RMS ripple current occurs at D=0.5 and is calculated as: I I RMS + OUT 2 (12) Ceramic capacitors perform well because of the low ESR value, and they are less sensitive to voltage transients and spikes compared to tantalum capacitors. The input capacitor should be placed as close as possible to the BAT/OUT pin of the device for best performance. Refer to Table 1for recommended components. DC-DC CONVERTER OUTPUT CAPACITOR SELECTION The advanced fast response voltage mode control scheme of the bq25015/7 allows the use of tiny ceramic capacitors without having large output voltage under and overshoots during heavy load transients. Ceramic capacitors having low ESR values have the lowest output voltage ripple and are therefore recommended. If required, tantalum capacitors may be used as well (refer to Table 1 for recommended components). If ceramic output capacitors are used, the capacitor RMS ripple current rating always meets the application requirements. For completeness, the RMS ripple current is calculated as: V 1 * OUT VIN 1 I RMS(Cout) + VOUT L f 2 Ǹ3 (13) ǒ Ǔ At nominal load current the device operates in PWM mode and the overall output voltage ripple is the sum of the voltage spike caused by the output capacitor ESR plus the voltage ripple caused by charging and discharging the output capacitor: V 1 * OUT VIN 1 DV OUT + VOUT ) ESR L f 8 COUT f ǒ Ǔ ǒ Ǔ (14) where the output voltage ripple occurs at the highest input voltage VIN. At light load currents the device operates in power save mode, and the output voltage ripple is independent of the output capacitor value. The output voltage ripple is set by the internal comparator thresholds. The typical output voltage ripple is 1% of the output voltage VOUT. 18 Submit Documentation Feedback bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 APPLICATION INFORMATION (continued) DC-DC CONVERTER OUTPUT INDUCTOR SELECTION For high efficiencies, the inductor should have a low DC resistance to minimize conduction losses. Although the inductor core material has less effect on efficiency than its DC resistance, an appropriate inductor core material must be used. The inductor value determines the inductor ripple current. The larger the inductor value, the smaller the inductor ripple current, and the lower the conduction losses of the converter. On the other hand, larger inductor values causes a slower load transient response. Usually the inductor ripple current, as calculated below, should be around 30% of the average output current. In order to avoid saturation of the inductor, the inductor should be rated at least for the maximum output current of the converter plus the inductor ripple current that is calculated as: V 1 * OUT VIN DI L + VOUT L f (15) Ǔ ǒ where f = switching frequency (1 MHz typical, 650 kHz minimal) L = inductor value ∆IL = peak-to-peak inductor ripple current IL(max) = maximum inductor current The highest inductor current occurs at maximum VIN. A more conservative approach is to select the inductor current rating just for the maximum switch current of 350 mA. The internal compensator is designed in such a way that the optimized resonant frequency of the output inductor and capacitor is approximately 16kHz. The recommended inductor and capacitor values for various output current are given in Table 3. Table 3. Recommended Inductor and Capacitor Values TYPICAL OUTPUT CURRENT (mA) INDUCTOR VALUE (µH) CAPACITOR VALUE (µF) APPLICATION 30 100 1 60 47 2.2 For low current, small capacitor 80 33 3.3 For medium current, small capacitor 150 22 4.7 For medium current 300 10 10 For highest current, smallest inductor For low current, smallest capacitor CHARGING WHILE UNDER LOAD The bq25015/7 are designed such that maximum charging safety and efficiency can be obtained by suspending normal operation while the device is actively charging the battery. In this mode of operation, the timeout function prevents a defective battery from being charged indefinitely. If charging does not terminate normally within five hours, the device annunciates a fault condition on the STAT1 and STAT2 pins as indicated in Table 2. If a load is applied to the device while it is being used to charge a battery, a false fault condition may result due to a slower rate of charge being applied to the battery. For this reason it is recommended that the load be disconnected from the bq25015/7 while it is charging a battery. THERMAL CONSIDERATIONS The bq25015/7 devices are packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the device and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note QFN/SON PCB Attachment (SLUA271). The most common measure of package thermal performance is thermal impedance (θJA) measured (or modeled) from the chip junction to the air surrounding the package surface (ambient). The mathematical expression for θJA is: T * TA q JA + J P (16) Submit Documentation Feedback 19 bq25015 bq25017 www.ti.com SLUS721A – DECEMBER 2006 – REVISED MARCH 2007 where TJ = chip junction temperature TA = ambient temperature P = device power dissipation Factors that can greatly influence the measurement and calculation of θJA include: • Whether or not the device is board mounted • Trace size, composition, thickness, and geometry • Orientation of the device (horizontal or vertical) • Volume of the ambient air surrounding the device under test and airflow • Whether other surfaces are in close proximity to the device being tested The device power dissipation (P) is a function of the charge rate and the voltage drop across the internal power FET. It can be calculated from the following equation: ǒ Ǔ P + V IN * V IN(BAT) I OUT(OUT) (17) Due to the charge profile of Li-xx batteries, the maximum power dissipation is typically seen at the beginning of the charge cycle when the battery voltage is at its lowest. PCB LAYOUT CONSIDERATIONS For all switching power supplies, the layout is an important step in the design, especially at high peak currents and switching frequencies. If the layout is not carefully done the regulator could exhibit stability problems as well as EMI problems. With this in mind, one should lay out the PCB using wide, short traces for the main current paths. The input capacitor, as well as the inductor and output capacitors, should be placed as close as possible to the IC pins. The feedback resistor network must be routed away from the inductor and switch node to minimize noise and magnetic interference. To further minimize noise from coupling into the feedback network and feedback pin, the ground plane or ground traces must be used for shielding. This becomes very important especially at high switching frequencies. The following are some additional guidelines that should be observed: • To obtain optimal performance, the decoupling capacitor from AC to VSS (and from USB to VSS) and the output filter capacitors from BAT/OUT to VSS should be placed as close as possible to the bq25015/7, with short trace runs to both signal and VSS pins. • All low-current VSS connections should be kept separate from the high-current charge or discharge paths from the battery. Use a single-point ground technique incorporating both the small signal ground path and the power ground path. • The BAT/OUT pin provides voltage feedback to the IC for the charging function and should be connected with its trace as close to the battery pack as possible. • The high current charge paths into AC and USB and from the BAT/OUT and SW pins must be sized appropriately for the maximum charge or output current in order to avoid voltage drops in these traces. • The bq25015/7 deviecs are packaged in a thermally enhanced MLP package. The package includes a thermal pad to provide an effective thermal contact between the IC and the printed circuit board (PCB). Full PCB design guidelines for this package are provided in the application note QFN/SON PCB Attachment (SLUA271). 20 Submit Documentation Feedback PACKAGE OPTION ADDENDUM www.ti.com 7-May-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty BQ25015RHLR ACTIVE QFN RHL 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR BQ25015RHLRG4 ACTIVE QFN RHL 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR BQ25015RHLT ACTIVE QFN RHL 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR BQ25015RHLTG4 ACTIVE QFN RHL 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR BQ25017RHLR ACTIVE QFN RHL 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR BQ25017RHLRG4 ACTIVE QFN RHL 20 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR BQ25017RHLT ACTIVE QFN RHL 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR BQ25017RHLTG4 ACTIVE QFN RHL 20 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-3-260C-168 HR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 17-May-2007 TAPE AND REEL INFORMATION Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device 17-May-2007 Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant BQ25015RHLR RHL 20 MLA 330 12 3.8 4.8 1.6 8 12 PKGORN T1TR-MS P BQ25015RHLT RHL 20 MLA 180 12 3.8 4.8 1.6 8 12 PKGORN T1TR-MS P BQ25017RHLR RHL 20 MLA 330 12 3.8 4.8 1.6 8 12 PKGORN T1TR-MS P BQ25017RHLT RHL 20 MLA 180 12 3.8 4.8 1.6 8 12 PKGORN T1TR-MS P TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) BQ25015RHLR RHL 20 MLA 346.0 346.0 29.0 BQ25015RHLT RHL 20 MLA 190.0 212.7 31.75 BQ25017RHLR RHL 20 MLA 346.0 346.0 29.0 BQ25017RHLT RHL 20 MLA 190.0 212.7 31.75 Pack Materials-Page 2 Height (mm) PACKAGE MATERIALS INFORMATION www.ti.com 17-May-2007 Pack Materials-Page 3 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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