SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 FEATURES • • • • • • • • DGG OR DGV PACKAGE (TOP VIEW) Control Inputs VIH/VIL Levels Are Referenced to VCCA Voltage VCC Isolation Feature – If Either VCC Input Is at GND, Both Ports Are in the High-Impedance State Overvoltage-Tolerant Inputs/Outputs Allow Mixed-Voltage-Mode Data Communications Fully Configurable Dual-Rail Design Allows Each Port to Operate Over the Full 1.2-V to 3.6-V Power-Supply Range Ioff Supports Partial-Power-Down Mode Operation I/Os Are 4.6-V Tolerant Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – 8000-V Human-Body Model (A114-A) – 200-V Machine Model (A115-A) – 1000-V Charged-Device Model (C101) 1DIR 1B1 1B2 GND 1B3 1B4 VCCB 1B5 1B6 GND 1B7 1B8 2B1 2B2 GND 2B3 2B4 VCCB 2B5 2B6 GND 2B7 2B8 2DIR DESCRIPTION/ORDERING INFORMATION This 16-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74AVC16T245 is optimized to operate with VCCA/VCCB set at 1.4 V to 3.6 V. It is operational with VCCA/VCCB as low as 1.2 V. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.2 V to 3.6 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, and 3.3-V voltage nodes. 1 48 2 47 3 46 4 45 5 44 6 43 7 42 8 41 9 40 10 39 11 38 12 37 13 36 14 35 15 34 16 33 17 32 18 31 19 30 20 29 21 28 22 27 23 26 24 25 1OE 1A1 1A2 GND 1A3 1A4 VCCA 1A5 1A6 GND 1A7 1A8 2A1 2A2 GND 2A3 2A4 VCCA 2A5 2A6 GND 2A7 2A8 2OE The SN74AVC16T245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the outputs so the buses effectively are isolated. The SN74AVC16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA. ORDERING INFORMATION PACKAGE (1) TA –40°C to 85°C TOP-SIDE MARKING Tape and reel SN74AVC16T245DGGR AVC16T245 TVSOP – DGV Tape and reel SN74AVC16T245DGVR WF245 VFBGA – GQL VFBGA – ZQL (Pb-free) (1) ORDERABLE PART NUMBER TSSOP – DGG Tape and reel SN74AVC16T245GQLR SN74AVC16T245ZQLR WF245 Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2004–2005, Texas Instruments Incorporated SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 DESCRIPTION/ORDERING INFORMATION (CONTINUED) This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, both ports are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. GQL OR ZQL PACKAGE (TOP VIEW) 1 2 3 4 5 6 A B C D E F G H J K TERMINAL ASSIGNMENTS (2) 1 (2) 2 3 4 6 A 1DIR NC NC NC NC 1OE B 1B2 1B1 GND GND 1A1 1A2 C 1B4 1B3 VCCB VCCA 1A3 1A4 D 1B6 1B5 GND GND 1A5 1A6 E 1B8 1B7 1A7 1A8 F 2B1 2B2 2A2 2A1 G 2B3 2B4 GND GND 2A4 2A3 H 2B5 2B6 VCCB VCCA 2A6 2A5 J 2B7 2B8 GND GND 2A8 2A7 K 2DIR NC NC NC NC 2OE NC – No internal connection FUNCTION TABLE (EACH 8-BIT SECTION) INPUTS OE 2 5 DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 LOGIC DIAGRAM (POSITIVE LOGIC) 1DIR 1 2DIR 48 1A1 25 1OE 47 2A1 2 24 2OE 36 13 1B1 2B1 To Seven Other Channels To Seven Other Channels Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB Supply voltage range VI Input voltage range (2) MIN MAX –0.5 4.6 I/O ports (A port) –0.5 4.6 I/O ports (B port) –0.5 4.6 Control inputs –0.5 4.6 A port –0.5 4.6 B port –0.5 4.6 A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.5 UNIT V V VO Voltage range applied to any output in the high-impedance or power-off state (2) VO Voltage range applied to any output in the high or low state (2) (3) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current ±50 mA ±100 mA Continuous current through each VCCA, VCCB, and GND θJA Package thermal impedance (4) Tstg Storage temperature range DGG package 70 DGV package 58 GQL/ZQL package (1) (2) (3) (4) V V °C/W 42 –65 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The input voltage and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. The output positive-voltage rating may be exceeded up to 4.6 V maximum if the output current rating is observed. The package thermal impedance is calculated in accordance with JESD 51-7. 3 SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 Recommended Operating Conditions (1) (2) (3) VCCI VCCO MIN MAX UNIT VCCA Supply voltage 1.2 3.6 V VCCB Supply voltage 1.2 3.6 V High-level input voltage VIH Low-level input voltage VIL High-level input voltage VIH VIL Low-level input voltage VI Input voltage VO Output voltage IOH Data inputs (4) Data inputs (4) DIR (referenced to VCCA) (5) DIR (referenced to VCCA) (5) 2 V 1.2 V to 1.95 V VCCI × 0.35 1.95 V to 2.7 V 0.7 2.7 V to 3.6 V 0.8 1.2 V to 1.95 V VCCA × 0.65 1.95 V to 2.7 V 1.6 2.7 V to 3.6 V 2 1.2 V to 1.95 V VCCA × 0.35 1.95 V to 2.7 V 0.7 2.7 V to 3.6 V 3-state 0 3.6 Operating free-air temperature V 0.8 3.6 Low-level output current V V VCCO TA 4 1.6 2.7 V to 3.6 V 0 Input transition rise or fall rate (4) (5) 1.95 V to 2.7 V Active state ∆t/∆v (1) (2) (3) VCCI × 0.65 0 High-level output current IOL 1.2 V to 1.95 V 1.2 V –3 1.4 V to 1.6 V –6 1.65 V to 1.95 V –8 2.3 V to 2.7 V –9 3 V to 3.6 V –12 1.2 V 3 1.4 V to 1.6 V 6 1.65 V to 1.95 V 8 2.3 V to 2.7 V 9 3 V to 3.6 V 12 –40 V V mA mA 5 ns/V 85 °C VCCI is the VCC associated with the data input port. VCCO is the VCC associated with the output port. All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V. For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V. SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 Electrical Characteristics (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS 1.2 V to 3.6 V 1.2 V to 3.6 V IOH = –3 mA 1.2 V 1.2 V IOH = –6 mA 1.4 V 1.4 V 1.05 1.65 V 1.65 V 1.2 IOH = –9 mA 2.3 V 2.3 V 1.75 IOH = –12 mA 3V 3V 2.3 IOL = 100 µA 1.2 V to 3.6 V 1.2 V to 3.6 V IOL = 3 mA 1.2 V 1.2 V IOL = 6 mA 1.4 V 1.4 V 0.35 1.65 V 1.65 V 0.45 IOL = 9 mA 2.3 V 2.3 V 0.55 IOL = 12 mA 3V 3V 0.7 1.2 V to 3.6 V 1.2 V to 3.6 V 0V IOH = –8 mA VOL IOL = 8 mA Control inputs II A or B port Ioff A or B port IOZ (3) A or B port VI = VIH VI = VIL VI = VCCA or GND VO = VCCO or GND, VI = VCCI or GND, OE =VIH VI = VCCI or GND, IO = 0 ICCB ICCA + ICCB MIN TYP MAX MIN MAX UNIT VCCO – 0.2 0.95 V 0.2 0.15 ±0.025 ±0.25 ±1 0 to 3.6 V ±0.1 ±2.5 ±5 0 to 3.6 V 0V ±0.5 ±2.5 ±5 3.6 V 3.6 V ±0.5 ±2.5 ±5 1.2 V to 3.6 V 1.2 V to 3.6 V 25 V µA µA VI or VO = 0 to 3.6 V VI = VCCI or GND, IO = 0 ICCA –40°C to 85°C VCCB IOH = –100 µA VOH TA = 25°C VCCA 0V 3.6 V –5 3.6 V 0V 25 1.2 V to 3.6 V 1.2 V to 3.6 V 25 0V 3.6 V 25 3.6 V 0V –5 VI = VCCI or GND, IO = 0 1.2 V to 3.6 V 1.2 V to 3.6 V 45 µA µA µA µA Ci Control inputs VI = 3.3 V or GND 3.3 V 3.3 V 3.5 pF Cio A or B port VO = 3.3 V or GND 3.3 V 3.3 V 7 pF (1) (2) (3) VCCO is the VCC associated with the output port. VCCI is the VCC associated with the input port. For I/O ports, the parameter IOZ includes the input leakage current. 5 SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.2 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V TYP TYP TYP TYP TYP 4.1 3.3 3 2.8 3.2 4.1 3.3 3 2.8 3.2 4.4 4 3.8 3.6 3.5 4.4 4 3.8 3.6 3.5 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6.4 6 4.6 4 3.4 3.2 6 4.6 4 3.4 3.2 6.6 6.6 6.6 6.6 6.8 6.6 6.6 6.6 6.6 6.8 6 4.9 4.9 4.2 5.3 6 4.9 4.9 4.2 5.3 UNIT ns ns ns ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ 6 FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.6 0.5 6.2 0.5 5.2 0.5 4.1 0.5 3.7 3.6 0.5 6.2 0.5 5.2 0.5 4.1 0.5 3.7 3.3 0.5 6.2 0.5 5.9 0.5 5.6 0.5 5.5 3.3 0.5 6.2 0.5 5.9 0.5 5.6 0.5 5.5 4.3 1 10.1 1 10.1 1 10.1 1 10.1 4.3 1 10.1 1 10.1 1 10.1 1 10.1 5.6 1 10.1 0.5 8.1 0.5 5.9 0.5 5.2 5.6 1 10.1 0.5 8.1 0.5 5.9 0.5 5.2 4.5 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 4.5 1.5 9.1 1.5 9.1 1.5 9.1 1.5 9.1 5.5 1.5 8.7 1.5 7.5 1 6.5 1 6.3 5.5 1.5 8.7 1.5 7.5 1 6.5 1 6.3 UNIT ns ns ns ns ns ns SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.4 0.5 5.9 0.5 4.8 0.5 3.7 0.5 3.3 3.4 0.5 5.9 0.5 4.8 0.5 3.7 0.5 3.3 3 0.5 5.2 0.5 4.8 0.5 4.5 0.5 4.4 3 0.5 5.2 0.5 4.8 0.5 4.5 0.5 4.4 3.4 1 7.8 1 7.8 1 7.8 1 7.8 3.4 1 7.8 1 7.8 1 7.8 1 7.8 5.4 1 9.2 0.5 7.4 0.5 5.3 0.5 4.5 5.4 1 9.2 0.5 7.4 0.5 5.3 0.5 4.5 4.2 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 4.2 1.5 7.7 1.5 7.7 1.5 7.7 1.5 7.7 5.2 1.5 8.4 1.5 7.1 1 5.9 1 5.7 5.2 1.5 8.4 1.5 7.1 1 5.9 1 5.7 UNIT ns ns ns ns ns ns Switching Characteristics over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.2 0.5 5.6 0.5 4.5 0.5 3.3 0.5 2.8 3.2 0.5 5.6 0.5 4.5 0.5 3.3 0.5 2.8 2.6 0.5 4.1 0.5 3.7 0.5 3.3 0.5 3.2 2.6 0.5 4.1 0.5 3.7 0.5 3.3 0.5 3.2 2.5 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 2.5 0.5 5.3 0.5 5.3 0.5 5.3 0.5 5.3 5.2 0.5 9.4 0.5 7.3 0.5 5.1 0.5 4.5 5.2 0.5 9.4 0.5 7.3 0.5 5.1 0.5 4.5 3 1 6.1 1 6.1 1 6.1 1 6.1 3 1 6.1 1 6.1 1 6.1 1 6.1 5 1 7.9 1 6.6 1 6.1 1 5.2 5 1 7.9 1 6.6 1 6.1 1 5.2 UNIT ns ns ns ns ns ns 7 SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 Switching Characteristics over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (see Figure 11) PARAMETER tPLH tPHL tPLH tPHL tPZH tPZL tPZH tPZL tPHZ tPLZ tPHZ tPLZ FROM (INPUT) TO (OUTPUT) A B B A OE A OE B OE A OE B VCCB = 1.2 V VCCB = 1.5 V ± 0.1 V VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V TYP MIN MAX MIN MAX MIN MAX MIN MAX 3.2 0.5 5.5 0.5 4.4 0.5 3.2 0.5 2.7 3.2 0.5 5.5 0.5 4.4 0.5 3.2 0.5 2.7 2.8 0.5 3.7 0.5 3.3 0.5 2.8 0.5 2.7 2.8 0.5 3.7 0.5 3.3 0.5 2.8 0.5 2.7 2.2 0.5 4.3 0.5 4.2 0.5 4.1 0.5 4 2.2 0.5 4.3 0.5 4.2 0.5 4.1 0.5 4 5.1 0.5 9.3 0.5 7.2 0.5 4.9 0.5 4 5.1 0.5 9.3 0.5 7.2 0.5 4.9 0.5 4 3.4 0.5 5 0.5 5 0.5 5 0.5 5 3.4 0.5 5 0.5 5 0.5 5 0.5 5 4.9 1 7.7 1 6.5 1 5.2 0.5 5 4.9 1 7.7 1 6.5 1 5.2 0.5 5 UNIT ns ns ns ns ns ns Operating Characteristics TA = 25°C VCCA = VCCB = 1.2 V VCCA = VCCB = 1.5 V VCCA = VCCB = 1.8 V VCCA = VCCB = 2.5 V VCCA = VCCB = 3.3 V TYP TYP TYP TYP TYP 1 1 1 1 2 1 1 1 1 1 13 13 14 15 16 Outputs disabled 1 1 1 1 1 Outputs enabled 13 13 14 15 16 1 1 1 1 1 1 1 1 1 2 1 1 1 1 1 PARAMETER A to B CpdA (1) B to A A to B CpdB (1) B to A (1) 8 TEST CONDITIONS Outputs enabled Outputs disabled Outputs enabled Outputs disabled Outputs enabled CL = 0, f = 10 MHz, tr = tf = 1 ns CL = 0, f = 10 MHz, tr = tf = 1 ns Outputs disabled Power dissipation capacitance per transceiver UNIT pF pF SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 Table 1. Typical Total Static Power Consumption (ICCA + ICCB) VCCB VCCA 0V 1.2 V 1.5 V 1.8 V 2.5 V 3.3 V 0V 0 <0.5 <0.5 <0.5 <0.5 <0.5 1.2 V <0.5 <1 <1 <1 <1 1 1.5 V <0.5 <1 <1 <1 <1 1 1.8 V <0.5 <1 <1 <1 <1 <1 2.5 V <0.5 1 <1 <1 <1 <1 3.3 V <0.5 1 <1 <1 <1 <1 UNIT µA 9 SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 TYPICAL CHARACTERISTICS 6 TA = 25°C VCCA = 1.2 V tPLH − Propagation Delay − ns 5 4 3 2 × + 1 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 0 0 10 20 30 40 CL − Load Capacitance − pF 50 60 Figure 1. 6 TA = 25°C VCCA = 1.2 V tPHL − Propagation Delay − ns 5 4 3 2 × + 1 0 0 10 20 30 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 40 CL − Load Capacitance − pF Figure 2. 10 50 60 www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 TYPICAL CHARACTERISTICS 6 TA = 25°C VCCA = 1.5 V tPLH − Propagation Delay − ns 5 4 3 2 × VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V + 1 0 0 10 20 30 40 50 60 CL − Load Capacitance − pF Figure 3. 6 TA = 25°C VCCA = 1.5 V 5 tPHL − Propagation Delay − ns www.ti.com SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS 4 3 2 × + 1 0 0 10 20 30 VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 40 50 60 CL − Load Capacitance − pF Figure 4. 11 SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 TYPICAL CHARACTERISTICS 6 TA = 25°C VCCA = 1.8 V tPLH − Propagation Delay − ns 5 4 3 2 × VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V + 1 0 0 10 20 30 40 50 60 CL − Load Capacitance − pF Figure 5. 6 TA = 25°C VCCA = 1.8 V tPHL − Propagation Delay − ns 5 4 3 2 × VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V + 1 0 0 10 20 30 40 50 CL − Load Capacitance − pF Figure 6. 12 60 www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 TYPICAL CHARACTERISTICS 6 TA = 25°C VCCA = 2.5 V tPLH − Propagation Delay − ns 5 4 3 2 × VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V + 1 0 0 10 20 30 40 50 60 CL − Load Capacitance − pF Figure 7. 6 × TA = 25°C VCCA = 2.5 V + 5 tPHL − Propagation Delay − ns www.ti.com SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V 4 3 2 1 0 0 10 20 30 40 50 60 CL − Load Capacitance − pF Figure 8. 13 SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 TYPICAL CHARACTERISTICS 6 TA = 25°C VCCA = 3.3 V tPLH − Propagation Delay − ns 5 4 3 2 × VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V + 1 0 0 10 20 30 40 50 60 CL − Load Capacitance − pF Figure 9. 6 × TA = 25°C VCCA = 3.3 V VCCB = 1.2 V VCCB = 1.5 V VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V + 5 tPHL − Propagation Delay − ns 4 3 2 1 0 0 10 20 30 40 CL − Load Capacitance − pF Figure 10. 14 50 60 www.ti.com SN74AVC16T245 16-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS www.ti.com SCES551C – FEBRUARY 2004 – REVISED AUGUST 2005 PARAMETER MEASUREMENT INFORMATION 2 × VCCO S1 RL From Output Under Test Open GND CL (see Note A) TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 × VCCO GND RL tw LOAD CIRCUIT VCCI VCCI/2 Input VCCO CL RL VTP 1.2 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 3.3 V ± 0.3 V 15 pF 15 pF 15 pF 15 pF 15 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ 0.1 V 0.1 V 0.15 V 0.15 V 0.3 V VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VCCA Output Control (low-level enabling) VCCA/2 VCCA/2 0V tPZL VCCI Input VCCI/2 VCCI/2 0V tPLH Output tPHL VCCO/2 VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES VOH VCCO/2 VOL tPLZ VCCO Output Waveform 1 S1 at 2 × VCCO (see Note B) VCCO/2 VOL + VTP VOL tPZH Output Waveform 2 S1 at GND (see Note B) tPHZ VCCO/2 VOH − VTP VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns. D. The outputs are measured one at a time, with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. VCCI is the VCC associated with the input port. I. VCCO is the VCC associated with the output port. Figure 11. Load Circuit and Voltage Waveforms 15 PACKAGE OPTION ADDENDUM www.ti.com 27-Sep-2007 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty 74AVC16T245DGGRE4 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74AVC16T245DGGRG4 ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74AVC16T245DGVRE4 ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 74AVC16T245DGVRG4 ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AVC16T245DGGR ACTIVE TSSOP DGG 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AVC16T245DGVR ACTIVE TVSOP DGV 48 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM SN74AVC16T245GQLR NRND BGA MI CROSTA R JUNI OR GQL 56 1000 SNPB Level-1-240C-UNLIM SN74AVC16T245ZQLR ACTIVE BGA MI CROSTA R JUNI OR ZQL 56 1000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM TBD Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 12-Jan-2008 TAPE AND REEL BOX INFORMATION Device Package Pins Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant SN74AVC16T245DGGR DGG 48 SITE 41 330 24 8.6 15.8 1.8 12 24 Q1 SN74AVC16T245DGVR DGV 48 SITE 41 330 24 6.8 10.1 1.6 12 24 Q1 SN74AVC16T245GQLR GQL 56 SITE 32 330 16 4.8 7.3 1.45 8 16 Q1 SN74AVC16T245GQLR GQL 56 SITE 60 330 16 4.8 7.3 1.5 8 16 Q1 SN74AVC16T245ZQLR ZQL 56 SITE 32 330 16 4.8 7.3 1.45 8 16 Q1 SN74AVC16T245ZQLR ZQL 56 SITE 60 330 16 4.8 7.3 1.5 8 16 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 12-Jan-2008 Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74AVC16T245DGGR DGG 48 SITE 41 346.0 346.0 41.0 SN74AVC16T245DGVR DGV 48 SITE 41 346.0 346.0 41.0 SN74AVC16T245GQLR GQL 56 SITE 32 346.0 346.0 33.0 SN74AVC16T245GQLR GQL 56 SITE 60 342.9 345.9 28.58 SN74AVC16T245ZQLR ZQL 56 SITE 32 346.0 346.0 33.0 SN74AVC16T245ZQLR ZQL 56 SITE 60 342.9 345.9 28.58 Pack Materials-Page 2 MECHANICAL DATA MTSS003D – JANUARY 1995 – REVISED JANUARY 1998 DGG (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 48 PINS SHOWN 0,27 0,17 0,50 48 0,08 M 25 6,20 6,00 8,30 7,90 0,15 NOM Gage Plane 1 0,25 24 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 48 56 64 A MAX 12,60 14,10 17,10 A MIN 12,40 13,90 16,90 DIM 4040078 / F 12/97 NOTES: A. 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