PM8800 Integrated IEEE 802.3af compliant PoE-PD interface and PWM controller with support of external source Preliminary Data Features ■ IEEE 802.3af compliant PD Interface ■ Works with power supplied from Ethernet LAN cables or from local auxiliary sources ■ Integrated 100V, 0. 5Ω, 800mA Hot-Swap MOSFET ■ Integrated signature resistor ■ Programmable in-rush current limit ■ Programmable classification current ■ Programmable DC current limit up to 800 mA ■ High voltage start-up bias regulator ■ Thermal Shutdown protection ■ Current mode pulse width modulator ■ Programmable Oscillator Frequency ■ Programmable Soft-start ■ Power Good Indication ■ 80% maximum duty cycle with internal slope compensation ■ Supports both Isolated and Non-Isolated Applications. HTSSOP16 Applications ■ VoIP phones, WLAN access points ■ Security cameras ■ PoE Powered Device Appliances ■ High power (>12.95W) powered devices Table 1. Description The PM8800 integrates a standard Power over Ethernet (PoE) interface and a current mode PWM controller to simplify the design of the power supply sections of all Powered Devices. The PoE interface incorporates all the functions required by the IEEE 802.3af including detection, classification, under-voltage lockout (UVLO) and in-rush current limitation. PM8800 specifically targets PD with extended power requirement with respect to the limit imposed by the 802.3af standard, embedding a hot-swap MOSFET capable of sustaining twice the current of the 802.3af standard with a programmable DC current limit The integrated switching regulator of the PM8800 has been designed to work with power either form the Ethernet cable connection or from an external power source such as AC adapter. The DC/DC section of the PM8800 features a programmable oscillator frequency, soft-start, slope compensation and embeds a voltage output error amplifier allowing use in both isolated and non isolated configuration. Device summary Order codes Max duty Package 80% HTSSOP16 PM8800A Tube PM8800A September 2007 Packaging Tape and reel Rev 1 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. 1/10 www.st.com 1 Contents PM8800 Contents 1 Typical application circuit and block diagram . . . . . . . . . . . . . . . . . . . . 3 1.1 2 Application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pins description and connection diagrams . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Device description and operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2/10 PM8800 Typical application circuit and block diagram 1 Typical application circuit and block diagram 1.1 Application circuits Figure 1. Simplified application schematic for powered device using PM8800 in isolated configuration VIN AUXI_IRL DCCL PM8800 RCLASS VSS Figure 2. AUXII VCC GD COMP nPGD CS VFB SS RT GND AGND Simplified application schematic for Powered Device using PM8800 in non-isolated buck configuration Vin Vout+ Vout- VIN AUXII nPGD GD VFB AUXI_IRL PM8800 DCCL RCLASS VSS VCC COMP CS SS RT GND AGND 3/10 Pins description and connection diagrams 2 PM8800 Pins description and connection diagrams Figure 3. Pins connection (top view) RT SS AUXII VIN RCLASS AUXI_IRL DCCL VSS 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 AGND VFB COMP CS nPGD VCC GD GND HTSSOP-16 2.1 Pin descriptions Table 1. Pin n 4/10 Pin description Name Function 1 RT/SYNC Oscillator timing resistor pin and synchronization input. An external resistor connected from RT to AGND sets the oscillator frequency. This pin will also accept narrow ac-coupled synchronization pulses from an external clock. 2 SS Soft-start input. An external capacitor and an internal 10uA current source set the softstart ramp rate. 3 AUXII Auxiliary source enable pin Use this pin to power up the DC/DC section only from the external source. The auxiliary source can prevail over the PoE source depending on the value of the resistor between this pin and the external source. 4 VIN System high potential input. The diode "OR" of PoE line and auxiliary sources connected to the PD, it is the most positive input potential. 5 RCLASS Classification resistor pin. Connect a classification programming resistor between this pin and VSS. PM8800 Pins description and connection diagrams Table 1. Pin n Pin description (continued) Name Function AUXI_IRL In-rush current limit and auxiliary source enable pin. Pulling up this pin to the auxiliary source will change the internal UVLO settings and allow PD to be powered with voltage lower than nominal PoE voltages. In this condition inrush current limit is set to default values. A resistance between this pin and VSS will set the level of inrush current limit. 7 DCCL DC Current Limit. A resistor between DCCL and VSS will set the current limit for the interface section of the PM8800. It can be set to exceed the IEEE802.3af current limit . Leave the pin open for standard IEEE 802.3af applications 8 VSS System low potential input. 9 GND System return for the PWM converter. It is the drain of the internal hot-swap power MOSFET. 10 GD 6 Output of the PWM controller. External power MOSFET gate driver output VCC Output of the internal high voltage regulator. When the auxiliary transformer winding (if used) raises the voltage on this pin above the regulation set point, the internal regulator will be shutdown, reducing the controller power dissipation nPGD PowerGood, active low A high to low transition indicates that handshake with the PSE has been successfully terminated and the SMPS portion of the PM8800 can be activated 13 CS Current sense input. Current sense input for current mode control and over-current protection. Current limiting is obtained with a dedicated current sense comparator. If the CS pin voltage exceeds 0.5V the GD pin switches low for cycle-by-cycle current limiting. Leading edge blanking is implemented to mask current spikes. 14 COMP The output of the error amplifier and input of the Pulse Width Modulator.COMP pull-up is provided by an internal 2.5kΩ resistor which may be used to bias an opto-coupler transistor. 15 VFB Feedback signal. Inverting input of the internal error amplifier. The non-inverting input is internally connected to a 1.25V reference. 16 AGND Analog PWM supply return. GND for sensitive analog circuitry including the SMPS current limit circuitry. Must be connected to GND to improve noise immunity. 11 12 EP Exposed Pad. Connect this to a board plane to improve heat dissipation; must be electrically connected to VSS 5/10 Device description and operation 3 PM8800 Device description and operation The PM8800 is a monolithic device embedding an IEEE 802.3af compliant PD interface together with a current mode pulse width modulator to be used in all Power over Ethernet Powered Devices. In addition to the standard .3af features, PM8800 anticipates some features of the forthcoming .3at standard, specifically targeting appliances or systems requiring higher power with respect to the 12.95W allowed by standard PSE. The PD interface integrates the 24.5kΩ signature resistor used in detection and disabled during the rest of operating modes. Classification is done through an external resistor detached when classification is over, in order to save power. The PM8800 integrates standard compliant UVLO thresholds to determine normal operating mode (UVLO rising) or recognize disconnection (UVLO falling). A graphical representation of the voltage thresholds and hysteresis during all the operating phases is depicted in the following figure: State diagram of the PM800 interface depending on the input voltage State of the PD Figure 4. Powered Wait for turn-on Classification Detection 1.5V Note: 10.3V 11.5V 21V 23V 31V 38.5V Input voltage For input voltages in the range 1.5 to 11.5V, PM8800 exposes a 24.5kΩ resistance. After detection is over, the internal resistor is disabled and the external classification resistor is presented. When classification is over, the external resistor is disconnected and the PM8800 wait for the input voltage to overpass the UVLO voltage. The hot-swap MOSFET is specifically designed to have a low RDSON to contain the conduction losses and sustain up to 800mA. A constant dissipated power method is used to limit the current in the in-rush phase. The integrated in-rush current limit controls in a safe manner the current flowing through the MOSFET, shortening the duration of the hot-swap event itself. Designers have the possibility to further limit the current in the in-rush by acting on the proper programming resistor. Designers have the possibility to set the limit of the current through the interface during normal operation. For non standard application, this limit exceeds the 350mA foreseen by the 802.3af and can reach up to 800mA. 6/10 PM8800 Device description and operation PM8800 can work with power either from PoE networks or from auxiliary sources - like AC adapters -. Alternative sources are present in PoE appliances where devices can work also outside the context of the PoE networks or to ensure normal operation even if PoE becomes unavailable. PM8800 limits the number of external components to handle the coexistence of both PoE and auxiliary supplies. External sources can be connected so to exploit the in-rush current limitation provided by the MOSFET or enabling the PWM section, bypassing the interface section. A state-of-the-art current mode pulse with modulator is embedded in the PM8800 to support low side single ended isolated and non isolated topologies. A high gain bandwidth product error amplifier is embedded for non isolated configuration. The PWM switching frequency of PM8800 is programmable with an appropriate resistor and it is also capable of working with an external clock reference. 7/10 Package mechanical data 4 PM8800 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com Figure 5. HTSSOP16 package mechanical data TSSOP16 EXPOSED PAD MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. 1.2 A1 0.047 0.15 A2 0.8 b 0.19 c 0.09 D 4.9 D1 1.7 1 5 MAX. 1.05 0.031 0.30 0.007 0.20 0.004 5.1 0.193 0.004 0.006 0.039 0.041 0.012 0.0089 0.197 0.201 0.067 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.5 0.169 0.173 0.177 E2 1.5 e 0.059 0.65 K 0° L 0.45 0.60 0.0256 8° 0° 0.75 0.018 8° 0.024 0.030 7419276A 8/10 PM8800 5 Revision history Revision history Table 2. Document revision history Date Revision 17-Sep-2007 1 Changes Internal release 9/10 PM8800 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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