STMICROELECTRONICS VN771K13TR

VN771K
Quad smart power solid state relay
for complete H-bridge configurations
Features
Type
RDS(on)
IOUT
VCC
VN771K
95 mΩ(1)
9 A(2)
36 V
1. Total resistance of one side in bridge configuration
2. Typical current limitation value
■
Suited as low voltage bridge
■
Linear current limitation
■
Very low standby power dissipation
■
Short circuit protected
■
Status flag diagnostic (open drain)
■
Integrated clamping circuits
■
Undervoltage protection
■
ESD protection
SO-28
This device is suitable to drive a DC motor in a
bridge configuration as well as to be used as a
quad switch for any low voltage application.
The dual high side switches have built-in thermal
shutdown to protect the chips from over
temperature and current limiter blocks to protect
the device from short circuit. Status output is
provided to indicate open load in off and on-state
and over temperature.
Description
The VN771K is a device formed by three
monolithic chips housed in a standard SO-28
package: a double high side and two low side
switches. Both the double high side and low side
switches are made using STMicroelectronics
VIPower™ M0-3 Technology.
Table 1.
The low side switches are two OMNIFET II types
(fully auto protected Power MOSFET in
VIPower™ technology). They have built-in
thermal shutdown, linear current limitation and
overvoltage clamping. Fault feedback for thermal
intervention can be detected by monitoring the
voltage at the input pin.
Device summary
Order codes
Package
SO-28
July 2009
Tube
Tape and reel
VN771K
VN771K13TR
Doc ID 12534 Rev 4
1/33
www.st.com
1
Contents
VN771K
Contents
1
Block diagrams and pins descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3
Electrical characteristics for dual high side switch . . . . . . . . . . . . . . . . . . . 9
2.4
Electrical characteristics for low side switches . . . . . . . . . . . . . . . . . . . . 11
2.5
Dual high-side switch timing data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6
Electrical characterization for dual high side switch . . . . . . . . . . . . . . . . . 16
2.7
Electrical characterization for low side switches . . . . . . . . . . . . . . . . . . . . 19
3
Application recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5
6
2/33
4.1
SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.2
Thermal calculation in clockwise and anti-clockwise operation in steady
state mode 27
4.2.1
Thermal resistances definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2.2
Thermal calculation in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.2.3
Single pulse thermal impedance definition . . . . . . . . . . . . . . . . . . . . . . 27
4.2.4
Pulse calculation formula . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.1
SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.2
SO-28 tube shipment
5.3
Tape and reel shipment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 12534 Rev 4
VN771K
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pin definition and function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Dual high side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Low side switch. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Power outputs (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching (per each channel) (VCC= 13V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Logic input (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Status pin (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Protections (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Openload detection (per each channel) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Off-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
On-state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Thermal calculation in clockwise and anti-clockwise operation in steady state mode . . . . 27
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 12534 Rev 4
3/33
List of figures
VN771K
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
Figure 46.
Figure 47.
Figure 48.
4/33
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Connection diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Open-load status timing (with external pull-up) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Over temperature status timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Off-state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input high level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input low level voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Openload on-state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Openload off-state voltage detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Turn-on current slope (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Turn-on current slope (Vin=3.5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Switching time resistive load (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Switching time resistive load (Rg=10Ohm) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Source drain diode forward characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Static drian source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Static drain source on resistance vs input voltage (Id=7A) . . . . . . . . . . . . . . . . . . . . . . . . . 21
Static drain source on resistance vs input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Turn-off drain source voltage slope (Vin=3.5V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Turn-off drain source voltage slope (Vin=5V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Application diagram bridge drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 12534 Rev 4
VN771K
Figure 49.
Figure 50.
Figure 51.
Figure 52.
Figure 53.
Figure 54.
Figure 55.
List of figures
Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26
SO-28 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . 28
SO-28 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28
Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-28 package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Tube dimensions (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Tape and reel dimensions (suffix “13TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Doc ID 12534 Rev 4
5/33
Block diagrams and pins descriptions
VN771K
1
Block diagrams and pins descriptions
Figure 1.
Block diagram
6/33
Doc ID 12534 Rev 4
VN771K
Block diagrams and pins descriptions
Table 2.
Pin definition and function
No
Name
1, 3, 25, 28
DRAIN 3
Drain of switch 3 (low-side switch)
2
INPUT 3
Input of switch 3 (low-side switch)
4, 11
N.C.
Not connected
5, 10, 19, 24
VCC
Drain of switches 1 and 2 (high-side switches) and power
supply voltage
6
GND
Ground of switches 1 and 2 (high-side switches)
7
INPUT 1
8
DIAGNOSTIC
9
INPUT 2
Input of switch 2 (high-side switch)
12, 14, 15, 18
DRAIN 4
Drain of switch 4 (low-side switch)
13
INPUT 4
Input of switch 4 (low-side switch)
16, 17
SOURCE 4
Source of switch 4 (low-side switch)
20, 21
SOURCE 2
Source of switch 2 (high-side switch)
22, 23
SOURCE 1
Source of switch 1 (high-side switch)
26, 27
SOURCE 3
Source of switch 3 (low-side switch)
Figure 2.
Function
Input of switch 1 (high-side switches)
Diagnostic of switches 1 and 2 (high-side switches)
Connection diagram
Doc ID 12534 Rev 4
7/33
Electrical specifications
VN771K
2
Electrical specifications
2.1
Thermal data
Table 3.
Thermal data
Symbol
2.2
Rthj-case
Thermal resistance junction-case (high side switch)
20
Rthj-case
Thermal resistance junction-case (low side switch)
20
Rthj-amb
Thermal resistance junction-ambient (with 6 cm2 of Cu heat sink)
See Figure 49
Absolute maximum ratings
Table 4.
Dual high side switch
Symbol
Parameter
Value
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
-0.3
V
-IGND
DC reverse ground pin current
-200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
-6
A
IIN
DC input current
±10
mA
ISTAT
DC status current
±10
mA
VESD
Electrostatic discharge (human body model:
R = 1.5KΩ; C = 100pF)
– Input
– Status
– Output
– VCC
4000
4000
5000
5000
V
V
V
V
6
W
Internally limited
°C
Ptot
Power dissipation (TC =25°C)
Tj
Junction operating temperature
Tc
Case operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Value
Unit
Tstg
Table 5.
Low side switch
Symbol
8/33
Value Max
(°C/W)
Parameter
Parameter
VDS
Drain source voltage (VIN = 0V)
Internally clamped
V
VIN
Input voltage
Internally clamped
V
IIN
Input current
±20
mA
Doc ID 12534 Rev 4
VN771K
Electrical specifications
Table 5.
Low side switch (continued)
Symbol
RIN MIN
Value
Unit
10
Ω
Internally limited
A
-15
A
Minimum input series impedance
ID
Drain current
IR
Reverse DC output current
VESD1
Electrostatic discharge (R = 1.5KΩ, C = 100pF)
4000
V
VESD2
Electrostatic discharge on output pin only (human
body model: R = 330Ω, C = 150pF)
5000
V
Power dissipation (TC = 25°C)
6
W
Operating junction temperature
Internally limited
°C
Case operating temperature
Internally limited
°C
-55 to 150
°C
Ptot
T
j
Tc
Tstg
2.3
Parameter
Storage temperature
Electrical characteristics for dual high side switch
8V < VCC< 36V; -40°C < Tj < 150°C, unless otherwise specified.
Table 6.
Power outputs (per each channel)
Symbol
Parameter
VCC(1)
Operating supply
voltage
VUSD(1)
VOV(1)
RON
IS(1)
Test conditions
Min
Typ
Max
Unit
5.5
13
36
V
Undervoltage
shutdown
3
4
5.5
V
Overvoltage
shutdown
36
-
-
V
-
-
60
120
mΩ
mΩ
12
12
40
25
µA
µA
5
7
mA
On-state
resistance
IOUT =2A; Tj =25°C
IOUT =2A; VCC >8V
Supply current
Off-state; VCC = 13V; VIN =VOUT =0V
Off-state; VCC = 13V; VIN =VOUT =0V;
Tj =25°C
On-state; VCC = 13V;
-
0
-
50
µA
-75
-
0
µA
IL(off1)
Off-state output
current
VIN =VOUT =0V; VCC =36V; Tj = 125°C
IL(off2)
Off-state output
current
VIN =0V; VOUT =3.5V
IL(off3)
Off-state output
current
VIN =VOUT =0V; VCC = 13V; Tj = 125°C
-
-
5
µA
IL(off4)
Off-state output
current
VIN =VOUT =0V; VCC = 13V; Tj = 25°C
-
-
3
µA
1. Per device.
Doc ID 12534 Rev 4
9/33
Electrical specifications
Table 7.
Switching (per each channel) (VCC= 13V)
Symbol
Parameter
Test conditions
Min
Typ
Max
Unit
td(on)
Turn-on delay time
RL =6.5Ω from VIN rising edge
to VOUT =1.3V
-
30
-
µs
td(off)
Turn-off delay time
RL =6.5Ω from VIN falling edge
to VOUT = 11.7V
-
30
-
µs
dVOUT/dt(on)
Turn-on voltage
slope
RL =6.5Ω from VOUT = 1.3V to
VOUT = 10.4V
-
See relative
diagram
-
V/µs
dVOUT/dt(off)
Turn-off voltage
slope
RL =6.5Ω from VOUT = 11.7V to
VOUT =1.3V
-
See relative
diagram
-
V/µs
Table 8.
Symbol
Logic input (per each channel)
Parameter
Test conditions
Min
Typ
Max
Unit
VIL
Input low level
-
-
1.25
V
IIL
Low level input current VIN = 1.25V
1
-
-
µA
VIH
Input high level
3.25
-
-
V
IIH
High level input current VIN = 3.25V
-
-
10
µA
0.5
-
-
V
6
6.8
-0.7
8
V
V
Min
Typ
Max
Unit
-
-
0.5
V
VI(hyst)
VICL
Table 9.
Symbol
Input hysteresis
voltage
IIN = 1mA
IIN = -1mA
Input clamp voltage
Status pin (per each channel)
Parameter
Test conditions
VSTAT
Status low output
voltage
ILSTAT
Status leakage current Normal operation; VSTAT = 5V
-
-
10
µA
CSTAT
Status pin input
capacitance
Normal operation; VSTAT = 5V
-
-
100
pF
VSCL
Status clamp voltage
ISTAT = 1mA
ISTAT = -1mA
6
6.8
-0.7
8
V
V
Table 10.
10/33
VN771K
ISTAT = 1.6 mA
Protections (per each channel)
Symbol
Parameter
TTSD
Test conditions
Min
Typ
Max
Unit
Shutdown temperature
150
175
200
°C
TR
Reset temperature
135
-
-
°C
Thyst
Thermal hysteresis
7
15
-
°C
Doc ID 12534 Rev 4
VN771K
Electrical specifications
Table 10.
Symbol
tSDL
Ilim
Vdemag
Note:
Parameter
Status delay in
overload conditions
Current limitation
Turn-off output clamp
voltage
Test conditions
Tj >TTSD
Tj = 125°C
5.5V < VCC <36V
IOUT =2A; L=6mH
Min
Typ
Max
Unit
-
-
20
µs
6
8.5
9
15
15
15
A
A
A
VCC-41 VCC-48 VCC-55
V
To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 11.
Symbol
2.4
Protections (per each channel) (continued)
Openload detection (per each channel)
Parameter
Test conditions
Min
Typ
Max
Unit
IOL
Openload on-state
detection threshold
VIN = 5V
50
100
200
mA
tDOL(on)
Openload on-state
detection delay
IOUT = 0A
-
-
200
µs
VOL
Openload off-state
voltage detection
threshold
VIN = 0V
1.5
2.5
3.5
V
tDOL(off)
Openload detection
delay at turn-off
-
-
1000
µs
Min
Typ
Max
Unit
Electrical characteristics for low side switches
-40°C < Tj < 150°C, unless otherwise specified.
Table 12.
Symbol
Off-state
Parameter
Test conditions
VCLAMP
Drain source clamp
voltage
VIN =0V; ID = 7A
40
45
55
V
VCLTH
Drain source clamp
threshold voltage
VIN =0V; ID =2mA
36
-
-
V
VINTH
Input threshold
voltage
VDS =VIN; ID =1mA
0.5
-
2.5
V
Supply current from
input pin
VDS =0V; VIN = 5V
-
100
150
µA
IISS
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Electrical specifications
Table 12.
Symbol
VN771K
Off-state (continued)
Parameter
Test conditions
VINCL
Input-source clamp
voltage
IIN =1mA
IIN =-1mA
IDSS
Zero input voltage
drain current
(VIN =0V)
VDS = 13V; VIN =0V; Tj =25°C
VDS = 25V; VIN =0V
Table 13.
Symbol
RDS(on)
Min
Typ
Max
Unit
6
-1.0
6.8
8
-0.3
V
-
-
30
75
µA
Min
Typ
Max
Unit
-
-
35
70
mΩ
Min
Typ
Max
Unit
On-state
Parameter
Test conditions
Static drain source on VIN =5V; ID =7A; Tj = 25°C
resistance
VIN =5V; ID =7A
Tj = 25°C, unless otherwise specified.
Table 14.
Symbol
Dynamic
Parameter
Test conditions
gfs(1)
Forward trans
conductance
VDD =13V; ID =7A
-
18
-
S
COSS
Output capacitance
VDS = 13V; f = 1 MHz; VIN = 0V
-
400
-
pF
Min
Typ
Max
Unit
-
80
250
ns
-
350
1000
ns
-
450
1350
ns
Fall time
-
150
500
ns
Turn-on delay time
-
1.5
4.5
µs
-
9.7
30
µs
-
9
25
µs
-
10.2
30
µs
1. Pulsed: Pulse duration = 300µs, duty cycle 1.5%
Table 15.
Symbol
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
(dI/dt)on
Qi
12/33
Switching
Parameter
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
Rise time
Turn-off delay time
VDD =15V; ID =7A
Vgen =5V; Rgen = RIN MIN =10Ω
VDD =15V; ID =7A
Vgen =5V; Rgen =2.2KΩ
Fall time
Turn-on current slope
VDD =15V; ID =7A Vgen =5V;
Rgen = RIN MIN =10Ω
-
16
-
A/µs
Total input charge
VDD =12V; ID =7A; VIN =5V
Igen = 2.13mA
-
36.8
-
nC
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VN771K
Electrical specifications
Table 16.
Symbol
VSD(1)
Source drain diode
Parameter
Test conditions
Forward on voltage
ISD =7A; VIN =0V
trr
Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
ISD = 7A; dI/dt = 40A/µs
VDD = 30V; L = 200µH
Min
Typ
Max
Unit
-
0.8
-
V
-
300
-
ns
-
0.80
-
µC
-
5
-
A
Min
Typ
Max
Unit
12
15
18
24
24
A
A
-
45
-
µs
1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
-40°C < Tj < 150°C, unless otherwise specified.
Table 17.
Symbol
Protections
Parameter
Test conditions
Ilim
Drain current limit
VIN =5V; VDS =13V
VIN =5V; VDS =13V; Tj =125°C
tdlim
Step response current
limit
VIN =5V; VDS = 13V
Tjsh
Over temperature
shutdown
150
175
-
°C
Tjrs
Over temperature
reset
135
-
-
°C
Igf
Fault sink current
VIN = 5V; VDS =13V; Tj =Tjsh
10
15
20
mA
Eas
Single pulse
avalanche energy
starting Tj =25°C; VDD = 24V
VIN =5V; Rgen = RIN MIN =10Ω;
L=24mH
400
-
-
mJ
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Electrical specifications
2.5
Dual high-side switch timing data
Figure 3.
Switching time waveforms
Table 18.
Truth table
Conditions
14/33
VN771K
Input
Output
Status
Normal operation
L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Over temperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
Doc ID 12534 Rev 4
VN771K
Electrical specifications
Figure 4.
Open-load status timing (with external pull-up)
Figure 5.
Over temperature status timing
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Electrical specifications
VN771K
2.6
Electrical characterization for dual high side switch
Figure 6.
Off-state output current
Figure 7.
Input clamp voltage
Figure 8.
High level input current
Figure 9.
Input high level voltage
Figure 11.
Input hysteresis voltage
Figure 10. Input low level voltage
16/33
Doc ID 12534 Rev 4
VN771K
Electrical specifications
Figure 12. Overvoltage shutdown
Figure 13. ILIM vs Tcase
Figure 14. Turn-on voltage slope
Figure 15. Turn-off voltage slope
Figure 16. On-state resistance vs Tcase
Figure 17. On-state resistance vs VCC
Doc ID 12534 Rev 4
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Electrical specifications
VN771K
Figure 18. Status leakage current
Figure 19. Status low output voltage
Figure 20. Openload on-state detection
threshold
Figure 21. Openload off-state voltage
detection threshold
Figure 22. Status clamp voltage
18/33
Doc ID 12534 Rev 4
VN771K
2.7
Electrical specifications
Electrical characterization for low side switches
Figure 23. Static drain source on resistance
Figure 24. Derating curve
Figure 25. Transconductance
Figure 26. Transfer characteristics
Figure 27. Turn-on current slope (Vin=5V)
Figure 28. Turn-on current slope (Vin=3.5V)
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Electrical specifications
VN771K
Figure 29. Input voltage vs input charge
Figure 30. Capacitance variations
Figure 31. Switching time resistive load
(Vin=5V)
Figure 32. Switching time resistive load
(Rg=10Ohm)
Figure 33. Output characteristics
Figure 34. Step response current limit
20/33
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VN771K
Figure 35. Source drain diode forward
characteristics
Electrical specifications
Figure 36. Static drian source on resistance vs
Id
v
Figure 37. Static drain source on resistance vs Figure 38. Static drain source on resistance vs
input voltage (Id=7A)
input voltage
Figure 39. Normalized input threshold voltage Figure 40. Normalized on resistance vs
vs temperature
temperature
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Electrical specifications
VN771K
Figure 41. Turn-off drain source voltage slope Figure 42. Turn-off drain source voltage slope
(Vin=3.5V)
(Vin=5V)
Figure 43. Current limit vs junction
temperature
22/33
Doc ID 12534 Rev 4
VN771K
3
Application recommendations
Application recommendations
Figure 44. Application diagram bridge drivers
Most motor bridge drivers use a reverse battery protection diode (D) inside the supply rail.
This diode prevents a reverse current flow back to VBATT in case the bridge becomes
disabled via the logic inputs while motor inductance still carries energy. In order to prevent a
hazardous overvoltage at circuit supply terminal (VCC), a blocking capacitor (C) is needed to
limit the voltage overshoot. As basic orientation, 50µF per 1A load current is recommended.
As an alternative, a Zener protection (Z) is also suitable.
Even if a reverse polarity diode is not present, it is recommended to use a capacitor or
Zener at VCC because a similar problem appears in case the supply terminal of the module
has intermittent electrical contact to the battery or gets disconnected while the motor is
operating.
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Application recommendations
VN771K
Figure 45. Recommended motor operation
24/33
Doc ID 12534 Rev 4
VN771K
Application recommendations
Figure 46. Waveforms
Doc ID 12534 Rev 4
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Thermal data
VN771K
4
Thermal data
4.1
SO-28 thermal data
Figure 47. SO-28 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad layout to 6cm2).
Figure 48. Chipset configuration
LOW SIDE
CHIP
RthAB
channel 3
HIGH SIDE
CHIP
channel 1,2
RthA
RthB
RthAC
LOW SIDE
CHIP
channel 4
RthC
RthBC
Figure 49. Auto and mutual Rthj-amb vs PCB copper area in open box free air
condition(a)
a. see definitions in Section 5.2 on page 31
26/33
Doc ID 12534 Rev 4
VN771K
Thermal data
4.2
Thermal calculation in clockwise and anti-clockwise
operation in steady state mode
Table 19.
Thermal calculation in clockwise and anti-clockwise operation in steady state mode
HS1
HS2
LS3
LS4
TjHS12
On
Off
Off
On
PdHS1 x RthHS + PdLS4 x
RthHSLS + Tamb
PdHS1 x RthHSLS + PdLS4 PdHS1 x RthHSLS + PdLS4 x
x RthLSLS + Tamb
RthLS + Tamb
Off
On
On
Off
PdHS2 x RthHS + PdLS3 x
RthHSLS + Tamb
PdHS2 x RthHSLS + PdLS3 PdHS2 x RthHSLS + PdLS3 x
x RthLS + Tamb
RthLSLS + Tamb
4.2.1
TjLS3
TjLS4
Thermal resistances definition
Values according to the PCB heatsink area.
RthHS = RthHS1 = RthHS2 = high side chip thermal resistance junction to ambient (HS1 or HS2
in on-state)
RthLS = RthLS3 = RthLS4 = low side chip thermal resistance junction to ambient
RthHSLS = RthHS1LS4 = RthHS2LS3 = mutual thermal resistance junction to ambient between
high side and low side chips
RthLSLS = RthLS3LS4 = mutual thermal resistance junction to ambient between low side chips
4.2.2
Thermal calculation in transient mode(b)
TjHS12 = ZthHS x PdHS12 + ZthHSLS x (PdLS3 + PdLS4) + Tamb
TjLS3 = ZthHSLS x PdHS12 + ZthLS x PdLS3 + ZthLSLS x PdLS4 + Tamb
TjLS4 = ZthHSLS x PdHS12 + ZthLSLS x PdLS3 + ZthLS x PdLS4 + Tamb
4.2.3
Single pulse thermal impedance definition
Values according to the PCB heatsink area.
ZthHS = high side chip thermal impedance junction to ambient
ZthLS = ZthLS3 = ZthLS4 = low side chip thermal impedance junction to ambient
ZthHSLS = ZthHS12LS3 = ZthHS12LS4 = mutual thermal impedance junction to ambient between
high side and low side chips
ZthLSLS = ZthLS3LS4 = mutual thermal impedance junction to ambient between low side chips
4.2.4
Pulse calculation formula
Z
THδ
= R
TH
⋅δ+Z
THtp
(1 – δ)
where δ = tP/T
b. Calculation is valid in any dynamic operating condition. Pd values set by user.
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Thermal data
VN771K
Figure 50. SO-28 HSD thermal impedance junction ambient single pulse
Figure 51. SO-28 LSD thermal impedance junction ambient single pulse
28/33
Doc ID 12534 Rev 4
VN771K
Thermal data
Figure 52. Thermal fitting model of an H-bridge in SO-28
Table 20.
Thermal parameters(1)
Area/island (cm2)
Footprint
R1 = R6 (°C/W)
1.5
R2 (°C/W)
2.6
R12 = R17 (°C/W)
2.6
R3 = R13 = R 18 (°C/W)
15.5
R4 = R14 = R19 (°C/W)
10.5
R5 = R15 = R20 (°C/W)
62.28
R7 = R8 = R9 = R10 (°C/W)
150
R11 = R16 (°C/W)
1
C1 = C5 (W.s/°C)
0.00035
C2 = C7 = C11 (W.s/°C)
0.024
C3 = C8 =C 12 (W.s/°C)
0.2
C4 = C9 = C13 (W.s/°C)
1.6
C6 = C10 (W.s/°C)
0.0009
1
2
6
52.28
44.28
32.28
1.61
1.7
3.25
1. The blank space means that the value is the same as the previous one.
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Package mechanical data
VN771K
5
Package mechanical data
5.1
SO-28 mechanical data
Figure 53. SO-28 package outline
Table 21.
SO-28 mechanical data
mm
inch
DIM
Min.
Typ
A
Max.
Typ.
2.65
Max.
0.104
a1
0.1
0.3
0.004
0.012
b
0.35
0.49
0.013
0.019
b1
0.23
0.32
0.009
0.012
C
0.5
0.020
c1
45° (typ.)
D
17.7
18.1
0.697
0.713
E
10
10.65
0.393
0.419
e
1.27
0.050
e3
16.51
0.650
F
7.4
7.6
0.291
0.299
L
0.4
1.27
0.016
0.050
S
30/33
Min.
8° (max.)
Doc ID 12534 Rev 4
VN771K
5.2
Package mechanical data
SO-28 tube shipment
Figure 54. Tube dimensions (no suffix)
5.3
Tape and reel shipment
Figure 55. Tape and reel dimensions (suffix “13TR”)
Doc ID 12534 Rev 4
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Revision history
6
VN771K
Revision history
Table 22.
32/33
Document revision history
Date
Revision
Changes
01-Sep-2004
1
Initial release.
31-Aug-2006
2
Document formatted into new ST template
Dimensions updated, seeFigure 55: Tape and reel dimensions (suffix
“13TR”) on page 31
Application diagram updated, seeFigure 44: Application diagram
bridge drivers on page 23
30-Jun-2009
3
Updated Table 3: Thermal data
10-Jul-2009
4
Updated note of Figure 47: SO-28 PC board.
Updated Figure 48: Chipset configuration.
Doc ID 12534 Rev 4
VN771K
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