VNS3NV04DP-E OMNIFET II fully autoprotected Power MOSFET Features Max on-state resistance (per ch.) RON 120 mΩ Current limitation (typ) ILIMH 3.5 A VCLAMP 40 V Drain-source clamp voltage ■ ECOPACK®: lead free and RoHS compliant ■ Automotive Grade: compliance with AEC guidelines ■ Linear current limitation ■ Thermal shutdown ■ Short circuit protection ■ Integrated clamp ■ Low current drawn from input pin ■ Diagnostic feedback through input pin ■ ESD protection ■ Direct access to the gate of the Power MOSFET (analog driving) ■ Compatible with standard Power MOSFET Table 1. SO-8 Description The VNS3NV04DP-E device is made up of two monolithic chips (OMNIFET II) housed in a standard SO-8 package. The OMNIFET II is designed using STMicroelectronics™ VIPower™ M0-3 technology and is intended for replacement of standard Power MOSFETs in up to 50 kHz DC applications. Built-in thermal shutdown, linear current limitation and overvoltage clamp protect the chip in harsh environments. Fault feedback can be detected by monitoring voltage at the input pin Device summary Order codes Package SO-8 March 2011 Tube Tape and reel VNS3NV04DP-E VNS3NV04DPTR-E Doc ID 018529 Rev 1 1/21 www.st.com 1 Contents VNS3NV04DP-E Contents 1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 4 5 2/21 2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Protection features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.1 Overvoltage clamp protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.2 Linear current limiter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.3 Overtemperature and short circuit protection . . . . . . . . . . . . . . . . . . . . . . 16 3.4 Status feedback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.1 ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.2 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.3 SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Doc ID 018529 Rev 1 VNS3NV04DP-E List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Dynamic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 Doc ID 018529 Rev 1 3/21 List of figures VNS3NV04DP-E List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. 4/21 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Switching time test circuit for resistive load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Test circuit for diode recovery times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Unclamped inductive load test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Input charge test circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Unclamped inductive waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 12 Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Static drain-source on resistance vs Id . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-on current slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain source voltage slope (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Turn-off drain-source voltage slope (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Switching time resistive load (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Normalized current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 SO-8 package dimension . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Doc ID 018529 Rev 1 VNS3NV04DP-E 1 Block diagram and pin description Block diagram and pin description Figure 1. Block diagram DRAIN2 DRAIN1 OVERVOLTAGE CLAMP OVERVOLTAGE CLAMP INPUT1 GATE CONTROL GATE CONTROL OVER TEMPERATURE LINEAR CURRENT LIMITER LINEAR CURRENT LIMITER SOURCE1 Figure 2. INPUT2 OVER TEMPERATURE SOURCE2 Configuration diagram (top view) SOURCE 1 1 8 DRAIN 2 SOURCE 2 INPUT 2 DRAIN 1 DRAIN 1 INPUT 1 4 Doc ID 018529 Rev 1 5 DRAIN 2 5/21 Electrical specifications 2 VNS3NV04DP-E Electrical specifications Figure 3. Current and voltage conventions RIN1 IIN1 ID1 INPUT 1 VIN1 IIN2 DRAIN 1 RIN2 ID2 INPUT 2 VIN2 2.1 SOURCE 1 VDS1 DRAIN 2 VDS1 SOURCE 2 Absolute maximum ratings Stressing the device above the rating listed in the “Absolute maximum ratings” table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to Absolute maximum rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE program and other relevant quality document. Table 2. Absolute maximum ratings Symbol Value Unit VDSn Drain-Source Voltage (VINn = 0 V) Internally clamped V VINn Input voltage Internally clamped V IINn Input current +/- 20 mA 220 Ω Internally limited A RIN MINn Minimum input series impedance IDn Drain current IRn Reverse DC output current -5.5 A VESD1 Electrostatic discharge (R = 1.5 KΩ, C = 100 pF) 4000 V VESD2 Electrostatic discharge on output pins only (R = 330 Ω, C = 150 pF) 16500 V 4 Ω Ptot Total dissipation at Tc = 25 °C Tj Operating junction temperature Internally limited °C Tc Case operating temperature Internally limited °C -55 to 150 °C Tstg 6/21 Parameter Storage temperature Doc ID 018529 Rev 1 VNS3NV04DP-E 2.2 Electrical specifications Thermal data Table 3. Thermal data Symbol Parameter Rthj-lead Thermal resistance junction-lead (per channel) Rthj-amb Thermal resistance junction-ambient Max value Unit 30 °C/W 80(1) °C/W 2 1. When mounted on a standard single-sided FR4 board with 50mm of Cu (at least 35 μm thick) connected to all DRAIN pins of the relative channel 2.3 Electrical characteristics Values specified in this section are for -40 °C < Tj < 150 °C, unless otherwise stated. Table 4. Symbol Off Parameter Test conditions Min Typ Max Unit 45 55 V VCLAMP Drain-source clamp voltage VIN = 0 V; ID = 1.5 A 40 VCLTH Drain-source clamp threshold voltage VIN = 0 V; ID = 2 mA 36 VINTH Input threshold voltage VDS = VIN; ID = 1 mA 0.5 IISS Supply current from input pin VDS = 0 V; VIN = 5 V Input-source clamp voltage IIN = 1 mA 6 VINCL IIN = -1 mA -1 IDSS Zero input voltage drain current (VIN = 0 V) Table 5. Symbol RDS(on) V 2.5 V 100 150 µA 6.8 8 V -0.3 V VDS = 13 V; VIN = 0 V; Tj = 25 °C 30 µA VDS = 25 V; VIN = 0 V 75 µA On Parameter Test conditions Static drain-source on VIN = 5 V; ID = 1.5 A; Tj = 25 °C resistance VIN = 5 V; ID = 1.5 A Min Typ Max Unit — — 120 mΩ — — 240 mΩ Min Typ Max Unit Tj = 25 °C, unless otherwise specified Table 6. Symbol Dynamic Parameter Test conditions gfs (1) Forward transconductance VDD = 13 V; ID = 1.5 A — 5.0 — S COSS Output capacitance VDS = 13 V; f = 1 MHz; VIN = 0 V — 150 — pF Doc ID 018529 Rev 1 7/21 Electrical specifications Table 7. Symbol td(on) tr td(off) tf td(on) tr td(off) tf VNS3NV04DP-E Switching Parameter Test conditions Turn-on delay time VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = RIN MIN = 220 Ω (see Figure 4) Rise time Turn-off delay time Fall time Turn-on delay time VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = 2.2 KΩ (see Figure 4) Rise time Turn-off delay time Fall time (dI/dt)on Turn-on current slope Qi Table 8. Symbol VSD(1) Min Total input charge Typ Max Unit 90 300 ns 250 750 ns 450 1350 ns 250 750 ns 0.45 1.35 µs 2.5 7.5 µs 3.3 10.0 µs 2.0 6.0 µs VDD = 15 V; ID = 1.5 A; Vgen = 5 V; Rgen = RIN MIN = 220 Ω 4.7 A/µs VDD = 12 V; ID = 1.5 A; VIN = 5 V; Igen = 2.13 mA (see Figure 7) 8.5 nC Source drain diode Parameter Test conditions Forward on voltage Min ISD = 1.5 A; VIN = 0 V trr Reverse recovery time Qrr Reverse recovery charge IRRM Reverse recovery current ISD = 1.5 A; dI/dt = 12 A/µs; VDD = 30 V; L = 200 µH (see Figure 5) Typ Max Unit 0.8 V 107 ns 37 µC 0.7 A 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5% -40 °C < Tj < 150 °C, unless otherwise specified Table 9. Symbol 8/21 Protections Parameter Test conditions Min Typ Max Unit Ilim Drain current limit VIN = 5 V; VDS = 13 V tdlim Step response current limit VIN = 5 V; VDS = 13 V Tjsh Overtemperature shutdown 150 175 Tjrs Overtemperature reset 135 Igf Fault sink current VIN = 5 V; VDS = 13 V; Tj = Tjsh 10 Eas Single pulse avalanche energy Starting Tj = 25 °C; VDD = 24 V; VIN = 5 V; Rgen = RIN MIN = 220 Ω; L = 24 mH (see Figure 6 and Figure 8) 100 Doc ID 018529 Rev 1 3.5 5 7 10 A µs 200 °C °C 15 20 mA mJ VNS3NV04DP-E Figure 4. Electrical specifications Switching time test circuit for resistive load VD Rgen Vgen ID 90% tr tf 10% t td(on) Vgen td(off) t Figure 5. Test circuit for diode recovery times A A D I FAST DIODE OMNIFET S L=100uH B B 220Ω D Rgen VDD I Vgen OMNIFET S 8.5 Ω Doc ID 018529 Rev 1 9/21 Electrical specifications Figure 6. VNS3NV04DP-E Unclamped inductive load test circuits RGEN VIN PW Figure 7. Input charge test circuit VIN GEN ND8003 10/21 Doc ID 018529 Rev 1 VNS3NV04DP-E Figure 8. Electrical specifications Unclamped inductive waveforms Doc ID 018529 Rev 1 11/21 Electrical specifications 2.4 VNS3NV04DP-E Electrical characteristics curves Figure 9. Source-drain diode forward characteristics Figure 10. Static drain-source on resistance Vsd (mV) Rds(on) (mohms) 1100 1000 1050 Tj=-40ºC 900 Vin=0V 1000 Vin=2.5V 800 950 700 900 600 850 500 800 400 750 300 700 200 650 100 Tj=25ºC Tj=150ºC 0 600 0 1 2 3 4 5 6 7 8 9 10 11 0.05 12 0.1 0.15 0.2 0.25 Figure 11. Derating curve 0.3 0.35 0.4 0.45 0.5 0.55 Id(A) Id (A) Figure 12. Static drain-source on resistance vs input voltage (part 1) Rds(on) (mohms) 300 275 250 Tj=150ºC 225 200 175 Id=3.5A Id=1A 150 Tj=25ºC 125 100 Tj=-40ºC 75 Id=3.5A Id=1A 50 Id=3.5A Id=1A 25 0 3 3.5 4 4.5 5 5.5 6 6.5 Vin(V) Figure 13. Static drain-source on resistance vs input voltage (part 2) Figure 14. Transconductance Gfs (S) Rds(on) (mohms) 250 11 225 10 Id=1.5A 200 Vds=13V 9 Tj=-40ºC Tj=25ºC 8 175 Tj=150ºC 150 Tj=150ºC 7 6 125 5 100 4 75 3 Tj=25ºC 50 2 Tj=-40ºC 25 1 0 0 3 3.5 4 4.5 5 5.5 6 6.5 12/21 0 0.5 1 1.5 2 2.5 3 Id (A) Vin(V) Doc ID 018529 Rev 1 3.5 4 4.5 5 5.5 VNS3NV04DP-E Electrical specifications Figure 15. Static drain-source on resistance vs Id Figure 16. Transfer characteristics Idon (A) Rds(on) (mohms) 250 6 225 5.5 Vin=5V 200 Vds=13.5V 5 Tj=150ºC 4.5 175 4 150 Tj=150ºC 3.5 125 3 Tj=25ºC 100 Tj=-40ºC 2.5 2 75 1.5 50 Tj= - 40ºC Tj=25ºC 1 25 0.5 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 1.5 2 2.5 3 Id (A) 3.5 4 4.5 5 5.5 6 Vin (V) Figure 17. Turn-on current slope (part 1) Figure 18. Turn-on current slope (part 2) di/dt(A/us) di/dt(A/usec) 5 1.75 4.5 Vin=5V Vdd=15V Id=1.5A 4 3.5 1.5 Vin=3.5V Vdd=15V Id=1.5A 1.25 3 1 2.5 0.75 2 1.5 0.5 1 0.25 0.5 0 0 0 250 500 0 750 1000 1250 1500 1750 2000 2250 2500 250 500 750 1000 1250 1500 1750 2000 2250 2500 Rg(ohm) Rg(ohm) Figure 19. Input voltage vs input charge Figure 20. Turn-off drain source voltage slope (part 1) Vin (V) dv/dt(V/usec) 9 300 275 8 Vds=1V Id=1.5A 7 Vin=5V Vdd=15V Id=1.5A 250 225 200 6 175 5 150 4 125 100 3 75 2 50 1 25 0 0 0 1 2 3 4 5 6 7 8 9 10 11 Qg (nC) 0 500 250 1000 750 1500 1250 2000 1750 2500 2250 Rg(ohm) Doc ID 018529 Rev 1 13/21 Electrical specifications VNS3NV04DP-E Figure 21. Turn-off drain-source voltage Figure 22. Capacitance variations slope (part 2) dv/dt(V/usec) C(pF) 300 350 275 Vin=3.5V Vdd=15V Id=1.5A 250 225 300 f=1MHz Vin=0V 200 250 175 150 200 125 100 150 75 50 100 25 0 50 0 500 1000 250 750 1500 1250 2000 1750 2500 0 2250 5 10 15 20 25 30 35 Vds(V) Rg(ohm) Figure 23. Switching time resistive load Figure 24. Switching time resistive load (part 1) (part 1) t(usec) t(nsec) 4 900 3.5 3 800 td(off) Vdd=15V Id=1.5A Vin=5V tr Vdd=15V Id=1.5A Rg=220ohm 700 tr 600 2.5 500 2 tf 400 td(off) 1.5 300 1 tf 200 td(on) 0.5 td(on) 100 0 0 0 500 250 1000 750 1500 1250 2000 1750 2500 3.25 2250 3.5 3.75 4 4.25 4.5 4.75 5 5.25 Vin(V) Rg(ohm) Figure 25. Output characteristics Figure 26. Normalized on resistance vs temperature Id (A) Rds(on) (mOhm) 5 4 Vin=5V 4.5 Vin=4V 3.5 4 3.5 Vin=5V Id=1.5A 3 Vin=3V 3 2.5 2.5 2 2 1.5 1.5 1 1 0.5 0.5 0 0 1 2 3 4 5 6 7 8 9 10 14/21 -50 -25 0 25 50 75 Tc )ºC) Vds (V) Doc ID 018529 Rev 1 100 125 150 175 VNS3NV04DP-E Electrical specifications Figure 27. Normalized input threshold voltage vs temperature Figure 28. Normalized current limit vs junction temperature Vinth (V) Ilim (A) 10 2 1.8 9 Vds=Vin Id=1mA 1.6 1.4 7 1.2 6 1 5 0.8 4 0.6 3 0.4 2 0.2 1 0 0 -50 -25 0 Vin=5V Vds=13V 8 25 50 75 100 125 150 175 Tc (ºC) -50 -25 0 25 50 75 100 125 150 175 Tc (ºC) Figure 29. Step response current limit Tdlim(usec) 13 12.5 Vin=5V Rg=220ohm 12 11.5 11 10.5 10 9.5 9 8.5 8 7.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30 32.5 Vdd(V) Doc ID 018529 Rev 1 15/21 Protection features 3 VNS3NV04DP-E Protection features During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path. The device then behaves like a standard power MOSFET and can be used as a switch from DC up to 50 KHz. The only difference from the user’s standpoint is that a small DC current IISS (typ. 100 µA) flows into the INPUT pin in order to supply the internal circuitry. The following sections describe the device features. 3.1 Overvoltage clamp protection Internally set at 45 V, along with the rugged avalanche characteristics of the Power MOSFET stage give this device unrivalled ruggedness and energy handling capability. This feature is mainly important when driving inductive loads. 3.2 Linear current limiter circuit Limits the drain current ID to Ilim whatever the INPUT pin voltages. When the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold Tjsh. 3.3 Overtemperature and short circuit protection These are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. Overtemperature cutout occurs in the range 150 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature falls of about 15 °C below shutdown temperature. 3.4 Status feedback In the case of an overtemperature fault condition (Tj > Tjsh), the device tries to sink a diagnostic current Igf through the INPUT pin in order to indicate fault condition. If driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. If the drive impedance is high enough so that the INPUT pin driver is not able to supply the current Igf, the INPUT pin falls to 0 V. This however not affects the device operation: no requirement is put on the current capability of the INPUT pin driver except to be able to supply the normal operation drive current IISS. Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit. 16/21 Doc ID 018529 Rev 1 VNS3NV04DP-E Package and packing information 4 Package and packing information 4.1 ECOPACK® packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 4.2 SO-8 mechanical data Table 10. SO-8 mechanical data mm Dim. Min. Typ. A Max. 1.75 A1 0.10 A2 1.25 b 0.28 0.48 c 0.17 0.23 D(1) 4.80 4.90 5.00 E 5.80 6.00 6.20 E1(2) 3.80 3.90 4.00 e 0.25 1.27 h 0.25 0.50 L 0.40 1.27 L1 k 1.04 0° ccc 8° 0.10 1. Dimension “D” does not include mold Flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs shall not exceed 0.15 mm in total (both side). 2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not exceed 0.25 mm per side. Doc ID 018529 Rev 1 17/21 Package and packing information VNS3NV04DP-E Figure 30. SO-8 package dimension 0016023 D 18/21 Doc ID 018529 Rev 1 VNS3NV04DP-E 4.3 Package and packing information SO-8 packing information Figure 31. SO-8 tube shipment (no suffix) B Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1) C A 100 2000 532 3.2 6 0.6 All dimensions are in mm. Figure 32. Tape and reel shipment (suffix “TR”) REEL DIMENSIONS Base Q.ty Bulk Q.ty A (max) B (min) C (± 0.2) F G (+ 2 / -0) N (min) T (max) 2500 2500 330 1.5 13 20.2 12.4 60 18.4 All dimensions are in mm. TAPE DIMENSIONS According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb. 1986 Tape width Tape Hole Spacing Component Spacing Hole Diameter Hole Diameter Hole Position Compartment Depth Hole Spacing W P0 (± 0.1) P D (± 0.1/-0) D1 (min) F (± 0.05) K (max) P1 (± 0.1) All dimensions are in mm. 12 4 8 1.5 1.5 5.5 4.5 2 End Start Top cover tape No components Components No components 500mm min Empty components pockets saled with cover tape. 500mm min User direction of feed Doc ID 018529 Rev 1 19/21 Revision history 5 VNS3NV04DP-E Revision history Table 11. 20/21 Document revision history Date Revision 09-Mar-2011 1 Changes Initial release. Doc ID 018529 Rev 1 VNS3NV04DP-E Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. 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