VN5770AKP-E
Quad smart power solid state relay for complete
H-bridge configurations
Datasheet − production data
Features
Type
RDS(on)
IOUT (typ)
VCC
Root part
number 1
280 mΩ(1)
8.5 A
36 V
SO-28
1. Total resistance of one side in bridge configuration
■
ECOPACK®: lead free and RoHS compliant
■
Automotive Grade: compliance with AEC
guidelines
■
General features
– Inrush current management by active
power limitation on the high-side switches
– Very low standby current
– Very low electromagnetic susceptibility
– Compliance with European directive
2002/95/EC
■
Protection
– High-side drivers undervoltage shutdown
– Overvoltage clamp
– Output current limitation
– High and low-side overtemperature
shutdown
– Short circuit protection
– ESD protection
■
Diagnostic functions
– Proportional load current sense
– Thermal shutdown indication on both the
high and low-side switches
Applications
■
DC motor driving in full or half bridge
configuration
■
All types of resistive, inductive and capacitive
loads
October 2012
This is information on a product in full production.
Description
The Root part number 1 is a device formed by
three monolithic chips housed in a standard SO28 package: a double high-side and two low-side
switches. The double high-side is made using
STMicroelectronics® VIPower® M0-5 technology,
while the low-side switches are fully protected
VIPower M0-3 OMNIFET II. This device is suitable
to drive a DC motor in a bridge configuration as
well as to be used as a quad switch for any low
voltage application.
The dual high-side switches integrate built in non
latching thermal shutdown with thermal
hysteresis. An output current limiter protects the
device in overload condition. In case of long
overload duration, the device limits the dissipated
power to a safe level up to thermal shutdown
intervention. An analog current sense pin delivers
a current proportional to the load current
(according to a known ratio) and indicates
overtemperature shutdown of the relevant highside switch through a voltage flag.
The low-side switches have built in non latching
thermal shutdown with thermal hysteresis, linear
current limitation and overvoltage clamping.
Fault feedback for overtemperature shutdown of
the low-side switch is indicated by the relevant
input pin current consumption going up to the fault
sink current flag.
Doc ID 17772 Rev. 4
1/35
www.st.com
1
Contents
VN5770AKP-E
Contents
1
Block diagram and pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1
3
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
Electrical characteristics for dual high-side switch . . . . . . . . . . . . . . . . . . 10
3.2
Electrical characteristics curves for dual high-side switch . . . . . . . . . . . . 14
3.3
Electrical characteristics for low-side switches . . . . . . . . . . . . . . . . . . . . . 16
3.4
Electrical characteristics curves for low-side switches . . . . . . . . . . . . . . . 18
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.1
5
Maximum demagnetization energy (VCC = 13.5 V) . . . . . . . . . . . . . . . . . 24
Package and thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
5.1
6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
SO-28 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.2
SO-28 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
6.3
SO-28 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
7
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
8
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
2/35
Doc ID 17772 Rev. 4
VN5770AKP-E
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Dual high-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Low-side switch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Switching (VCC = 13 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Logic input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Protection and diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current sense (8V<VCC<16V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Off . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
On . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Dynamic (Tj = 25°C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Switching (Tj = 25 °C, unless otherwise specified) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Source drain diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise specified) . . . . . . . . . 17
Thermal calculations in clockwise and anti-clockwise operation in steady-state mode . . . 26
Thermal resistances definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Single pulse thermal impedance definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Thermal calculations in transient mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SO-28 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
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List of figures
VN5770AKP-E
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
Figure 36.
Figure 37.
Figure 38.
Figure 39.
Figure 40.
Figure 41.
Figure 42.
Figure 43.
Figure 44.
Figure 45.
4/35
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Switching time waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Output voltage drop limitation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Current sense delay characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Off-state output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On-state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
On-state resistance vs VCC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Undervoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
ILIMH vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Static drain source on resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Derating curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Transconductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Transfer characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Input voltage vs input charge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Capacitance variations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Output characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Step response current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Source-drain diode forward characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Static drain-source on resistance vs ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Static drain-source on resistance vs input voltage (part 1) . . . . . . . . . . . . . . . . . . . . . . . . . 19
Static drain-source on resistance vs input voltage (part 2) . . . . . . . . . . . . . . . . . . . . . . . . . 19
Normalized input threshold voltage vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Normalized on resistance vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Current limit vs junction temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Recommended motor operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Maximum turn off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-28 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Chipset configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Auto and mutual Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . 26
SO-28 HSD thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . 27
SO-28 LSD thermal impedance junction ambient single pulse. . . . . . . . . . . . . . . . . . . . . . 28
Thermal fitting model of an H-bridge in SO-28 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
SO-28 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
SO-28 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Doc ID 17772 Rev. 4
VN5770AKP-E
1
Block diagram and pin descriptions
Block diagram and pin descriptions
Figure 1.
Block diagram
6CC
6CC
CLAMP
5NDERVOLTAGE
'.$
#LAMP
).054
3/52#%
$RIVER
#LAMP
).054
,OGIC
#URRENTLIMITER
$RIVER
6DSLIMITER
3/52#%
#URRENTLIMITER
/VERTEMP
0OWERLIMITATION
/VERTEMP
6$3LIMITER
0OWERLIMITATION
+
#3%.3%
+
).054
)$3
)$3
/VERVOLTAGE
#LAMP
$2!).
'ATE
#ONTROL
3/52#%
/VER
4EMPERATURE
,INEAR
#URRENT
,IMITER
/VERVOLTAGE
#LAMP
).054
$2!).
'ATE
#ONTROL
3/52#%
/VER
4EMPERATURE
,INEAR
#URRENT
,IMITER
("1($'5
Doc ID 17772 Rev. 4
5/35
Block diagram and pin descriptions
Table 1.
Pin descriptions
No
Name
1, 3, 25, 28
DRAIN 3
Drain of switch 3 (low-side switch)
2
INPUT 3
Input of switch 3 (low-side switch)
4, 11
N.C.
Not connected
5, 10, 19, 24
VCC
Drain of switches 1 and 2 (high-side switches) and power supply
voltage
6
GND
Ground of switches 1 and 2 (high-side switches)
7
INPUT 1
Input of switch 1 (high-side switches)
8
INPUT 2
Input of switch 2 (high-side switch)
9
CURRENT
SENSE
12, 14, 15, 18
DRAIN 4
Drain of switch 4 (low-side switch)
13
INPUT 4
Input of switch 4 (low-side switch)
16, 17
SOURCE 4
Source of switch 4 (low-side switch)
20, 21
SOURCE 2
Source of switch 2 (high-side switch)
22, 23
SOURCE 1
Source of switch 1 (high-side switch)
26, 27
SOURCE 3
Source of switch 3 (low-side switch)
Figure 2.
6/35
VN5770AKP-E
Function
Analog current sense pin, it delivers a current proportional to the
load current
Configuration diagram (top view)
Doc ID 17772 Rev. 4
VN5770AKP-E
Table 2.
Symbol
Block diagram and pin descriptions
Thermal data
Parameter
Max value
Unit
Rthj-case
Thermal resistance junction-lead (high-side switch)
10
°C/W
Rthj-case
Thermal resistance junction-lead (low-side switch)
7
°C/W
Rthj-amb
Thermal resistance junction-ambient
See Figure 39
°C/W
Doc ID 17772 Rev. 4
7/35
Absolute maximum ratings
2
VN5770AKP-E
Absolute maximum ratings
Stressing the device above the rating listed in Table 3 and Table 4 may cause permanent
damage to the device. These are stress ratings only and operation of the device at these or
any other conditions above those indicated in the Operating sections of this specification is
not implied. Exposure to the conditions in Section 2.1: Absolute maximum ratings for
extended periods may affect device reliability.
2.1
Absolute maximum ratings
Table 3.
Dual high-side switch
Symbol
Parameter
Unit
VCC
DC supply voltage
41
V
-VCC
Reverse DC supply voltage
0.3
V
-IGND
DC reverse ground pin current
200
mA
IOUT
DC output current
Internally limited
A
-IOUT
Reverse DC output current
-12
A
DC input current
-1 to 10
mA
DC current sense disable input current
-1 to 10
mA
VCC-41
+VCC
V
V
32
mJ
IIN
ICSD
VCSENSE Current sense maximum voltage
EMAX
Maximum switching energy (single pulse)
(L = 3.7 mH; RL = 0 Ω; Vbat = 13.5 V; Tjstart = 150 °C;
IOUT = IlimL(Typ.))
VESD
Electrostatic discharge (Human Body Model: R = 1.5 KΩ;
C = 100 pF)
- INPUT
- CURRENT SENSE
- OUTPUT
- VCC
4000
2000
5000
5000
VESD
Charge device model (CDM-AEC-Q100-011)
750
V
Junction operating temperature
-40 to 150
°C
Storage temperature
-55 to 150
°C
Tj
Tstg
8/35
Value
Doc ID 17772 Rev. 4
V
V
V
V
VN5770AKP-E
Absolute maximum ratings
Table 4.
Low-side switch
Symbol
Parameter
Value
Unit
VDSn
Drain-source voltage (VINn = 0 V)
Internally clamped
V
VINn
Input voltage
Internally clamped
V
IINn
Input current
+/-20
mA
220
Ω
Internally limited
A
-12
A
RIN MINn
Minimum input series impedance
IDn
Drain current
IRn
Reverse DC output current
VESD1
Electrostatic discharge (R = 1.5 KΩ, C = 100 pF)
4000
V
VESD2
Electrostatic discharge on output pins only
(R = 330 Ω, C = 150 pF)
16500
V
4
W
Ptot
Total dissipation at Tc = 25 °C
Tj
Operating junction temperature
Internally limited
°C
Tc
Case operating temperature
Internally limited
°C
-55 to 150
°C
Tstg
Storage temperature
Doc ID 17772 Rev. 4
9/35
Electrical characteristics
VN5770AKP-E
3
Electrical characteristics
3.1
Electrical characteristics for dual high-side switch
Values specified in this section are for 8 V < VCC < 36 V; -40 °C < Tj < 150 °C, unless
otherwise specified (for each channel).
Table 5.
Power section
Symbol
Parameter
VCC
Operating supply
voltage
VUSD
VUSDhyst
Test conditions
Min.
4.5
13
36
V
Undervoltage shutdown
3.5
4.5
V
Undervoltage shutdown
hysteresis
0.5
V
160
mΩ
IOUT = 3 A; Tj = 25 °C
RON
Vclamp
IS
IL(off)
VF
Typ. Max. Unit
On-state resistance
Clamp Voltage
IOUT = 3 A; Tj = 150 °C
320
mΩ
IOUT = 3 A; VCC = 5 V; Tj = 25 °C
210
mΩ
46
52
V
Off-state; VCC = 13 V; Tj = 25 °C;
VIN = VOUT = VSENSE = 0 V
2(1)
5(1)
µA
On-state; VCC = 13 V; VIN = 5 V;
IOUT = 0 A
3
6
mA
IS = 20 mA
Supply current
Off-state output
current(2)
Output - VCC diode
voltage(2)
41
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 25 °C
0
3
µA
VIN = VOUT = 0 V; VCC = 13 V;
Tj = 125 °C
0
5
µA
0.7
V
-IOUT = 3 A; Tj = 150 °C
1. PowerMOS leakage included
2. For each channel
Table 6.
Symbol
10/35
Switching (VCC = 13 V)
Parameter
Test conditions
Min.
Typ.
Max. Unit
td(on)
Turn-on delay time
RL = 4.3 Ω (see Figure 3)
—
15
—
μs
td(off)
Turn-off delay time
RL = 4.3 Ω (see Figure 3)
—
10
—
μs
(dVOUT/dt)on Turn-on voltage slope RL = 4.3 Ω
—
See Figure 15
—
V/μs
(dVOUT/dt)off Turn-off voltage slope RL = 4.3 Ω
—
See Figure 17
—
V/μs
WON
Switching energy
losses during twon
RL = 4.3 Ω (see Figure 3)
—
0.16
—
mJ
WOFF
Switching energy
losses during twoff
RL = 4.3 Ω (see Figure 3)
—
0.08
—
mJ
Doc ID 17772 Rev. 4
VN5770AKP-E
Electrical characteristics
Table 7.
Symbol
Logic input
Parameter
Test conditions
VIL
Input low level voltage
IIL
Low level input current
VIH
Input high level voltage
IIH
High level input current
VI(hyst)
Input hysteresis voltage
VICL
Table 8.
IlimH
DC Short circuit current
IlimL
Short circuit current
during thermal cycling
TTSD
Shutdown temperature
0.9
V
2.1
V
VIN = 2.1 V
10
0.25
μA
V
5.5
7
-0.7
Test conditions
V
V
VCC = 13 V
Min.
Typ.
Max.
Unit
6
8.5
12
A
12
A
5 V < VCC < 36 V
TR
Reset temperature
TRS
Thermal reset of
STATUS
VON
Unit
Protection and diagnostics(1)
Parameter
VDEMAG
Max.
μA
IIN = -1 mA
Symbol
THYST
Typ.
1
VIN = 0.9 V
IIN = 1 mA
Input clamp voltage
Min.
VCC = 13 V; TR < Tj < TTSD
3.5
150
175
A
200
TRS + 1 TRS + 5
135
Thermal hysteresis
(TTSD-TR)
Turn-off output voltage
clamp
IOUT = 1 A; VIN = 0;
L = 20 mH
Output voltage drop
limitation
IOUT = 0.03 A;
Tj = -40 °C to 150 °C
(see Figure 4)
°C
°C
°C
7
°C
VCC-41 VCC-46 VCC-52
V
25
mV
1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related
diagnostic signals must be used together with a proper software strategy. If the device is subjected to
abnormal conditions, this software must limit the duration and number of activation cycles
Doc ID 17772 Rev. 4
11/35
Electrical characteristics
VN5770AKP-E
Current sense (8V<VCC<16V)
Table 9.
Symbol
Parameter
Test conditions
Min.
Typ. Max. Unit
850
1450 2120
840
980
1360 2000
1360 1740
K0
IOUT/ISENSE
IOUT = 0.08 A;
VSENSE = 0.5 V;
Tj = -40°C to 50°C
K1
IOUT/ISENSE
IOUT = 0.35 A; VSENSE = 0.5V;
Tj = -40°C to 150°C
Tj = 25°C to 150°C
K2
IOUT/ISENSE
IOUT = 3A; VSENSE = 4V;
Tj = -40°C to 150°C
1200 1270 1350
K3
IOUT/ISENSE
IOUT = 4A; VSENSE = 4V;
Tj = -40°C to 150°C
1200 1270 1350
Analog sense current
ISENSE0
IOUT = 0A; VSENSE = 0V;
VIN = 0V; Tj = -40°C to 150°C
0
1
μA
IOUT = 0A; VSENSE = 0V;
VIN = 5V; Tj = -40°C to 150°C
0
2
μA
IOUT = 5A; RSENSE = 3.9KΩ
5
VSENSE
Max analog sense output
voltage
VSENSEH
Analog sense output voltage
V = 13V; RSENSE = 3.9KΩ
in overtemperature condition CC
9
V
ISENSEH
Analog sense output current
V = 13V
in overtemperature condition CC
8
mA
V
tDSENSE2H
Delay response time from
rising edge of INPUT pin
VSENSE<4V; 0.35A<Iout<5A;
ISENSE = 90% of ISENSE max
(see Figure 5)
70
300
μs
tDSENSE2L
Delay response time from
falling edge of INPUT pin
VSENSE<4V; 0.35A<Iout<5A;
ISENSE = 10% of ISENSE max
(see Figure 5)
100
250
μs
Figure 3.
Switching time waveforms
6/54N
D6/54DTOFF
D6/54DTON
T
6).N
TDON
TDOFF
T
("1($'5
12/35
Doc ID 17772 Rev. 4
VN5770AKP-E
Electrical characteristics
Figure 4.
Output voltage drop limitation
6CC6OU T
4JO#
4JO#
4JO#
6ON
6ON2ON4
)OUT
("1($'5
Table 10.
Truth table
Conditions
Input
Output
Sense
Normal operation
L
H
L
H
0
Nominal
Overtemperature
L
H
L
L
0
VSENSEH
Undervoltage
L
H
L
L
0
0
Short circuit to GND
L
H
L
L
0
0
Short circuit to VCC
L
H
H
H
0
< Nominal
Negative output voltage
clamp
L
L
0
Figure 5.
Current sense delay characteristics
,1387
/2$'&855(17
6(16(&855(17
W'6(16(+
W'6(16(/
*$3*&)7
Doc ID 17772 Rev. 4
13/35
Electrical characteristics
3.2
VN5770AKP-E
Electrical characteristics curves for dual high-side switch
Figure 6.
Off-state output current
)LOFFU!
Figure 7.
High level input current
)IHU!
6IN6
/FF3TATE
6CC6
6IN6OUT 6
4C #
Input clamp voltage
("1($'5
Figure 9.
6ICL6
4C #
("1($'5
Figure 8.
Input low level
6IL6
LI NM!
4C #
4C #
("1($'5
("1($'5
Figure 10. Input high level
Figure 11. Input hysteresis voltage
6IHYST6
6IH6
4C #
14/35
("1($'5
Doc ID 17772 Rev. 4
4C #
("1($'5
VN5770AKP-E
Electrical characteristics
Figure 12. On-state resistance vs Tcase
Figure 13. On-state resistance vs VCC
2ONM/HM
2ONM/HM
)OUT !
6CC6
)OUT !
4C #
4C #
4C #
4C #
4C #
Figure 14. Undervoltage shutdown
("1($'5
6CC6
("1($'5
Figure 15. Turn-on voltage slope
6USD6
D6OUTDTON6MS
6CC6
2)/HM
4C #
Figure 16. ILIMH vs Tcase
("1($'5
4C #
("1($'5
Figure 17. Turn-off voltage slope
)LIMH!
D6OUTDTOFF6MS
6CC6
6CC6
2)/HM
4C #
("1($'5
Doc ID 17772 Rev. 4
4C #
("1($'5
15/35
Electrical characteristics
3.3
VN5770AKP-E
Electrical characteristics for low-side switches
Values specified in this section are for -40 °C < Tj < 150 °C, unless otherwise specified
Table 11.
Off
Symbol
Test conditions
Min
Typ
Max
Unit
45
55
V
VCLAMP
Drain-source clamp
voltage
VIN = 0 V; ID = 1.5 A
40
VCLTH
Drain-source clamp
threshold voltage
VIN = 0 V; ID = 2 mA
36
VINTH
Input threshold voltage VDS = VIN; ID = 1 mA
IISS
Supply current from
input pin
VINCL
Input-source clamp
voltage
IDSS
Zero input voltage
drain current
(VIN = 0V)
Table 12.
Symbol
RDS(on)
Table 13.
Symbol
gfs
COSS
Table 14.
Symbol
td(on)
tr
td(off)
tf
td(on)
tr
td(off)
tf
16/35
Parameter
V
0.5
2.5
V
100
150
µA
6.8
8
V
-0.3
V
VDS = 13 V; VIN = 0 V; Tj = 25 °C
30
µA
VDS = 25 V; VIN = 0 V
75
µA
VDS = 0 V; VIN = 5 V
IIN = 1 mA
6
IIN = -1 mA
-1.0
On
Parameter
Test conditions
Static drain-source on VIN = 5 V; ID = 3 A; Tj = 25 °C
resistance
VIN = 5 V; ID = 3 A
Min
Typ
Max
Unit
—
—
120
mΩ
—
—
240
mΩ
Min
Typ
Max
Unit
Dynamic (Tj = 25°C, unless otherwise specified)
Parameter
Test conditions
Forward
transconductance
VDD = 13 V; ID = 1.5 A
—
2.5
—
S
Output capacitance
VDS = 13 V; f = 1 MHz; VIN = 0 V
—
150
—
pF
Min
Typ
Max
Unit
—
200
400
ns
—
1.2
2.5
µs
—
600
1350
ns
Fall time
—
400
1000
ns
Turn-on delay time
—
0.80
2.5
µs
—
3.7
7.5
µs
—
2.6
7.5
µs
—
2.3
7.0
µs
Switching (Tj = 25 °C, unless otherwise specified)
Parameter
Test conditions
Turn-on delay time
Rise time
Turn-off delay time
Rise time
Turn-off delay time
VDD = 15 V; ID = 3 A; Vgen = 5 V;
Rgen = RIN MINn = 220 Ω
VDD = 15 V; ID = 3 A
Vgen = 5 V; Rgen = 2.2 KΩ
Fall time
Doc ID 17772 Rev. 4
VN5770AKP-E
Electrical characteristics
Table 14.
Symbol
Switching (Tj = 25 °C, unless otherwise specified) (continued)
Parameter
(dI/dt)on Turn-on current slope
Qi
Table 15.
Symbol
VSD(1)
Total input charge
Test conditions
Min
Typ
Max
Unit
VDD = 15 V; ID = 3 A; Vgen = 5 V;
Rgen = RIN MINn = 220 Ω
—
3.0
A/µs
VDD = 12 V; ID = 3 A; VIN = 5 V;
Igen = 2.13 mA
—
9.0
nC
Min
Typ
Max
Unit
—
0.8
—
V
—
400
—
ns
—
200
—
nC
—
1.0
—
A
Source drain diode
Parameter
Test conditions
Forward on voltage
ISD = 1.5 A; VIN = 0 V
trr
Reverse recovery time
Qrr
Reverse recovery
charge
IRRM
Reverse recovery
current
ISD = 1.5 A; dI/dt = 12 A/ms;
VDD = 30 V; L = 200 μH
1. Pulsed: pulse duration = 300μs, duty cycle 1.5%
Table 16.
Symbol
Protection and diagnostics (-40 °C < Tj < 150 °C, unless otherwise
specified)
Parameter
Test conditions
Min
Typ
6
8.5
Ilim
Drain current limit
VIN = 5 V; VDS = 13 V
tdlim
Step response current
limit
VIN = 5 V; VDS = 13 V
Tjsh
Overtemperature
shutdown
150
Tjrs
Overtemperature reset
135
Igf
Fault sink current
Eas
Starting Tj = 25 °C; VDD = 24 V;
Single pulse avalanche
VIN = 5 V; Rgen = RIN MINn = 220 Ω;
energy
L = 24 mH
VIN = 5 V; VDS = 13 V; Tj = Tjsh
Doc ID 17772 Rev. 4
Max Unit
12
10
10
100
175
A
µs
200
°C
°C
15
20
mA
mJ
17/35
Electrical characteristics
3.4
VN5770AKP-E
Electrical characteristics curves for low-side switches
Figure 18. Static drain source on
resistance
Figure 19. Derating curve
2DSONMOHMS
4J#
6IN6
4J#
4J#
("1($'5
)D!
Figure 20. Transconductance
("1($'5
Figure 21. Transfer characteristics
)DON!
'FS3
6DS6
4J#
4J#
6DS6
4J#
4J#
4J#
4J#
("1($'5
)D!
6IN6
("1($'5
Figure 22. Input voltage vs input charge Figure 23. Capacitance variations
6IN6
#P&
6DS6
)D!
F-(Z
6IN6
1GN#
18/35
("1($'5
Doc ID 17772 Rev. 4
6DS6
("1($'5
VN5770AKP-E
Electrical characteristics
Figure 24. Output characteristics
Figure 25. Step response current limit
)D!
4DLIMUSEC
6IN6
6IN6
6IN6
2GOHM
6IN6
6DS6
Figure 26. Source-drain diode forward
characteristics
("1($'5
Figure 27. Static drain-source on
resistance vs ID
6SDM6
2DSONMOHMS
6IN6
6IN6
4J#
4J#
4J#
)D!
2DSONMOHMS
)D!
4J#
4J#
)D!
)D!
4J#
("1($'5
Figure 29. Static drain-source on
resistance vs input voltage
(part 2)
2DSONMOHMS
)D!
("1($'5
Figure 28. Static drain-source on
resistance vs input voltage
(part 1)
6DD6
("1($'5
4J#
)D!
)D!
)D!
)D!
4J#
4J#
6IN6
("1($'5
Doc ID 17772 Rev. 4
6IN6
("1($'5
19/35
Electrical characteristics
VN5770AKP-E
Figure 30. Normalized input threshold
voltage vs temperature
Figure 31. Normalized on resistance vs
temperature
2ONM/HM
6INTH6
6DS6IN
)DM!
)OUT !
6CC6
4C #
("1($'5
Figure 32. Current limit vs junction
temperature
)LIM!
6CC6
6IN6
4C #
20/35
("1($'5
Doc ID 17772 Rev. 4
4C #
("1($'5
VN5770AKP-E
4
Application information
Application information
Figure 33. Typical application schematic
$
6BATT
6
6CC
#
:
6Z 66
)NPUT
3OURCE
)NPUT
#ONTROL
#URRENT3ENSE
3OURCE
-ICRO
$RAIN
)NPUT
#ONTROL
-OTORINDUCUCTANCE
3OURCE
$RAIN
ENERGYRECIRCULATION
)-
)NPUT
#ONTROL
3OURCE
'.$
("1($'5
Note:
Mostly motor bridge drivers use a reverse battery protection diode (D) inside supply rail.
This diode prevents a reverse current flow back to Vbatt in case the bridge gets disabled via
the logic inputs while motor inductance still carries energy. In order to prevent a hazardous
overvoltage at circuit supply terminal (Vcc), a blocking capacitor (C) is needed to limit the
voltage overshoot. As basic orientation, 50µF per 1A load current in recommended. In
alternative, also a Zener protection (Z) is suitable. Even if a reverse polarity diode is not
present, it is recommended to use a capacitor or zener at Vcc because a similar problem
appears in case supply terminal of the module has intermittent electrical contact to the
battery or gets disconnected while motor is operating.
Doc ID 17772 Rev. 4
21/35
Application information
VN5770AKP-E
#L
OC
KW
ISE
O
!C
PE
TIV
RA
TIO
E
M
N
OT
OR
S
TO
P
TO
P
IVE
M
OT
OR
S
0A
SS
WI
SE
#O
OP UNT
ER ER
AT CL
IO OC
N
K
OT
OR
S
IVE
M
0A
SS
#L
OC
KW
ISE
OP
ER
A
TO
P
TIO
N
Figure 34. Recommended motor operation
)NPUT
)NPUT
)NPUT
)NPUT
6Z
&LYBACKCLAMPED
BY:ENERDIODE:
&LYBACKENERGYCHARGED
&LYBACKSPIKEDURINGCROSS
INTOCAPACITOR#
CURRENTPROTECTIONTIME
6CC
T
)-
T
)-
$EADTIMETOAVOIDCROSSCONDUCTION
("1($'5
22/35
Doc ID 17772 Rev. 4
VN5770AKP-E
Application information
Figure 35. Waveforms
NORMAL OPERATION
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
CS_DIS
LOAD CURRENT
SENSE CURRENT
SHORT TO VCC
INPUT
CS_DIS
LOAD VOLTAGE
LOAD CURRENT
SENSE CURRENT
<Nominal
<Nominal
OVERLOAD OPERATION
Tj
TR TTSD
TRS
INPUT
CS_DIS
ILIMH
ILIML
LOAD CURRENT
VSENSEH
SENSE CURRENT
thermal cycling
current power
limitation limitation
SHORTED LOAD
Doc ID 17772 Rev. 4
NORMAL LOAD
23/35
Application information
4.1
VN5770AKP-E
Maximum demagnetization energy (VCC = 13.5 V)
Figure 36. Maximum turn off current versus load inductance
ILMAX (A)
100
10
A
B
C
1
A = Single Pulse at TJstart = 150 °C
B = Repetitive pulse at TJstart = 100 °C
C = Repetitive Pulse at TJstart = 125 °C
0.1
0.01
0.1
10
1
100
L (mH)
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at the beginning of each demagnetization) of every pulse must not exceed the temperature
specified above for curves B and C.
24/35
Doc ID 17772 Rev. 4
VN5770AKP-E
Package and thermal data
5
Package and thermal data
5.1
SO-28 thermal data
Figure 37. SO-28 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area= 58 mm x 58 mm, PCB thickness = 2 mm, Cu
thickness = 35 mm, Copper areas: from minimum pad layout to 16 cm2).
Figure 38. Chipset configuration
LOW SIDE
CHIP
channel 3
RthAB
HIGH SIDE
CHIP
channels 1,2
RthA
RthB
RthAC
LOW SIDE
CHIP
channel 4
RthC
RthBC
Doc ID 17772 Rev. 4
25/35
Package and thermal data
VN5770AKP-E
Figure 39. Auto and mutual Rthj-amb vs PCB copper area in open box free air
condition
Rth (˚C/W)
RthA
RthB = RthC
RthAB = RthAC
RthBC
60
50
40
30
20
10
0
0
1
2
3
4
5
6
7
Cu Area (refer to PCB layout)
Note:
See Figure 38. For more detailed information see Table 17 and Table 18.
Table 17.
Thermal calculations in clockwise and anti-clockwise operation in
steady-state mode
HS1
HS2
LS3
LS4
ON
OFF
OFF
ON
PdHS1 x RthHSLS +
PdHS1 x RthHS + PdLS4 x PdHS1 x RthHSLS +
RthHSLS + Tamb
PdLS4 x RthLSLS + Tamb PdLS4 x RthLS + Tamb
OFF
ON
ON
OFF
PdHS2 x RthHS + PdLS3 x PdHS2 x RthHSLS +
RthHSLS + Tamb
PdLS3 x RthLS + Tamb
Table 18.
TjHS12
TjLS4
PdHS2 x RthHSLS +
PdLS3 x RthLSLS + Tamb
Thermal resistances definitions(1)
RthHS = RthHS1 = RthHS2
High-side chip thermal resistance junction to ambient
(HS1 or HS2 in ON-state)
RthLS = RthLS3 = RthLS4
Low-side chip thermal resistance junction to ambient
RthHSLS = RthHS1LS4 = RthHS2LS3
Mutual thermal resistance junction to ambient between
high-side and low-side chips
RthLSLS = RthLS3LS4
Mutual thermal resistance junction to ambient between
low-side chips
1. Values dependent on PCB heatsink area
26/35
TjLS3
Doc ID 17772 Rev. 4
VN5770AKP-E
Package and thermal data
x
Table 19.
Single pulse thermal impedance definitions(1)
ZthHS
High-side chip thermal impedance junction to ambient
ZthLS = ZthLS3 = ZthLS4
Low-side chip thermal impedance junction to ambient
ZthHSLS = ZthHS12LS3 = ZthHS12LS4
Mutual thermal impedance junction to ambient
between high-side and low-side chips
ZthLSLS = ZthLS3LS4
Mutual thermal impedance junction to ambient
between low-side chips
1. values dependent on PCB heatsink area
Table 20.
Thermal calculations in transient mode(1)
TjHS12
ZthHS x PdHS12 + ZthHSLS x (PdLS3 + PdLS4) + Tamb
TjLS3
ZthHSLS x PdHS12 + ZthLS x PdLS3 + ZthLSLS x PdLS4 + Tamb
ZthHSLS x PdHS12 + ZthLSLS x PdLS3 + ZthLS x PdLS4 + Tamb
TjLS4
1. Calculation is valid in any dynamic operating condition. Pd values set by user.
Figure 40. SO-28 HSD thermal impedance junction ambient single pulse
ZTH (˚C/W)
Footprint
100
1 cm2
2 cm2
6 cm2
Footprint
1 cm2
10
2 cm2
HSD
6 cm2
HsLsD
1
0.1
0.001
0.01
0.1
1
10
100
1000
time (sec)
Doc ID 17772 Rev. 4
27/35
Package and thermal data
VN5770AKP-E
Figure 41. SO-28 LSD thermal impedance junction ambient single pulse
ZTH (˚C/W)
Footprint
100
1 cm2
2 cm2
6 cm2
Footprint
10
1 cm2
LSD
2 cm2
6 cm2
LsLsD
0.1
0.001
0.01
0.1
1
10
time (sec)
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Figure 42. Thermal fitting model of an H-bridge in SO-28
28/35
Doc ID 17772 Rev. 4
100
1000
VN5770AKP-E
Package and thermal data
Table 21.
Thermal parameters(1)
Area/island (cm2)
Footprint
R1 = R7 (°C/W)
1
R2 = R8 (°C/W)
1.8
R3 = R11 = R17 (°C/W)
3.5
R4 (°C/W)
13.5
R5 = R13 = R19 (°C/W)
10.5
R6 = R14 = R20 (°C/W)
62.28
R9 = R15 (°C/W)
0.24
R10 = R16 (°C/W)
1.2
R12 (°C/W)
15.2
R18 (°C/W)
15.5
R21 = R22 = R23 (°C/W)
150
R24 (°C/W)
150
C1 = C7 (W·s/°C)
0.0008
C2 = C8 (W·s/°C)
0.001
C3 = C11 = C17 (W·s/°C)
0.008
C5 = C13 = C19 (W·s/°C)
0.2
C6 = C14 = C20 (W·s/°C)
1.6
C9 = C15 (W·s/°C)
0.00015
C10 = C16 (W·s/°C)
0.0005
1
2
6
52.28
44.28
32.28
52.28
44.28
32.28
1.61
1.7
3.25
1. A blank space means that the value is the same as the previous one.
Doc ID 17772 Rev. 4
29/35
Package and packing information
VN5770AKP-E
6
Package and packing information
6.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
6.2
SO-28 package information
Table 22.
SO-28 mechanical data
Millimeters
Symbol
Min
Typ
A
2.65
a1
0.10
0.30
b
0.35
0.49
b1
0.23
0.32
C
0.50
c1
45° (typ.)
D
17.7
18.1
E
10.00
10.65
e
1.27
e3
16.51
F
7.40
7.60
L
0.40
1.27
S
30/35
Max
8° (max.)
Doc ID 17772 Rev. 4
VN5770AKP-E
Package and packing information
Figure 43. SO-28 package dimensions
Doc ID 17772 Rev. 4
31/35
Package and packing information
6.3
VN5770AKP-E
SO-28 packing information
Figure 44. SO-28 tube shipment (no suffix)
C
B
A
Base Q.ty
28
Bulk Q.ty
700
Tube length (± 0.5)
532
A
3.5
B
13.8
C (± 0.1)
0.6
All dimensions are in mm.
Figure 45. Tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
16.4
60
22.4
Tape dimensions
According to Electronic Industries
Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
16
4
12
1.5
1.5
7.5
6.5
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components Components
500mm min
500mm min
Empty components pockets
sealed with cover tape.
User direction of feed
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Doc ID 17772 Rev. 4
No components
VN5770AKP-E
7
Order codes
Order codes
Table 23.
Device summary
Order codes
Package
SO-28
Tube
Tape and reel
Root part number 1
VN5770AKPTR-E
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Revision history
8
VN5770AKP-E
Revision history
Table 24.
34/35
Document revision history
Date
Revision
Changes
11-Nov-2010
1
Initial release.
04-Jan-2012
2
Table 9: Current sense (8V<VCC<16V) - K0 values modified
20-Feb-2012
3
Update Figure 2: Configuration diagram (top view) and Figure 33:
Typical application schematic
02-Oct-2012
4
Table 9: Current sense (8V<VCC<16V):
– K0: updated values
Doc ID 17772 Rev. 4
VN5770AKP-E
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