STMICROELECTRONICS VNQ660SPTR-E

VNQ660SP
Quad channel high side solid state relay
Features
Type
RDS(on)
IOUT
VCC
VNQ660SP
50mΩ(1)
6A
36V
10
1. Per each channel.
1
PowerSO-10
■
CMOS compatible inputs
■
Off state open load detection
■
Undervoltage and overvoltage shutdown
■
Overvoltage clamp
■
Thermal shutdown
■
Current limitation
■
Very low standby power dissipation
■
Protection against loss of ground and loss of
VCC
■
Reverse battery protection(a)
Description
The VNQ660SP is a monolithic device made by
using| STMicroelectronics VIPower M0-3
Technology, intended for driving resistive or
inductive loads with one side connected to
ground.
This device has four independent channels. Builtin thermal shutdown and output current limitation
protect the chip from over temperature and short
circuit.
a. See Application schematic on page 16
Table 1.
Device summary
Order codes
Package
PowerSO-10
December 2008
Tube
Tape and reel
VNQ660SP
VNQ660SP13TR
Rev 5
1/26
www.st.com
26
Contents
VNQ660SP
Contents
1
Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1
4
6
2/26
3.1.1
Solution 1: a resistor in the ground line (RGND only) . . . . . . . . . . . . . . 16
3.1.2
Solution 2: a diode (DGND) in the ground line . . . . . . . . . . . . . . . . . . . . 17
3.2
Load dump protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3
MCU I/O protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.4
Maximum demagnetization energy (VCC = 13.5V) . . . . . . . . . . . . . . . . . . 18
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.1
5
GND protection network against reverse battery . . . . . . . . . . . . . . . . . . . 16
PowerSO-10 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.1
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.2
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
5.3
PowerSO-10 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
VNQ660SP
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Suggested connections for unused and not connected pins . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data (per island) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
VCC - output diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Switching (VCC = 13V; Tj = 25°C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Logic inputs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Openload detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Truth table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical transient requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Thermal parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PowerSO-10 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
3/26
List of figures
VNQ660SP
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
4/26
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Current and voltage conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Status timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Switching characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Off state output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
High level input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Input clamp voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-on voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Overvoltage shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Turn-off voltage slope . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
ILIM vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On state resistance vs VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input high level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input hysteresis voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
On state resistance vs Tcase . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Input low level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Status leakage current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Status low output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Status clamp voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Openload Off state detection threshold . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Maximum turn-off current versus load inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
PowerSO-10 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Rthj-amb Vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 19
Thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Thermal fitting model of a quad channel HSD in PowerSO-10. . . . . . . . . . . . . . . . . . . . . . 20
PowerSO-10 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PowerSO-10 suggested pad layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
PowerSO-10 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-28 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
VNQ660SP
1
Block diagram and pin description
Block diagram and pin description
Figure 1.
Block diagram
VCC
OVERVOLTAGE
UNDERVOLTAGE
DEMAG 1
DRIVER 1
OUTPUT 1
ILIM1
INPUT 1
DEMAG 2
INPUT 2
DRIVER 2
INPUT 3
OUTPUT 2
ILIM2
LOGIC
DEMAG 3
INPUT 4
DRIVER 3
STATUS
OUTPUT 3
ILIM3
STATUS
DEMAG 4
DRIVER 4
OVERTEMP. 1
OUTPUT 4
ILIM4
OVERTEMP. 2
OPEN LOAD
OFF-STATE
OVERTEMP. 3
OVERTEMP. 4
GND
Figure 2.
Configuration diagram (top view)
STATUS
INPUT 4
INPUT 3
INPUT 2
INPUT 1
6
7
8
9
5
4
3
10
1
GND
OUTPUT 4
OUTPUT 3
OUTPUT 2
OUTPUT 1
2
11
VCC
Table 2.
Suggested connections for unused and not connected pins
Connection / pin
Status
N.C.
Output
Input
Floating
X
X
X
X
To ground
X
Through 10KΩ
resistor
5/26
Electrical specifications
VNQ660SP
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality document.
Table 3.
Absolute maximum ratings
Symbol
VCC
2.2
Parameter
Value
Unit
41
V
- 0.3
V
Internally limited
A
- 15
A
Supply voltage
- VCC
Reverse DC supply voltage
IOUT
DC output current, per each channel
IR
Reverse DC output current, per each channel
IIN
Input current
+/- 10
mA
ISTAT
Status current
+/- 10
mA
IGND
DC ground current at TC < 25°C
-200
mA
VESD
Electrostatic discharge (human body model: R=1.5KΩ;
C = 100pF)
- INPUT
- STATUS
- OUTPUT
- VCC
4000
4000
5000
5000
V
V
V
V
EMAX
Maximum switching energy
(L = 0.38mH; RL = 0Ω; Vbat = 13.5V; Tjstart = 150ºC; IL = 14A)
101
mJ
Ptot
Power dissipation at TC = 25°C
114
W
Tj
Junction operating temperature
- 40 to 150
°C
Tstg
Storage temperature
- 65 to 150
°C
EC
Non repetitive clamping energy at TC = 25°C
150
mJ
Thermal data
Table 4.
Symbol
Thermal data (per island)
Parameter
Value
Rthj-case
Thermal resistance junction-case
1.1(1)
Rthj-amb
Thermal resistance junction-ambient (one chip ON)
51.1(1)
1. When mounted on a standard single-sided FR-4 board with
1cm2
Unit
52(2)
°C/W
33(2)
°C/W
of Cu (at least 35 µm thick).
2. When mounted on a standard single-sided FR-4 board with 6cm2 of Cu (at least 35 µm thick).
6/26
VNQ660SP
2.3
Electrical specifications
Electrical characteristics
Values specified in this section are for 6V < VCC < 24V; -40°C < Tj < 150°C, unless
otherwise stated.
Figure 3.
Current and voltage conventions
IS
IIN1
INPUT 1 VCC OUTPUT 1
IIN2
VIN1
INPUT 2
IOUT2
IOUT3
VCC
VOUT1
VOUT2
OUTPUT 3
INPUT 3
VOUT3
IOUT4
VIN3 IIN4
OUTPUT 4
INPUT 4
VIN4
VOUT4
GND
STATUS
VSTAT
Note:
VF1 (*)
OUTPUT 2
IIN3
VIN2
IOUT1
ISTAT
IGND
VFn = VCCn - VOUTn during reverse battery condition.
Table 5.
Symbol
Power
Parameter
VCC(1)
Operating supply
voltage
VUSD(1)
Test conditions
Min.
Typ. Max. Unit
6
13
36
V
Undervoltage shutdown
3.5
4.6
6
V
Undervoltage
hysteresis
0.2
1
V
VOV(1)
Overvoltage shutdown
36
V
VOVhyst(1)
Overvoltage hysteresis
0.25
V
VUVhyst(1)
RON
IS(1)
On state resistance
Supply current
IOUT = 1A; Tj = 25°C
9V < VCC < 18V
IOUT = 1A;Tj = 150°C
9V < VCC < 18V
IOUT = 1A; VCC = 6V
40
50
mΩ
85
100
mΩ
130
mΩ
Off State; VCC = 13.5V;
VIN = VOUT = 0V
12
40
µA
Off State; VCC = 13.5V;
VIN = VOUT = 0V;
Tj = 25°C
12
25
µA
On State; VCC = 13V; VIN = 3.25V;
9V < VCC < 18V
6
12
mA
7/26
Electrical specifications
Table 5.
VNQ660SP
Power (continued)
Symbol
Parameter
Test conditions
Min.
Typ. Max. Unit
0
50
µA
-75
0
µA
IL(off1)
Off state output current VIN = VOUT = 0V
IL(off2)
Off state output current VIN = 0V; VOUT = 3.5V
IL(off3)
Off state output current
VIN = VOUT = 0V; VCC = 13V;
Tj = 125°C
5
µA
IL(off4)
Off state output current
VIN = VOUT = 0V; VCC = 13V;
Tj =25°C
3
µA
1. Per device.
Table 6.
Symbol
Min.
Typ.
Max.
Unit
Shutdown temperature
150
170
200
°C
TR
Reset temperature
135
Thyst
Thermal hysteresis
7
15
25
°C
6
10
18
18
A
A
TTSD
Ilim
Note:
Parameter
DC short circuit current
Vdemag
Turn-off output clamp
voltage
VSTAT
Status low output voltage
ILSTAT
Test conditions
9V < VCC < 36V
6V < VCC < 36V
IOUT = 2A;
VIN = 0V;
L = 6mH
°C
VCC - VCC - VCC 41
48
55
V
ISTAT=1.6mA
0.5
V
Status leakage current
Normal operation;
VSTAT=5V
10
µA
CSTAT
Status pin input capacitance
Normal operation;
VSTAT=5V
25
pF
VSCL
Status clamp voltage
8
V
V
ISTAT=1mA
ISTAT=-1mA
6
6.8
- 0.7
To ensure long term reliability under heavy overload or short circuit conditions, protection
and related diagnostic signals must be used together with a proper software strategy. If the
device is subjected to abnormal conditions, this software must limit the duration and number
of activation cycles.
Table 7.
8/26
Protections
VCC - output diode
Symbol
Parameter
Test conditions
VF
Forward on voltage
- IOUT = 1.6A; Tj = 150°C
Min.
Typ.
Max.
Unit
0.6
V
VNQ660SP
Electrical specifications
Table 8.
Switching (VCC = 13V; Tj = 25°C)
Symbol
Parameter
Test conditions
Min.
Typ.
Max. Unit
td(on)
Turn-on delay time
RL = 13Ω channels 1,2,3,4
(see Figure 5)
40
70
µs
td(off)
Turn-off delay time
RL = 13Ω channels 1,2,3,4
(see Figure 5)
40
140
µs
dVOUT/dt(on) Turn-on voltage slope
RL = 13Ω channels 1,2,3,4
(see Figure 5)
See
Figure 10
V/µs
dVOUT/dt(off) Turn-off voltage slope
RL = 13Ω channels 1,2,3,4
(see Figure 5)
See
Figure 12
V/µs
Table 9.
Logic inputs
Symbol
Parameter
VIL
Input low level voltage
IIL
Input low level current
VIH
Input high level voltage
IIH
Input high level current
VI(hyst)
Input hysteresis voltage
CIN
Input capacitance
VICL
Input clamp voltage
Table 10.
Test conditions
VIN = 1.25V
Typ.
Max.
Unit
1.25
V
1
µA
3.25
V
VIN = 3.25V
10
0.5
V
6
IIN = 1mA
IIN = -1mA
µA
6.8
- 0.7
40
pF
8
V
V
Openload detection
Symbol
Parameter
Test conditions
tSDL
Status delay
VOL
Openload voltage detection threshold
tDOL
Openload detection delay at turn-off
Figure 4.
Min.
Min.
Typ. Max.
See Figure 4
VIN = 0V
1.5
VCC = 18V
(see Figure 4)
2.5
Unit
20
µs
3.5
V
300
µs
Status timings
OPENLOAD STATUS TIMING
OVERTEMP STATUS TIMING
VIN
VIN
VSTAT
VSTAT
tDOL
tSDL
tSDL
tSDL
9/26
Electrical specifications
Figure 5.
VNQ660SP
Switching characteristics
VOUT
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
tr
tf
t
ISENSE
90%
INPUT
t
tDSENSE
td(on)
td(off)
t
Table 11.
10/26
Truth table
Conditions
Input
Output
Status
Normal operation
L
H
L
H
H
H
Current limitation
L
H
H
L
X
X
H
(TJ < TTSD) H
(TJ > TTSD) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
H
H
Output voltage > VOL
L
H
H
H
L
H
Output current < IOL
L
H
L
H
H
L
VNQ660SP
Electrical specifications
Table 12.
Electrical transient requirements
ISO T/R
Test level
7637/1
Test pulse
I
II
III
IV
Delays and impedance
1
- 25V
- 50V
- 75V
- 100V
2ms, 10Ω
2
+ 25V
+ 50V
+ 75V
+ 100V
0.2ms, 10Ω
3a
- 25V
- 50V
- 100V
- 150V
0.1µs, 50Ω
3b
+ 25V
+ 50V
+ 75V
+ 100V
0.1µs, 50Ω
4
- 4V
- 5V
- 6V
- 7V
100ms, 0.01Ω
5
+ 26.5V
+ 46.5V
+ 66.5V
+ 86.5V
400ms, 2Ω
ISO T/R
7637/1
Test level
I
II
III
IV
1
C
C
C
C
2
C
C
C
C
3a
C
C
C
C
3b
C
C
C
C
4
C
C
C
C
5
C
E
E
E
Test pulse
Class
C
E
Contents
All functions of the device are performed as designed after exposure to
disturbance.
One or more functions of the device is not performed as designed after exposure
and cannot be returned to proper operation without replacing the device.
11/26
Electrical specifications
Figure 6.
VNQ660SP
Waveforms
NORMAL OPERATION
INPUTn
LOAD VOLTAGEn
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUTn
LOAD VOLTAGEn
STATUSn
undefined
OVERVOLTAGE
VCC<VOV
VCC>VOV
VCC
INPUTn
LOAD VOLTAGEn
STATUSn
OPENLOAD with external pull-up
INPUTn
LOAD VOLTAGEn
VOL
STATUSn
tDOL
Tj
INPUTn
LOAD CURRENTn
STATUSn
12/26
TTSD
TR
OVERTEMPERATURE
tDOL
VNQ660SP
Electrical specifications
2.4
Electrical characteristics curves
Figure 7.
Off state output current
Figure 8.
High level input current
IL(off1) (µA)
Iih (µA)
10
7
9
Off state
Vcc=24V
Vout=0V
8
7
6
Vin=3.25V
5
6
4
5
3
4
3
2
2
1
1
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC )
Figure 9.
50
75
100
125
150
175
150
175
150
175
Tc (ºC )
Input clamp voltage
Figure 10. Turn-on voltage slope
Vicl (V)
dVout/dt(on) (V/ms)
8
500
450
7.75
Iin=1mA
Vcc=13V
Rl=13Ohm
400
7.5
350
7.25
300
7
250
200
6.75
150
6.5
100
6.25
50
6
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC )
50
75
100
125
Tc (ºC )
Figure 11. Overvoltage shutdown
Figure 12. Turn-off voltage slope
Vov (V)
dVout/dt(off) (V/ms)
54
700
52
600
Vcc=13V
Rl=13Ohm
50
500
48
46
400
44
300
42
40
200
38
100
36
34
0
-50
-25
0
25
50
75
Tc (ºC )
100
125
150
175
-50
-25
0
25
50
75
100
125
Tc (ºC )
13/26
Electrical specifications
VNQ660SP
Figure 13. ILIM vs Tcase
Figure 14. On state resistance vs VCC
Vih (V)
RDS (on) (mOhm)
4
100
90
3.75
Iout=1A
80
Tc=150ºC
3.5
70
3.25
60
3
50
Tc=25ºC
40
2.75
Tc= - 40ºC
30
2.5
20
2.25
10
2
0
-50
-25
0
25
50
75
100
125
150
175
8
9
10
11
12
Tc (ºC )
13
14
15
16
17
18
19
20
Vcc (V)
Figure 15. Input high level
Figure 16. Input hysteresis voltage
Vih (V)
Vihyst (V)
4
1.4
3.75
1.3
1.2
3.5
1.1
3.25
1
3
0.9
2.75
0.8
2.5
0.7
2.25
0.6
2
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC )
75
100
125
150
175
Tc (ºC )
Figure 17. On state resistance vs Tcase
Figure 18. Input low level
RDS (on) (mOhm)
Vil (V)
100
2.6
90
2.4
Iout=1A
80
50
Vcc=9V; 13V; 18V
2.2
70
2
60
1.8
50
40
1.6
30
1.4
20
1.2
10
0
1
-50
-25
0
25
50
75
Tc (ºC )
14/26
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC )
100
125
150
175
VNQ660SP
Electrical specifications
Figure 19. Status leakage current
Figure 20. Status low output voltage
Ilstat (µA)
Vstat (V)
0.6
0.05
0.045
0.525
Vstat=5V
0.04
Istat=1.6mA
0.45
0.035
0.375
0.03
0.3
0.025
0.02
0.225
0.015
0.15
0.01
0.075
0.005
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC )
50
75
100
125
150
175
Tc (ºC )
Figure 21. Status clamp voltage
Figure 22. Openload Off state detection
threshold
Vscl (V)
Vol (V)
7.4
5
4.5
7.3
Istat=1mA
Vin=0V
4
7.2
3.5
7.1
3
7
2.5
2
6.9
1.5
6.8
1
6.7
0.5
6.6
0
-50
-25
0
25
50
75
Tc (ºC )
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC )
15/26
Application information
3
VNQ660SP
Application information
Figure 23. Application schematic
+5V
+5V
VCC
Rprot
STATUS
Dld
Rprot
INPUT1
OUTPUT1
µC
Rprot
INPUT2
OUTPUT2
Rprot
INPUT3
OUTPUT3
INPUT4
OUTPUT4
Rprot
GND
RGND
VGND
DGND
.
Note:
Channels 3 & 4 have the same internal circuit as channel 1 & 2.
3.1
GND protection network against reverse battery
This section provides two solutions for implementing a ground protection network against
reverse battery.
3.1.1
Solution 1: a resistor in the ground line (RGND only)
This can be used with any type of load.
The following show how to dimension the RGND resistor:
1.
RGND ≤600mV / 2 (IS(on)max)
2.
RGND ≥ ( - VCC) / ( - IGND)
where - IGND is the DC reverse ground pin current and can be found in the absolute
maximum rating section of the device datasheet.
Power dissipation in RGND (when VCC < 0 during reverse battery situations) is:
PD = ( - VCC)2/ RGND
16/26
VNQ660SP
Application information
This resistor can be shared amongst several different HSDs. Please note that the value of
this resistor should be calculated with formula (1) where IS(on)max becomes the sum of the
maximum on-state currents of the different devices.
Please note that, if the microprocessor ground is not shared by the device ground, then the
RGND will produce a shift (IS(on)max * RGND) in the input thresholds and the status output
values. This shift will vary depending on how many devices are ON in the case of several
high side drivers sharing the same RGND .
If the calculated power dissipation requires the use of a large resistor, or several devices
have to share the same resistor, then ST suggests using solution 2 below.
3.1.2
Solution 2: a diode (DGND) in the ground line
A resistor (RGND = 1kΩ) should be inserted in parallel to DGND if the device will be driving
an inductive load. This small signal diode can be safely shared amongst several different
HSD. Also in this case, the presence of the ground network will produce a shift (j600mV) in
the input threshold and the status output values if the microprocessor ground is not common
with the device ground. This shift will not vary if more than one HSD shares the same
diode/resistor network. Series resistor in INPUT and STATUS lines are also required to
prevent that, during battery voltage transient, the current exceeds the Absolute Maximum
Rating. Safest configuration for unused INPUT and STATUS pin is to leave them
unconnected.
3.2
Load dump protection
Dld is necessary (voltage transient suppressor) if the load dump peak voltage exceeds the
VCC maximum DC rating. The same applies if the device is subject to transients on the VCC
line that are greater than those shown in the ISO T/R 7637/1 table.
3.3
MCU I/O protection
If a ground protection network is used and negative transients are present on the VCC line,
the control pins will be pulled negative. ST suggests to insert a resistor (Rprot) in line to
prevent the µC I/O pins from latching up.
The value of these resistors is a compromise between the leakage current of µC and the
current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC
I/Os:
- VCCpeak / Ilatchup ≤Rprot ≤(VOHµC - VIH - VGND) / IIHmax
Example
For the following conditions:
VCCpeak = - 100V
Ilatchup ≥ 20mA
VOHµC ≥ 4.5V
5kΩ ≤Rprot ≤65kΩ.
Recommended values are:
Rprot = 10kΩ
17/26
Application information
3.4
VNQ660SP
Maximum demagnetization energy (VCC = 13.5V)
Figure 24. Maximum turn-off current versus load inductance
ILMAX (A)
100
10
A
B
C
1
0.01
0.1
1
L (mH)
10
100
A = single pulse at TJstart = 150ºC
B= repetitive pulse at TJstart = 100ºC
C= repetitive pulse at TJstart = 125ºC
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
Note:
Values are generated with RL = 0Ω.
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse
must not exceed the temperature specified above for curves B and C.
18/26
VNQ660SP
Package and PCB thermal data
4
Package and PCB thermal data
4.1
PowerSO-10 thermal data
Figure 25. PowerSO-10 PC board
Note:
Layout condition of Rth and Zth measurements (PCB FR4 area = 58mm x 58mm, PCB
thickness = 2mm, Cu thickness = 35µm, Copper areas: from minimum pad lay-out to 8 cm2).
Figure 26. Rthj-amb Vs PCB copper area in open box free air condition
55
RTHjamb (ºC /W)
50
45
40
35
30
25
20
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
19/26
Package and PCB thermal data
VNQ660SP
Figure 27. Thermal impedance junction ambient single pulse
ZT H (°C /W)
1000
0.5 cm2
100
2 cm2
4 cm2
10
8 cm2
1
0.1
0.0001
0.001
0.01
0.1
1
T ime (s)
10
100
1000
Equation 1: pulse calculation formula
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ)
where
δ = tp ⁄ T
Figure 28. Thermal fitting model of a quad channel HSD in PowerSO-10
20/26
VNQ660SP
Package and PCB thermal data
Table 13.
Thermal parameters
Area / island (cm2)
0.5
R1 = R7 = R9 = R11 (°C/W)
0.15
R2 = R8 = R10 = R12 (°C/W)
0.5
R3 (°C/W)
0.4
R4 (°C/W)
10
R5 (°C/W)
15
R6 (°C/W)
26
C1 = C7 = C9 = C11 (W.s/°C)
0.0006
C2 = C8 = C10 = C12 (W.s/°C)
0.0021
C3 (W.s/°C)
0.02
C4 (W.s/°C)
0.5
C5 (W.s/°C)
1.5
C6 (W.s/°C)
5
2
4
8
14.5
10
6
10
14
18
21/26
Package and packing information
VNQ660SP
5
Package and packing information
5.1
ECOPACK® packages
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. ECOPACK® packages are lead-free. The category of Second Level Interconnect
is marked on the package and on the inner box label, in compliance with JEDEC Standard
JESD97. The maximum ratings related to soldering conditions are also marked on the inner
box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com.
5.2
PowerSO-10 mechanical data
Figure 29. PowerSO-10 package dimensions
B
0.10 A B
10
H
E
E
E2
1
S EATING
P LANE
e
B
DETAIL "A"
A
C
0.25
h
E4
D
= D1 =
=
=
S EATING
PLANE
A
F
A1
A1
L
DETAIL "A"
α
22/26
VNQ660SP
Package and packing information
Table 14.
PowerSO-10 mechanical data
mm
Dim.
Min.
Typ.
Max.
A
3.35
3.65
A(1)
3.4
3.6
A1
0
0.10
B
0.40
0.60
B(1)
0.37
0.53
C
0.35
0.55
C(1)
0.23
0.32
D
9.40
9.60
D1
7.40
7.60
E
9.30
9.50
E2
7.20
7.60
E2(1)
7.30
7.50
E4
5.90
6.10
E4(1)
5.90
6.30
e
1.27
F
1.25
1.35
F(1)
1.20
1.40
H
13.80
14.40
H(1)
13.85
14.35
h
0.50
L
1.20
1.80
L(1)
0.80
1.10
α
0°
8°
α(1)
2°
8°
1. Muar only POA P013P.
23/26
Package and packing information
5.3
VNQ660SP
PowerSO-10 packing information
Figure 30. PowerSO-10 suggested Figure 31. PowerSO-10 tube shipment
pad layout
(no suffix)
14.6 - 14.9
CASABLANCA
B
10.8 - 11
MUAR
C
6.30
C
A
A
0.67 - 0.73
1
9.5
10
9
8
2
3
7
4
5
6
B
0.54 - 0.6
All dimensions are in mm.
1.27
Base Q.ty Bulk Q.ty
Casablanca
Muar
50
50
1000
1000
Tube length (±
0.5)
532
532
A
B
10.4 16.4
4.9 17.2
C (±
0.1)
0.8
0.8
Figure 32. SO-28 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
600
600
330
1.5
13
20.2
24.4
60
30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
24
4
24
1.5
1.5
11.5
6.5
2
End
Start
Top
cover
tape
No components
Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
24/26
No components
500mm min
VNQ660SP
6
Revision history
Revision history
Table 15.
Document revision history
Date
Revision
Changes
22-Jun-2004
1
Initial release.
14-Jul-2004
2
New revision.
24-Jul-2004
3
Minor changes.
Current and voltage convention update (page 2).
Configuration diagram (top view) & suggested connections for unused
and not connected pins insertion (page 3).
6 cm2 Cu condition insertion in thermal data table (page 3).
VCC - output diode section update (page 3).
Protections note insertion (page 4)
Revision history table insertion (page 18).
28-Jul-2004
4
Disclaimers Update (page 19).
03-Dec-2008
5
Document reformatted and restructured.
Added contents, list of tables and figures.
Added ECOPACK® packages information.
25/26
VNQ660SP
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26/26