TSC TSM6970DCARV

Preliminary
TSM6970D
20V Dual N-Channel MOSFET w/ESD Protected
TSSOP-8
PRODUCT SUMMARY
VDS (V)
RDS(on)(mΩ)
Pin Definition:
1. Drain 1
8. Drain 2
2. Source 1
7. Source 2
3. Source 1
6. Source 2
4. Gate 1
5. Gate 2
20
Features
ID (A)
21 @ VGS = 4.5V
8
25 @ VGS = 2.5V
7
33 @ VGS = 1.8V
6
Block Diagram
●
Advance Trench Process Technology
●
High Density Cell Design for Ultra Low On-resistance
●
ESD Protect 2KV
Application
●
Load Switch
●
PA Switch
Ordering Information
Part No.
Package
Packing
TSM6970DCA RV
TSSOP-8
3Kpcs / 13” Reel
Dual N-Channel MOSFET
Absolute Maximum Rating (Ta = 25oC unless otherwise noted)
Parameter
Symbol
Limit
Unit
Drain-Source Voltage
VDS
20
V
Gate-Source Voltage
VGS
±8
V
ID
8
A
IDM
30
A
IS
2.5
A
Continuous Drain Current, VGS @4.5V
Pulsed Drain Current, VGS @4.5V
Continuous Source Current (Diode Conduction)
a,b
o
Maximum Power Dissipation
Ta = 25 C
PD
o
Ta = 70 C
Operating Junction Temperature
W
1.28
+150
o
C
TJ, TSTG
-55 to +150
o
C
Symbol
Limit
TJ
Operating Junction and Storage Temperature Range
2
Thermal Performance
Parameter
Junction to Case Thermal Resistance
RӨJC
Junction to Ambient Thermal Resistance (PCB mounted)
RӨJA
Unit
30
o
C/W
62.5
o
C/W
Notes:
a. Pulse width limited by the Maximum junction temperature
b. Surface Mounted on FR4 Board, t ≤ 5 sec.
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Version: Preliminary
Preliminary
TSM6970D
20V Dual N-Channel MOSFET w/ESD Protected
Electrical Specifications
Parameter
Conditions
Symbol
Min
Typ
Max
Unit
Static
Drain-Source Breakdown Voltage
VGS = 0V, ID = 250uA
BVDSS
20
--
--
V
Gate Threshold Voltage
VDS = VGS, ID = 250uA
VGS(TH)
0.4
--
1
V
Gate Body Leakage
VGS = ±8V, VDS = 0V
IGSS
--
--
±10
uA
Zero Gate Voltage Drain Current
VDS = 16V, VGS = 0V
IDSS
--
--
1
uA
On-State Drain Current
VDS =5V, VGS = 4.5V
ID(ON)
10
--
--
A
--
18
21
--
21
25
--
26
33
VGS = 4.5V, ID = 8A
Drain-Source On-State Resistance
VGS = 2.5V, ID = 7A
RDS(ON)
VGS = 1.8V, ID = 6A
mΩ
Forward Transconductance
VDS = 5V, ID = 8A
gfs
--
13
--
S
Diode Forward Voltage
IS = 2.5A, VGS = 0V
VSD
--
--
1.7
V
Qg
--
13.8
--
Qgs
--
4.1
--
Qgd
--
5.6
--
Ciss
--
1160
--
Coss
--
104
--
Crss
--
29
--
td(on)
--
140
200
tr
--
210
250
td(off)
--
3700
4800
--
2000
2600
Dynamic
b
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Switching
VDS = 10V, ID = 8A,
VGS = 4.5V
VDS = 10V, VGS = 0V,
f = 1.0MHz
nC
pF
c
Turn-On Delay Time
Turn-On Rise Time
Turn-Off Delay Time
VDD = 10V,
ID = 1A, VGEN = 4.5V,
RG = 3Ω
Turn-Off Fall Time
tf
Notes:
a. pulse test: PW ≤300µS, duty cycle ≤2%
b. For DESIGN AID ONLY, not subject to production testing.
b. Switching time is essentially independent of operating temperature.
2/4
nS
Version: Preliminary
Preliminary
TSM6970D
20V Dual N-Channel MOSFET w/ESD Protected
TSSOP-8 Mechanical Drawing
DIM
A
a
B
C
D
E
e
F
L
3/4
TSSOP-8 DIMENSION
MILLIMETERS
INCHES
MIN
MAX
MIN
MAX
6.20
6.60
0.244
0.260
4.30
4.50
0.170
0.177
2.90
3.10
0.114
0.122
0.65 (typ)
0.025 (typ)
0.25
0.30
0.010
0.019
1.05
1.20
0.041
0.049
0.05
0.15
0.002
0.009
0.127
0.005
0.50
0.70
0.020
0.028
Version: Preliminary
Preliminary
TSM6970D
20V Dual N-Channel MOSFET w/ESD Protected
Notice
Specifications of the products displayed herein are subject to change without notice. TSC or anyone on its behalf,
assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, to any
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and/or use of TSC products including liability or warranties relating to fitness for a particular purpose, merchantability,
or infringement of any patent, copyright, or other intellectual property right.
The products shown herein are not designed for use in medical, life-saving, or life-sustaining applications. Customers
using or selling these products for use in such applications do so at their own risk and agree to fully indemnify TSC for
any damages resulting from such improper use or sale.
4/4
Version: Preliminary