FUJITSU MB89823R

FUJITSU SEMICONDUCTOR
DATA SHEET
DS07-12513-6E
8-bit Proprietary Microcontroller
CMOS
F2MC-8L MB89820 Series
MB89821/823R/825/P825/PV820
■ DESCRIPTION
MB89820 series is a line of single-chip microcontrollers using the F2MC-8L* CPU core which can operate at low
voltage but at high speed. In addition to an LCD controller/driver allowing 200-pixel display the microcontrollers
contain a variety of peripheral functions such as timers, a UART, a serial interface, and an external interrupt. The
configuration of the MB89820 series is therefore best suited to control of LCD display panels.
* : F2MC stands for FUJITSU Flexible Microcontroller.
■ FEATURES
• Minimum execution time : 0.8 µs/5 MHz (VCC = +5.0 V)
• F2MC-8L family CPU core
Multiplication and division instructions
Instruction set optimized for controllers
16-bit arithmetic operations
Test and branch instructions
Bit manipulation instructions, etc.
• LCD controller/driver
Max 50 segments × 4 commons
Divided resistor for LCD power supply
(Continued)
■ PACKAGES
80 Pin Plastic QFP
80 Pin Plastic MQFP
(FTP-80P-M11)
(MQP-80C-P01)
MB89820 Series
(Continued)
• Three types of timers
8-bit PWM timer (also usable as a reload timer)
8-bit pulse width count timer (also usable as a reload timer)
20-bit time-base timer
• Two serial interfaces
8-bit synchronous serial interface (Switchable transfer direction allows communication with various equipment.)
UART (5-, 7-, 8-bit transfer capable)
• External interrupt : 2 channels
Capable of wake-up from low-power consumption modes (with an edge detection function)
• Low-power consumption modes
Stop mode (Oscillation stops to minimize the current consumption.)
Sleep mode (The CPU stops to reduce the current consumption to approx. 1/3 of normal.)
■ PRODUCT LINEUP
Part number
MB89821
MB89823R
MB89825
MB89P825
MB89PV820
Parameter
Classification
Mass production product
(mask ROM products)
ROM size
4 K × 8 bits
(internal mask
ROM)
RAM size
128 × 8 bits
8 K × 8 bits
(internal mask
ROM)
One-time PROM
product
16 K × 8 bits
(internal mask
ROM)
16 K × 8 bits
(internal PROM,
programming
with generalpurpose EPROM
programmer)
256 × 8 bits
Piggyback/
evaluation
product for
evaluation and
development
32 K × 8 bits
(external ROM)
1024 × 8 bits
CPU functions
Number of instructions:
Instruction bit length:
Instruction length:
Data bit length:
Minimum execution time:
Interrupt processing time:
136
8 bits
1 to 3 bytes
1, 8, 16 bits
0.8 µs/5 MHz (VCC = 5.0 V)
7.2 µs/5 MHz (VCC = 5.0 V)
Ports
I/O ports (N-ch open-drain):
I/O ports (N-ch open-drain):
I/O ports (CMOS):
Input ports:
16 (All also serve as segment pins.)*1
6
6 (5 ports also serve as peripheral I/O.)
4 (1 port also serves as an external
interrupt input.)
32 (Max)
Total:
8-bit PWM timer
8-bit reload timer operation (toggled output capable)
8-bit resolution PWM operation
Operating clock (pulse width count timer output: 0.8 µs, 12.8 µs, 51.2 µs/5 MHz)
8-bit pulse width
count timer
8-bit reload timer operation
8-bit pulse width count operation (continuous measurement capable “H” width, “L” width, or
single-cycle measurement capable)
Operating clock (0.8 µs, 3.2 µs, 25.6 µs/5 MHz)
(Continued)
2
MB89820 Series
(Continued)
Part number
MB89821
MB89823R
MB89825
MB89P825
MB89PV820
Parameter
8-bit serial I/O
8 bits
One clock selectable from four transfer clocks
(one external shift clock, three internal shift clock, three internal shift clocks: 1.6 µs, 6.4 µs,
25.6 µs/5 MHz)
LSB first/MSB first selectability
UART
5-, 7-, 8-bit transfer capable
Internal baud-rate generator (Max 78125 bps/5 MHz)
LCD controller/
driver
Common output: 4
Segment output: 50 (Max)
Operating mode: 1/2 bias, 1/2 duty; 1/3 bias, 1/3 duty; 1/3 bias, 1/4 duty
LCD display RAM size: 50 × 4 bits
Dividing resistor for LCD driving: Built-in (An external resistor selectable)
External interrupt
2 channels (edge selectable) (1 channel also serves as a pulse width count timer input)
Standby mode
Sleep mode, stop mode
Process
CMOS
Operating voltage*2
2.7 V to 6.0 V
2.2 V*3 to 6.0 V
EPROM for use
MBM27C256A20TV
(LCC package)
*1: The function is selected by the mask option.
*2: Varies with conditions such as the operating frequency. (See section “■ Electrical Characteristics.”)
*3: The operation at less than 2.2 V is assured separately. Please contact FUJITSU LIMITED.
■ PACKAGE AND CORRESPONDING PRODUCTS
Package
MB89821
MB89823R
MB89825
MB89P825
×
FPT-80P-M11
MQP-80C-P01
: Available
MB89PV820
×
× : Not available
Note: For more information about each package, see section “■ Package Dimensions.”
3
MB89820 Series
■ DIFFERENCES AMONG PRODUCTS
1. Memory Size
Before evaluating using the piggyback product, verify its differences from the product that will actually be used.
Take particular care on the following points:
• On the MB89821, the register bank address upper than 0140H cannot be used. On the MB89823R, MB89825
and MB89P825, each register bank addresses upper than 0180H can be used.
• On the MB89P825, addresses BFF0H to BFF6H comprise the option setting area, option settings can be read
by reading these addresses.
• The stack area, etc., is set at the upper limit of the RAM.
2. Current Consumption
• In the case of the MB89PV820, add the current consumed by the EPROM which is connected to the top socket.
• However, the current consumption in sleep/stop modes is the same. (For more information, see section
“■ Electrical Characteristics.”
3. Mask Options
Functions that can be selected as options and how to designate these options vary by the product.
Before using options check section “■ Mask Options.”
Take particular care on the following point : Options are fixed on the MB89PV820.
4
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
VSS
X1
X0
RST
MOD1
MOD0
P45/SCK
P44/SO
P43/SI
P42/PWC/INT1
P41/PWM
P40
P33
P32
P31
P30/INT0
P25
P24
P23
P22
P21
P20
VCC
P17/SEG49
P16/SEG48
P15/SEG47
P14/SEG46
P13/SEG45
P12/SEG44
P11/SEG43
A10/SEG42
P07/SEG41
P06/SEG40
P05/SEG39
P04/SEG38
P03/SEG37
P02/SEG36
P01/SEG35
P00/SEG34
SEG33
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
V1
V2
V3
COM0
COM1
COM2
COM3
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
MB89820 Series
■ PIN ASSIGNMENT
(Top view)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
SEG30
SEG31
SEG32
(FPT-80P-M11)
5
MB89820 Series
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
SEG12
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
(Top view)
100
99
98
97
96
95
94
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
101
102
103
104
105
106
107
108
109
93
92
91
90
89
88
87
86
85
Each pin inside the dashed
line is for the MB89PV820 only.
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
SEG28
SEG29
VCC
SEG30
SEG31
SEG32
SEG33
P00/SEG34
P01/SEG35
P02/SEG36
P03/SEG37
P04/SEG38
P05/SEG39
P06/SEG40
P07/SEG41
P10/SEG42
P11/SEG43
P33
P32
P31
P30/INT0
P25
P24
P23
P22
P21
P20
P17/SEG49
P16/SEG48
P15/SEG47
P14/SEG46
P13/SEG45
P12/SEG44
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
110
111
112
81
82
83
84
SEG4
SEG3
SEG2
SEG1
SEG0
COM3
COM2
COM1
COM0
V3
V2
V1
X1
X0
VSS
RST
MOD1
MOD0
P45/SCK
P44/SO
P43/SI
P42/PWC/INT1
P41/PWM
P40
(MQP-80C-P01)
•
Pin assignment on package top (MB89PV820 only)
Pin no.
Pin name
Pin no.
Pin name
Pin no.
Pin name
Pin no.
Pin name
81
N.C.
89
A2
97
N.C.
105
OE
82
VPP
90
A1
98
O4
106
N.C.
83
A12
91
A0
99
O5
107
A11
84
A7
92
N.C.
100
O6
108
A9
85
A6
93
O1
101
O7
109
A8
86
A5
94
O2
102
O8
110
A13
87
A4
95
O3
103
CE
111
A14
88
A3
96
VSS
104
A10
112
VCC
N.C.: Internally connected. Do not use.
6
MB89820 Series
■ PIN DESCRIPTION
Pin no.
Pin name
QFP*1
MQFP*2
3
14
X0
2
13
X1
6
18
MOD0
5
17
MOD1
4
16
Circuit
type
Function
A
Clock crystal oscillator pins
B
Operating mode selection pins
Connect directly to VSS.
RST
C
Reset I/O pin
This pin is an N-ch open-drain type with a pull-up resistor, and
a hysteresis input type. “L” is output from this pin by an internal
reset source (optional function). The internal circuit is
initialized by the input of “L”.
39 to 32
50 to 43 P00/SEG34 to
P07/SEG41
D
General-purpose N-ch open-drain I/O ports
Also serve as an LCD controller/driver segment output.
The port and segment output are switched by mask option in
8-bit unit.
31 to 24
42 to 35 P10/SEG42 to
P17/SEG49
D
General-purpose N-ch open-drain I/O ports
Also serve as an LCD controller/driver segment output.
The port and segment output are switched by mask option in 4
to 1-bit unit.
22 to 17
34 to 29 P20 to P25
F
General-purpose N-ch open-drain I/O ports
A pull-up resistor option is provided.
H
General-purpose input port
The input is hysteresis input.
Also serves as an external interrupt input (INT0).
A pull-up resistor option is provided.
H
General-purpose input ports
These pins are a hysteresis input type.
A pull-up resistor option is provided.
16
15 to 13
28
P30/INT0
27 to 25 P31 to P33
12
24
P40
E
General-purpose I/O port
A pull-up resistor option is provided.
11
23
P41/PWM
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as an 8-bit PWM timer toggle output (PWM).
10
22
P42/PWC/INT1
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as an 8-bit pulse width count timer input (PWC)
and an external interrupt input (INT1).
The PWC and INT1 input is hysteresis input.
9
21
P43/SI
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as an 8-bit serial I/O and a UART data input (SI).
The SI input is hysteresis input.
*1: FPT-80P-M11
*2: MQP-80C-P01
(Continued)
7
MB89820 Series
(Continued)
Pin no.
Circuit
type
Function
MQFP*2
8
20
P44/SO
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as a serial I/O and a UART data output (SO).
7
19
P45/SCK
E
General-purpose I/O port
A pull-up resistor option is provided.
Also serves as a serial I/O and a UART clock I/O (SCK).
The SCK input is hysteresis input.
G
LCD controller/driver segment output pins
COM0 to
COM3
G
LCD controller/driver common output pins
12 to 10 V1 to V3
—
LCD driving power supply pins
73 to 40
77 to 74
80 to 78
5 to 1, SEG0 to
80 to 56, SEG33
54 to 51
9 to 6
23
55
VCC
—
Power supply pin
1
15
VSS
—
Power supply (GND) pin
*1: FPT-80P-M11
*2: MQP-80C-P01
8
Pin name
QFP*1
MB89820 Series
• External EPROM pins (MB89PV820 only)
Pin no.
Pin name
I/O
Function
82
VPP
O
“H” level output pin
83
84
85
86
87
88
89
90
91
A12
A7
A6
A5
A4
A3
A2
A1
A0
O
Address output pins
93
94
95
O1
O2
O3
I
Data input pins
96
VSS
O
Power supply (GND) pin
98
99
100
101
102
O4
O5
O6
O7
O8
I
Data input pins
103
CE
O
ROM chip enable pin
Outputs “H” during standby.
104
A10
O
Address output pin
105
OE
O
ROM output enable pin
Outputs “L” at all times.
107
108
109
A11
A9
A8
O
Address output pins
110
A13
O
111
A14
O
112
VCC
O
EPROM power supply pin
81
92
97
106
N.C.
—
Internally connected pins
Be sure to leave them open.
9
MB89820 Series
■ I/O CIRCUIT TYPE
Type
Circuit
Remarks
A
• Crystal oscillator circuit
• At an oscillation feedback resistor of approximately
1 MΩ/5.0 V
X1
X0
Standby control signal
B
C
• At an output pull-up resistor (P-ch) of approximately
50 kΩ/5.0 V
• Hysteresis input
R
P-ch
N-ch
D
• N-ch open-drain output
• CMOS input
P-ch
N-ch
P-ch
N-ch
N-ch
Port
E
• Segment output optional
• CMOS output
• CMOS input
• Hysteresis input (peripheral input)
R
P-ch
P-ch
N-ch
Peripheral
Port
• Pull-up resistor optional
(Continued)
10
MB89820 Series
(Continued)
Type
Circuit
Remarks
F
• N-ch open-drain output
• CMOS input
R
P-ch
N-ch
• Pull-up resistor optional
G
• LCD controller/driver
P-ch
N-ch
P-ch
N-ch
H
• Hysteresis input
R
• Pull-up resistor optional
11
MB89820 Series
■ HANDLING DEVICES
1. Preventing Latchup
Latchup may occur on CMOS ICs if voltage higher than VCC or lower than VSS is applied to input and output pins
other than medium- to high-voltage pins or if higher than the voltage which shows on “1. Absolute Maximum
Ratings” in section “■ Electrical Characteristics” is applied between VCC and VSS.
When latchup occurs, power supply current increases rapidly and might thermally damage elements. When
using, take great care not to exceed the absolute maximum ratings.
Also, take care to prevent the analog power supply (AVCC and AVR) and analog input from exceeding the digital
power supply (VCC) when the analog system power supply is turned on and off.
2. Treatment of Unused Input Pins
Leaving unused input pins open could cause malfunctions. They should be connected to a pull-up or pull-down
resistor.
3. Treatment of Power Supply Pins on Microcontrollers with A/D and D/A Converters
Connect to be AVCC = DAVC = VCC and AVSS = AVR = VSS even if the A/D and D/A converters are not in use.
4. Treatment of N.C. Pins
Be sure to leave (internally connected) N.C. pins open.
5. Power Supply Voltage Fluctuations
Although VCC power supply voltage is assured to operate within the rated range, a rapid fluctuation of the voltage
could cause malfunctions, even if it occurs within the rated range. Stabilizing voltage supplied to the IC is therefore
important. As stabilization guidelines, it is recommended to control power so that VCC ripple fluctuations (P-P
value) will be less than 10% of the standard VCC value at the commercial frequency (50 to 60 Hz) and the transient
fluctuation rate will be less than 0.1 V/ms at the time of a momentary fluctuation such as when power is switched.
6. Precautions when Using an External Clock
Even when an external clock is used, oscillation stabilization time is required for power-on reset (optional) and
wake-up from stop mode.
7. Note to Noise In the External Reset Pin (RST)
If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external reset pin (RST) .
12
MB89820 Series
■ PROGRAMMING TO THE EPROM ON THE MB89P825
The MB89P825 is an OTPROM (one-time PROM) version for the MB89820 series.
1. Features
• 16-Kbyte PROM on chip
• Options can be set using the EPROM programmer.
• Equivalency to the MBM27C256A in EPROM mode (when programmed with the EPROM programmer)
2. Memory Space
Memory space in EPROM mode is diagrammed below.
Address
Single chip
EPROM mode
(Corresponding addresses on EPROM programmer)
0000H
I/O
0080H
RAM
0180H
Not available
8000H
0000H
Vacancy
(Read value FFH)
Not available
BFF0H
3FF0H
Option area
BFF6H
Option area
3FF6H
Vacancy
(Read value FFH)
Not available
4000H
C000H
PROM
16 KB
FFFFH
EPROM
16 KB
7FFFH
3. Programming to the EPROM
In EPROM mode, the MB89P825 functions equivalent to the MBM27C256A. This allows the PROM to be
programmed with a general-purpose EPROM programmer (the electronic signature mode cannot be used) by
using the dedicated socket adapter.
• Programming procedure
(1) Set the EPROM programmer to the MBM27C256A.
(2) Load program data into the EPROM programmer at 4000H to 7FFFH (note that addresses C000H to FFFFH
while operating as a single chip assign to 4000H to 7FFFH in EPROM mode).
Load option data into addresses 3FF0H to 3FF5H of the EPROM programmer. (For information about each
corresponding option, see “7. OTPROM Option Bit Map.”
(3) Program with the EPROM programmer.
13
MB89820 Series
4. Recommended Screening Conditions
High-temperature aging is recommended as the pre-assembly screening procedure for a product for a product
with a blanked OTPROM microcomputer program.
Program, verify
Aging
+150 ˚C, 48 h
Data verification
Assembly
5. Programming Yield
All bits cannot be programmed at Fujitsu shipping test to a blanked OTPROM microcomputer, due to its nature.
For this reason, a programming yield of 100% cannot be assured at all times.
6. EPROM Programmer Socket Adapter
Package
FPT-80P-M11
Compatible socket adapter
ROM-80QF2-28DP-8L3
Inquiry: Sunhayato Corp. : TEL
: +81-3-3984-7791
FAX
: +81-3-3971-0535
E-mail : [email protected]
14
MB89820 Series
7. OTPROM Option Bit Map
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Vacancy
Vacancy
Vacancy
Vacancy
Vacancy
Readable
Readable
Readable
Readable
Vacancy
Vacancy
Vacancy
Vacancy
Readable
Readable
Readable
Vacancy
Vacancy
3FF2H
Readable
3FF3H
3FF4H
3FF5H
Bit 1
Bit 0
Reset pin
output
1: Yes
0: No
Oscillation
stabilization
time
1: 218/FC
0: 214/FC
Power-on
reset
1: Yes
0: No
Vacancy
Vacancy
Vacancy
Vacancy
Readable
Readable
Readable
Readable
Readable
Vacancy
Vacancy
Vacancy
Vacancy
Vacancy
Vacancy
Readable
Readable
Readable
Readable
Readable
Readable
Readable
Vacancy
Vacancy
Readable
Readable
P25
Pull-up
1: No
0: Yes
P24
Pull-up
1: No
0: Yes
P23
Pull-up
1: No
0: Yes
P22
Pull-up
1: No
0: Yes
P21
Pull-up
1: No
0: Yes
P20
Pull-up
1: No
0: Yes
Vacancy
Vacancy
Readable
Readable
P45
Pull-up
1: No
0: Yes
P44
Pull-up
1: No
0: Yes
P43
Pull-up
1: No
0: Yes
P42
Pull-up
1: No
0: Yes
P41
Pull-up
1: No
0: Yes
P40
Pull-up
1: No
0: Yes
Vacancy
Vacancy
Vacancy
Vacancy
Readable
Readable
Readable
Readable
P33
Pull-up
1: No
0: Yes
P32
Pull-up
1: No
0: Yes
P31
Pull-up
1: No
0: Yes
P30
Pull-up
1: No
0: Yes
3FF0H Readable
3FF1H
Bit 2
Notes: • Set each bit to 1 to erase.
• Do not write 0 to the vacant bit.
The read value of the vacant bit is 1, unless 0 is written to it.
15
MB89820 Series
■ PROGRAMMING TO THE EPROM WITH PIGGYBACK/EVALUATION DEVICE
1. EPROM for Use
MBM27C256A-20TV
2. Programming Socket Adapter
To program to the PROM using an EPROM programmer, use the socket adapter (manufacturer: Sunhayato
Corp.) listed below.
Package
Adapter socket part number
LCC-32 (Rectangle)
ROM-32LC-28DP-YG
Inquiry: Sunhayato Corp. : TEL
: +81-3-3984-7791
FAX
: +81-3-3971-0535
E-mail : [email protected]
3. Memory Space
Memory space in each mode, such as 32 Kbyte PROM, option area is diagrammed below.
Address
Single chip
Corresponding addresses in EPROM programmer
0000H
I/O
0080H
RAM
0480H
Not available
8000H
0000H
PROM
32 KB
FFFFH
EPROM
32 KB
7FFFH
4. Programming to the EPROM
(1) Set the EPROM programmer to the MBM27C256A.
(2) Load program data into the EPROM programmer at 0000H to 7FFFH.
(3) Program to 0000H to 7FFFH with the EPROM programmer.
16
MB89820 Series
■ BLOCK DIAGRAM
X0
20-bit time-base
Oscillator
X1
timer
Clock controller
P41/PWM
counter
lation
P42/PWC/INT1
Port 3
P45/SCK
P44/SO
P43/SI
8-bit serial I/O
External
interrupt
P30/INT0
3
Noise
cancel-
Port 2
N-ch open-drain
I/O port
P31 to P33
8-bit pulse
width timer/
I/O port
RAM
UART
P40
CMOS I/O port
N-ch open-drain I/O port
16
F2MC-8L
CPU
Port 0 and port 1
6
P20 to P25
External
interrupt
Port 4
Reset circuit
(WDT)
RST
Internal bus
8-bit PWM timer
8
P00/SEG34
to P07/SEG41
8
P10/SEG42
to P17/SEG49
ROM
LCD
controller/driver
34
SEG0 to SEG33
Other pins
4
MOD0, MOD1,
VCC, VSS
3
COM0 to COM3
V1 to V3
17
MB89820 Series
■ CPU CORE
1. Memory Space
The microcontrollers of the MB89820 series offer a memory space of 64 Kbytes for storing all of I/O, data, and
program areas. The I/O area is located at the lowest address. The data area is provided immediately above the
I/O area. The data area can be divided into register, stack, and direct areas according to the application. The
program area is located at exactly the opposite end, that is, near the highest address. Provide the tables of
interrupt reset vectors and vector call instructions toward the highest address within the program area. The
memory space of the MB89820 series is structured as illustrated below.
Memory Space
MB89821
0000 H
0000 H
0000 H
I/O
0080 H
MB89825
MB89823
0080 H
I/O
0080 H
MB89P825
0000 H
0000 H
I/O
0080 H
MB89PV820
I/O
0080 H
I/O
Vacancy
00C0 H
0100 H
0140 H
RAM
192 B
0100 H
Register
RAM
256 B
0100 H
Register
RAM
256 B
Register
0180 H
0180 H
0100 H
RAM
256 B
0100 H
Register
RAM
1 KB
Register
0180 H
0200 H
0480 H
Unused
Unused
Unused
Unused
Unused
8000 H
C000 H
C000 H
External ROM
32 KB
E000 H
ROM
16 KB
F000 H
ROM
8 KB
ROM
4 KB
FFFFH
18
FFFFH
FFFFH
PROM
16 KB
FFFFH
FFFFH
MB89820 Series
2. Registers
The F2MC-8L family has two types of registers; dedicated registers in the CPU and general-purpose registers
in the memory. The following dedicated registers are provided:
Program counter (PC):
A 16-bit register for indicating instruction storage positions
Accumulator (A):
A 16-bit temporary register for storing arithmetic operations, etc. When the
instruction is an 8-bit data processing instruction, the lower byte is used.
Temporary accumulator (T):
A 16-bit register which performs arithmetic operations with the accumulator
When the instruction is an 8-bit data processing instruction, the lower byte is used.
Index register (IX):
A 16-bit register for index modification
Extra pointer (EP):
A 16-bit pointer for indicating a memory address
Stack pointer (SP):
A 16-bit register for indicating a stack area
Program status (PS):
A 16-bit register for storing a register pointer, a condition code
Initial value
16 bits
FFFDH
: Program counter
PC
A
: Accumulator
Undefined
T
: Temporary accumulator
Undefined
IX
: Index register
Undefined
EP
: Extra pointer
Undefined
SP
: Stack pointer
Undefined
PS
: Program status
I-flag = 0, IL1, IL0 = 11
Other bits are undefined.
The PS can further be divided into higher 8 bits for use as a register bank pointer (RP) and the lower 8 bits for
use as a condition code register (CCR). (See the diagram below.)
Structure of the Program Status Register
15
PS
14
13
12
RP
11
10
9
8
Vacancy Vacancy Vacancy
RP
7
6
H
I
5
4
IL1, 0
3
2
1
0
N
Z
V
C
CCR
19
MB89820 Series
The RP indicates the address of the register bank currently in use. The relationship between the pointer contents
and the actual address is based on the conversion rule illustrated below.
Rule for Conversion of Actual Addresses of the General-purpose Register Area
RP
Lower OP codes
"0" "0" "0" "0" "0" "0" "0" "1" R4 R3 R2 R1 R0 b2
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
↓
b1
b0
↓
↓
Generated addresses A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
The CCR consists of bits indicating the results of arithmetic operations and the contents of transfer data and
bits for control of CPU operations at the time of an interrupt.
H-flag : Set when a carry or a borrow from bit 3 to bit 4 occurs as a result of an arithmetic operation. Cleared
otherwise. This flag is for decimal adjustment instructions.
I-flag : Interrupt is allowed when this flag is set to 1. Interrupt is prohibited when the flag is set to 0. Set to 0
when reset.
IL1, 0 : Indicates the level of the interrupt currently allowed. Processes an interrupt only if its request level is
higher than the value indicated by this bit.
IL1
IL0
Interrupt level
0
0
0
1
1
0
2
1
1
3
1
High-low
High
Low = no interrupt
N-flag : Set if the MSB is set to 1 as the result of an arithmetic operation. Cleared when the bit is set to 0.
Z-flag : Set when an arithmetic operation results in 0. Cleared otherwise.
V-flag : Set if the complement on 2 overflows as a result of an arithmetic operation. Reset if the overflow does not
occur.
C-flag : Set when a carry or a borrow from bit 7 occurs as a result of an arithmetic operation. Cleared otherwise.
Set to the shift-out value in the case of a shift instruction.
20
MB89820 Series
The following general-purpose registers are provided:
General-purpose registers: An 8-bit register for storing data
The general-purpose registers are 8 bits and located in the register banks of the memory. One bank contains
eight registers and up to a total of 16 banks can be used on the MB89823R/825 (RAM 256 × 8 bits). The bank
currently in use is indicated by the register bank pointer (RP).
NoteThe number of register banks that can be used varies with the RAM size.
MB89821
MB89823R
MB89825
MB89P825
MB89PV820
0100H to 013FH
0100H to 017FH
0100H to 017FH
0100H to 017FH
0100H to 01FFH
8 banks
16 banks
16 banks
16 banks
32 banks
Register Bank Configuration
This address = 0100 H + 8 × (RP)
R0
R1
R2
R3
R4
R5
R6
R7
16 banks
Memory area
21
MB89820 Series
■ I/O MAP
Address
Read/write
Register name
00H
(R/W)
PDR0
01H
02H
Port 0 data register
Vacancy
(R/W)
PDR1
03H
04H
Register description
Port 1 data register
Vacancy
(R/W)
PDR2
Port 2 data register
05H
Vacancy
06H
Vacancy
07H
Vacancy
08H
(R/W)
STBC
Standby control register
09H
(R/W)
WDTC
Watchdog timer control register
0AH
(R/W)
TBCR
Time-base timer control register
0BH
0CH
Vacancy
(R)
PDR3
Port 3 data register
Vacancy
0DH
0EH
(R/W)
PDR4
Port 4 data register
0FH
(W)
DDR4
Port 4 data direction register
10H
Vacancy
11H
Vacancy
12H
(R/W)
CNTR
PWM timer control register
13H
(W)
COMR
PWM timer compare register
14H
(R/W)
PCR1
PWC pulse width control register 1
15H
(R/W)
PCR2
PWC pulse width control register 2
16H
(R/W)
RLBR
PWC reload buffer register
17H
(R/W)
NCCR
PWC noise cancellation control register
18H
Vacancy
19H
Vacancy
1AH
Vacancy
1BH
Vacancy
1CH
(R/W)
SMR
Serial mode register
1DH
(R/W)
SDR
Serial data register
1EH
Vacancy
1FH
Vacancy
(Continued)
22
MB89820 Series
(Continued)
Address
Read/write
Register name
Register description
20H
(R/W)
SMC1
21H
(R/W)
SRC
UART serial rate control register
22H
(R/W)
SSD
UART serial status/data register
23H
(R/W)
SIDR/SODR
24H
(R/W)
SMC2
UART serial mode control register 1
UART serial data register
UART serial mode control register 2
25H
Vacancy
26H
Vacancy
27H
Vacancy
28H
Vacancy
29H
Vacancy
2AH
Vacancy
2BH
Vacancy
2CH
Vacancy
2DH
Vacancy
2EH
Vacancy
2FH
Vacancy
30H
(R/W)
EIC1
31H to 5FH
External interrupt 1 control register
Vacancy
60H to 78H
(R/W)
VRAM
Display data RAM
79H
(R/W)
LCR1
LCD controller/driver control register
7AH
(R/W)
SEGR
Segment output selection register
7BH
Vacancy
7CH
(W)
ILR1
Interrupt level setting register 1
7DH
(W)
ILR2
Interrupt level setting register 2
7EH
(W)
ILR3
Interrupt level setting register 3
7FH
Vacancy
Note: Do not use vacancies.
23
MB89820 Series
■ ELECTRICAL CHARACTERISTICS
1. Absolute Maximum Ratings
(VSS = 0.0 V)
Parameter
Symbol
Value
Min
Max
Unit
Remarks
Power supply voltage
VCC
VSS –
0.3
VSS +
7.0
V
LCD power supply voltage
V3
VSS –
0.3
VSS +
7.0
V
V3 pin
VI1
VSS –
0.3
VCC +
0.3
V
VI1 must not exceed VSS + 7.0 V.
Except P00 to P07 and P10 to P17
for the MB89P825/PV820, and P20
to P25 without a pull-up resistor
VI2
VSS –
0.3
VSS +
7.0
V
P00 to P07 and P10 to P17 (when
selected as ports) for the MB89821/
823R/825, and P20 to P25 without a
pull-up resistor
VI3
VSS –
0.3
V3 + 0.3
V
P00 to P07 and P10 to P17 for the
MB89P825/PV820
VO1
VSS –
0.3
VCC +
0.3
V
VO1 must not exceed VSS + 7.0 V.
Except P00 to P07 and P10 to P17
for the MB89P825/PV820, and P20
to P25 without a pull-up resistor
VO2
VSS –
0.3
VSS +
7.0
V
P00 to P07 and P10 to P17 (when
selected as ports) for the MB89821/
823R/825, and P20 to P25 without a
pull-up resistor
VO3
VSS –
0.3
V3 + 0.3
V
P00 to P07 and P10 to P17 for the
MB89P825/PV820
“L” level output current
IOL
—
10
mA
Except power supply pins
“L” level average output
current
IOLAV
—
4
mA
Average value (operating current ×
operating rate)
Except power supply pins
Total “L” level output current
ΣIOL
—
40
mA
“H” level output current
IOH
—
–5
mA
Except power supply pins
“H” level average output
current
IOHAV
—
–2
mA
Average value (operating current ×
operating rate)
Except power supply pins
Total “H” level output current
ΣIOH
—
–10
mA
Power consumption
PD
—
300
mW
Operating temperature
TA
–40
+85
°C
Storage temperature
Tstg
–55
+150
°C
Input voltage
Output voltage
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
24
MB89820 Series
2. Recommended Operating Conditions
(VSS = 0.0 V)
Parameter
Value
Symbol
Power supply voltage
VCC
Unit
Remarks
Min
Max
2.2*
6.0*
V
Normal operation assurance range*
1.5
6.0
V
Retains the RAM state in stop mode
V3 pin
LCD power supply range.
The optimum value is dependent on
the element in use.
LCD power supply voltage
V3
VSS
6.0
V
Operating temperature
TA
–40
+85
°C
*: The minimum operating power supply voltage varies with the operating frequency.
6
5
Operating voltage (V)
Operation assurance range
4
3
2
1
1
2
3
4
5
1.3
1.0
0.8
Clock operating frequency (MHz)
4.0
2.0
Minimum execution time (instruction cycle) (µs)
Note: The shaded area is assured only for the MB89821/823R/825.
Figure 1
Operating Voltage vs. Clock Operating Frequency
Figure 1 indicates the operating frequency of the external oscillator at an instruction cycle of 4/FC.
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
25
MB89820 Series
3. DC Characteristics
Parameter
Symbol
Pin
VIH
P00 to P07,
P10 to P17,
P20 to P25,
P30 to P33,
P40 to P45
—
0.7 VCC*1
—
VCC +
0.3*1
V
VIHS
RST, MOD0,
MOD1, INT0,
SCK, SI,
PWC/INT1
—
0.8 VCC
—
VCC + 0.3
V
VIL
P00 to P07,
P10 to P17,
P22 to P25,
P30 to P33,
P40 to P45
—
VCC – 0.3
—
0.3 VCC*1
V
VILS
RST, MOD0,
MOD1, INT0,
SCK, SI,
PWC/INT1
—
VSS – 0.3
—
0.2 VCC
V
“H” level input
voltage
“L” level input
voltage
Open-drain
output pin
application
voltage
VD
P20 to P25,
P00 to P07,
P10 to P17
“H” level output
voltage
VOH
P40 to P45
“L” level output
voltage
Condition
(VCC = V3 = +5.0 V, VSS = 0.0 V, TA = –40°C to +85°C)
Value
Unit
Remarks
Min
Typ
Max
VSS – 0.3
—
VCC + 6.0
V
IOH = –2 mA
2.4
—
—
V
VOL1
P00 to P07,
P10 to P17,
P20 to P25,
P40 to P45
IOL = 1.8 mA
—
—
0.4
V
VOL2
RST
IOL = 4 mA
ILI1
Input leakage
current
(Hi-Z output
leakage current)
ILI2
—
P00 to P07 and P10
to P17 (when
selected as ports)
for the MB89821/
823R/825, and P20
to P25 without pullup resistor
—
—
0.4
V
MOD0, MOD1,
P30 to P33,
P40 to P45
—
—
±5
µA
Without pull-up
resistor for the
MB89821/823R/825
MOD0, MOD1, 0.0 V < VI <
VCC
P00 to P07,
P10 to P17,
P30 to P33,
P40 to P45
—
—
±5
µA
Without pull-up
resistor for the
MB89P825/PV820
P00 to P07,
P10 to P17,
P20 to P25
—
—
±1
µA
Without pull-up
resistor for the
MB89821/823R/825
—
—
±1
µA
Without pull-up
resistor for the
MB89P825/PV820
P20 to P25
0.0 V < VI <
6.0 V
(Continued)
26
MB89820 Series
(Continued)
Parameter
Symbol
Pin
Condition
(VCC =V3 = +5.0 V, VSS = 0.0 V, TA = –40°C to +85°C)
Value
Unit
Remarks
Min
Typ
Max
P20 to P25,
P30 to P33,
P40 to P45,
RST
V1 = 0.0 V
25
50
100
kΩ
Common output
RVCOM
impedance
COM0 to
COM3
V1 to V3 =
+5.0 V
—
—
2.5
kΩ
Segment output
RVSEG
impedance
SEG0 to
SEG49
V1 to V3 =
+5.0 V
—
—
15
kΩ
Between V3
and VSS
30
60
120
kΩ
—
—
±1
µA
Pull-up
resistance
LCD divided
resistance
LCD leakage
current
RPULL
—
RLCD
ILCDL
V1 to V3,
COM0 to
COM3,
SEG0 to
SEG49
FC = 5 MHz
tinst*3 = 0.8 µs
ICC
Power supply
current*2
ICCS
VCC
CIN
FC = 5 MHz
tinst*3 = 0.8 µs
Sleep mode
TA = +25°C
Stop mode
ICCH
Input
capacitance
—
Other than
VCC and VSS
f = 1 MHz
With pull-up
resistor
—
3.5
5.0
MB89821,
MB89823R,
mA
MB89825,
MB89PV820
—
4.0
6.5
mA MB89P825
MB89821,
MB89823R,
mA MB89825,
MB89PV820,
MB89P825
—
1.1
1.7
—
0.1
1
µA
MB89821,
MB89823R,
MB89825
—
0.1
10
µA
MB89PV820,
MB89P825
—
5
15
pF
*1: The input voltage to P00 to P07 and P10 to P17 for the MB89P825/PV820 must not exceed the LCD power
supply voltage (V3 pin voltage).
*2: The measurement condition of power supply current is as follows: the external clock, open output pins and the
external LCD dividing resistor.
In the case of the MB89PV820, the current consumed by the connected EPROM and ICE is not included.
*3: For information on tinst, see “(4) Instruction Cycle” in “4. AC Characteristics.”
27
MB89820 Series
4. AC Characteristics
(1) Reset Timing
Parameter
Symbol
RST “L” pulse width
t ZLZH
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = –40°C to +85°C)
Value
Condition
Unit
Remarks
Min
Max
—
48 tXCYL
—
ns
Notes : • tXCYL is the main clock oscillator period.
• If the reset pulse applied to the external reset pin (RST) does not meet the specifications, it may cause
malfunctions. Use caution so that the reset pulse less than the specifications will not be fed to the external
reset pin (RST) .
tZLZH
RST
0.2 VCC
0.2 VCC
(2) Power-on Reset
(VSS = 0.0 V, TA = –40°C to +85°C)
Parameter
Symbol
Power supply rising time
tR
Power supply cut-off time
tOFF
Condition
Value
Unit
Remarks
Min
Max
—
50
ms
Power-on reset
function only
1
—
ms
Due to repeated
operations
—
Note: Make sure that power supply rises within the selected oscillation stabilization time.
If power supply voltage needs to be varied in the course of operation, a smooth voltage rise is recommended.
2.0 V
VCC
0.2 V
0.2 V
tR
28
tOFF
0.2 V
MB89820 Series
(3) Clock Timing
(VSS = 0.0 V, TA = –40°C to +85°C)
Symbol
Parameter
Clock frequency
Pin
Value
Condition
Clock cycle time
tXCYL
Input clock duty ratio*
duty
Input clock rising/
falling time
—
X0
tCR
tCF
Remarks
Typ
Max
1
—
5
MHz
200
—
1000
ns
Crystal or ceramic
resonator
30
—
70
%
External clock
—
—
10
ns
External clock
FC
X0, X1
Unit
Min
*: duty = PWH/tHCYL, PWL/tHCYL
X0 and X1 Timing and Conditions
tXCYL
PWH
PWL
tCF
tCR
0.8 VCC
0.8 VCC
X0
0.2 VCC
0.2 VCC
0.2 VCC
Clock Conditions
When a crystal
or
ceramic resonator is used
X0
When an external clock in use
X1
X0
X1
Open
FC
FC
C0
C1
(4) Instruction Cycle
Parameter
Instruction cycle
(minimum execution time)
Symbol
tinst
Value (typical)
Unit
4/FC
µs
Remarks
tinst = 0.8 µs when operating at
FC = 5 MHz
29
MB89820 Series
(5) Serial I/O Timing
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = –40°C to +85°C)
Parameter
Symbol
Pin
Condition
Value
Min
Max
Unit
Serial clock cycle time
tSCYC
SCK
2 tinst*
—
µs
SCK ↓ → SO time
tSLOV
–200
200
ns
Valid SI → SCK ↑
tIVSH
0.5 tinst*
—
µs
SCK ↑ → valid SI hold time
tSHIX
SCK, SO Internal
shift clock
SI, SCK mode
SCK, SI
0.5 tinst*
—
µs
Serial clock “H” pulse width
tSHSL
1 tinst*
—
µs
Serial clock “L” pulse width
tSLSH
1 tinst*
—
µs
SCK ↓ → SO time
tSLOV
Valid SI → SCK ↑
SCK ↑ → valid SI hold time
SCK
0
200
ns
tIVSH
External
SCK, SO shift clock
mode
SI, SCK
0.5 tinst*
—
µs
tSHIX
SCK, SI
0.5 tinst*
—
µs
Remarks
*: For information on tinst, see “(4) Instruction Cycle.”
(6) UART Timing
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = –40°C to +85°C)
Parameter
Symbol
Pin
Value
Min
Max
Unit
Serial clock cycle time
tSCYC
SCK
2 tinst*
—
µs
SCK ↓ → SO time
tSLOV
–200
200
ns
Valid SI → SCK ↑
tIVSH
0.5 tinst*
—
µs
SCK ↑ → valid SI hold time
tSHIX
SCK, SO Internal
shift clock
SI, SCK mode
SCK, SI
0.5 tinst*
—
µs
Serial clock “H” pulse width
tSHSL
1 tinst*
—
µs
Serial clock “L” pulse width
tSLSH
1 tinst*
—
µs
SCK ↓ → SO time
tSLOV
Valid SI → SCK ↑
SCK ↑ → valid SI hold time
SCK
0
200
ns
tIVSH
External
SCK, SO shift clock
mode
SI, SCK
0.5 tinst*
—
µs
tSHIX
SCK, SI
0.5 tinst*
—
µs
*: For information on tinst, see “(4) Instruction Cycle.”
30
Condition
Remarks
MB89820 Series
Internal Shift Clock Mode
tSCYC
2.4 V
SCK
0.8 V
0.8 V
tSLOV
2.4 V
SO
0.8 V
tIVSH
tSHIX
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
SI
External Shift Clock Mode
tSHSL
tSLSH
0.8 VCC
SCK
0.2 VCC
0.8 VCC
0.2 VCC
tSLOV
SO
2.4 V
0.8 V
tIVSH
tSHIX
0.8 VCC
0.8 VCC
0.2 VCC
0.2 VCC
SI
31
MB89820 Series
(7) Peripheral Input Timing
(VCC = +5.0 V±10%, VSS = 0.0 V, TA = –40°C to +85°C)
Parameter
Symbol
Peripheral input “H” pulse
width
tILIH
Peripheral input “L” pulse
width
tIHIL
Pin
PWC/INT1
INT0
Condition
Value
Unit
Min
Max
2 tinst*
—
µs
2 tinst*
—
µs
Remarks
—
*: For information on tinst, see “(4) Instruction Cycle.”
tILIH
tIHIL
0.8 VCC
PWC/INT1
INT0
32
0.2 VCC
0.2 VCC
0.8 VCC
MB89820 Series
■ EXAMPLE CHARACTERISTICS
(1)
“L” Level Output Voltage
(2)
VOL vs. IOL
VCC = 2.5 V
VCC = 3.0 V
VCC = 2.0 V
VOL1 (V)
0.6
TA = +25°C
VCC = 4.0 V
0.5
VCC – VOH vs. IOH
VCC = 2.5 V
VCC – VOH (V)
VCC = 2.0 V
VCC = 3.0 V
1.0
TA = +25°C
0.9
VCC = 5.0 V
VCC = 6.0 V
0.4
“H” Level Output Voltage
0.3
0.8
VCC = 4.0 V
0.7
VCC = 5.0 V
0.6
VCC = 6.0 V
0.5
0.4
0.2
0.3
0.2
0.1
0.1
0
(3)
0
1
3
2
5
4
6
7
8
0
9 10
IOL (mA)
“H” Level Input Voltage/“L” Level Input
Voltage (CMOS Input)
(4)
0
–1
–2
–3
–4
–5
IOH (mA)
“H” level Input Voltage/“L” Level Input
Voltage (CMOS Hysteresis Input)
VIN vs. VCC
VIN (V)
5.0
VIN vs. VCC
VIN (V)
5.0
4.5
TA = +25°C
4.5
TA = +25°C
4.0
4.0
VIHS
3.5
3.5
3.0
3.0
2.5
2.5
2.0
2.0
VILS
1.5
1.5
1.0
1.0
0.5
0.5
0
1
0
1
2
3
4
5
6
7
2
3
4
5
6
7
VCC (V)
VCC (V)
VIHS: Threshold when input voltage in hysteresis
characteristics is set to “H” level
VILS: Threshold when input voltage in hysteresis
characteristics is set to “L” level
33
MB89820 Series
(5) Power Supply Current (External Clock)
ICC vs. V CC
ICCS vs. VCC
ICC(mA)
5.0
ICCS (mA)
1.5
TA = +25 °C
TA = +25 °C
1.4
4.5
FC = 5 MHz
1.3
FC = 4.2 MHz
1.2
4.0
3.5
1.1
FC = 3 MHz
3.0
FC = 5 MHz
FC = 4.2 MHz
1.0
2.5
0.9
2.0
0.8
FC = 3 MHz
0.7
1.5
FC = 1 MHz
0.6
1.0
0.5
0.5
FC = 1 MHz
0.4
0
0.3
1
2
3
4
5
7
6
0.2
VCC (V)
0.1
0
1
2
3
(6) Pull-up Resistance
RPULL vs. VCC
RPULL (kΩ)
1,000
TA = +25 °C
500
100
50
10
1
34
2
3
4
5
6
7
VCC (V)
4
5
6
7
VCC (V)
MB89820 Series
■ MASK OPTIONS
No.
Part number
MB89821/823R/825
MB89P825
MB89PV820
Specifying procedure
Specify when
ordering masking
Set with EPROM
programmer
Setting not
possible (Fixed)
1
Pull-up resistors
P20 to P25, P30 to P33, P40 to P45
Selectable by pin
Can be set per pin
Without pull-up
resistor
2
Power-on reset
With power-on reset
Without power-on reset
Selectable
Can be set
With power-on
reset
3
Oscillation stabilization time selection
(FC = 5 MHz)*1
Approx. 218/FC (Approx. 52.4 ms)
Approx. 214/FC (Approx. 3.28 ms)
Selectable
Can be set
Oscillation
stabilization time
Approx. 218/FC
(Approx. 52.4 ms)
4
Reset pin output
With reset output
Without reset output
Selectable
Can be set
With reset output
5
Segment output switching
50 segments: No port selection
49 segments: Selection of P17
48 segments: Selection of P17 to P16
46 segments: Selection of P17 to P14
42 segments: Selection of P17 to P10
34 segments: Selection of P17 to P10
and P07 to P00
Selectable*2
Can be set*3
Can be set*3
*1: The oscillation settling time is generated by dividing the oscillation clock frequency. Since the oscillation period
is not stable immediately after oscillation has been started, therefore, the oscillation settling time in the above
list should be regarded as a reference.
*2: Port selection must be same setting of the segment output selection register of LCD controller.
*3: Note that, when ports are set, the input voltage value for the port pins are different from those for mask ROM
products.
Ports are set by the register setting of the segment output selection register of LCD controller.
■ ORDERING INFORMATION
Part number
Package
MB89821PFM
MB89823RPFM
MB89825PFM
MB89P825PFM
80-pin Plastic QFP
(FPT-80P-M11)
MB89PV820CF
80-pin Ceramic MQFP
(MQP-80C-P01)
Remarks
35
MB89820 Series
■ PACKAGE DIMENSIONS
Note 1) * : These dimensions do not include resin protrusion.
Note 2) Pins width and pins thickness include plating thickness.
Note 3) Pins width do not include tie bar cutting remainder.
80-pin Plastic QFP
(FPT-80P-M11)
16.00±0.20(.630±.008)SQ
* 14.00±0.10(.551±.004)SQ
60
0.145±0.055
(.006±.002)
41
40
61
0.10(.004)
Details of "A" part
+0.20
+.008
1.50 –0.10 .059 –.004
(Mounting height)
0.25(.010)
INDEX
0~8˚
21
80
1
C
"A"
20
0.65(.026)
0.32±0.05
(.013±.002)
0.13(.005)
0.50±0.20
(.020±.008)
0.60±0.15
(.024±.006)
0.10±0.10
(.004±.004)
(Stand off)
M
2003 FUJITSU LIMITED F80016S-c-3-6
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
(Continued)
36
MB89820 Series
(Continued)
80-pin Ceramic MQFP
(MQP-80C-P01)
18.70(.736)TYP
12.00(.472)TYP
INDEX AREA
16.30±0.33
(.642±.013)
15.58±0.20
(.613±.008)
1.50(.059)TYP
1.00(.040)TYP
.047
+.016
–.008
1.27±0.13
(.050±.005)
22.30±0.33
(.878±.013)
24.70(.972)
TYP
0.30(.012)
TYP
0.80±0.25
(.0315±.010)
0.80±0.25
(.0315±.010)
+0.40
1.20 –0.20
4.50(.177)
TYP
INDEX AREA
18.12±0.20
12.02(.473)
(.713±.008)
TYP
10.16(.400)
14.22(.560)
TYP
TYP
18.40(.724)
REF
INDEX
1.27±0.13
(.050±.005)
6.00(.236)
TYP
0.30(.012)TYP
0.40±0.10
(.016±.004)
1.50(.059)
TYP
1.00(.040)
TYP
7.62(.300)TYP
9.48(.373)TYP
11.68(.460)TYP
0.40±0.10
(.016±.004)
+0.40
1.20 –0.20
+.016
.047 –.008
0.15±0.05 8.70(.343)
(.006±.002) MAX
C
1994 FUJITSU LIMITED M80001SC-4-2
Dimensions in mm (inches) .
Note : The values in parentheses are reference values.
37
MB89820 Series
FUJITSU LIMITED
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F0405
 FUJITSU LIMITED Printed in Japan