GS78108AB 1M x 8 8Mb Asynchronous SRAM BGA Commercial Temp Industrial Temp Features 8, 10, 12 ns 3.3 V VDD Symbol Pin Descriptions Description A0 to A19 Address input DQ1 to DQ8 Data input/output CE Chip enable input WE Write enable input OE Output enable input VDD +3.3 V power supply Description VSS Ground The GS78108A is a high speed CMOS Static RAM organized as 1,048,576-words by 8-bits. Static design eliminates the need for external clocks or timing strobes. The GS78108operates on a single 3.3 V power supply, and all inputs and outputs are TTL-compatible. The GS7810A8 is available in a 14 mm x 22 mm BGA package. NC No connect • Fast access time: 8, 10, 12 ns • CMOS low power operation: 240/190/170 mA at minimum cycle time • Single 3.3 V ± 0.3 V power supply • All inputs and outputs are TTL-compatible • Fully static operation • Industrial Temperature Option: –40° to 85°C • 14 mm x 22 mm, 119-bump, 1.27 mm Pitch Ball Grid Array package • RoHS-compliant package available Block Diagram A0 Address Input Buffer Row Decoder Column Decoder A19 CE WE OE Memory Array I/O Buffer Control DQ1 Rev: 1.04 5/2006 DQ8 1/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB 1M x 8 Async SRAM in Bump, 14x22mm BGA—Top View (Package B) 1 2 3 4 5 6 7 A NC A15 A14 A16 A13 A12 NC B NC A11 A10 CE A9 A8 NC C NC NC VDD, NC A17 VSS, NC NC NC D NC VDD VSS VSS VSS VDD NC E NC NC VDD VSS VDD NC NC F NC VDD VSS VSS VSS VDD NC G DQ1 NC VDD VSS VDD NC DQ5 H DQ2 VDD VSS VSS VSS VDD DQ6 J VDD VSS VDD VSS VDD VSS VDD K DQ3 VDD VSS VSS VSS VDD DQ7 L DQ4 NC VDD VSS VDD NC DQ8 M NC VDD VSS VSS VSS VDD NC N NC NC VDD VSS VDD NC NC P NC VDD VSS VSS VSS VDD NC R NC NC NC NC NC NC NC T NC A7 A6 WE A5 A4 NC U A18 A3 A2 OE A1 A0 A19 Note: Bumps 3C and 5C are actually NC’s but should be wired 3C = VDD and 5C = Vss to assure compatibility with future versions. Rev: 1.04 5/2006 2/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Truth Table CE OE WE DQ1 to DQ8 VDD Current H X X Not Selected ISB1, ISB2 L L H Read — L X L Write IDD L H H High Z — X: “H” or “L” Absolute Maximum Ratings Parameter Symbol Rating Unit Supply Voltage VDD –0.5 to +4.6 V Input Voltage VIN –0.5 to VDD +0.5 (≤ 4.6 V max.) V Output Voltage VOUT –0.5 to VDD +0.5 (≤ 4.6 V max.) V Allowable power dissipation PD 1.5 W Storage temperature TSTG –55 to 150 o C Note: Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation shall be restricted to Recommended Operating Conditions. Exposure to higher than recommended voltages for extended periods of time could affect device reliability. Recommended Operating Conditions Parameter Symbol Min Typ Max Unit Supply Voltage for -8/10/12 VDD 3.0 3.3 3.6 V Input High Voltage VIH 2.0 — VDD +0.3 V Input Low Voltage VIL –0.3 — 0.8 V Ambient Temperature, Commercial Range TAc 0 — 70 o C Ambient Temperature, Industrial Range TAi –40 — 85 o C Notes: 1. Input overshoot voltage should be less than VDD +2 V and not exceed 20 ns. 2. Input undershoot voltage should be greater than –2 V and not exceed 20 ns. Rev: 1.04 5/2006 3/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Capacitance Parameter Symbol Test Condition Max Unit Input Capacitance CIN VIN = 0 V 10 pF Output Capacitance COUT VOUT = 0 V 7 pF Notes: 1. Tested at TA = 25°C, f = 1 MHz 2. These parameters are sampled and are not 100% tested DC I/O Pin Characteristics Parameter Symbol Test Conditions Min Max Input Leakage Current IIL VIN = 0 to VDD –2 uA 2 uA Output Leakage Current IOL Output High Z, VOUT = 0 to VDD –1 uA 1 uA Output High Voltage VOH IOH = –4 mA 2.4 Output Low Voltage VOL IOL = +4 mA 0.4 V Power Supply Currents Parameter Symbol Test Conditions 0 to 70°C –40 to 85°C 8 ns 10 ns 12 ns 8 ns 10 ns 12 ns IDD E ≤ VIL All other inputs ≥ VIH or ≤ VIL Min. cycle time IOUT = 0 mA 160 mA 130 mA 115 mA 180 mA 150 mA 135 mA Standby Current ISB1 E ≥ VIH All other inputs ≥ VIH or ≤VIL Min. cycle time 60 mA 50 mA 50 mA 80 mA 70 mA 70 mA Standby Current ISB2 E ≥ VDD - 0.2V All other inputs ≥ VDD - 0.2V or ≤ 0.2V Operating Supply Current Rev: 1.04 5/2006 20 mA 4/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. 40 mA © 2003, GSI Technology GS78108AB AC Test Conditions Output Load 1 Parameter Conditions Input high level VIH = 2.4 V Input low level VIL = 0.4 V Input rise time tr = 1 V/ns Input fall time tf = 1 V/ns Input reference level 1.4 V Output Load 2 Output reference level 1.4 V 3.3 V Output load Fig. 1& 2 DQ 30pF1 50Ω VT = 1.4 V 589Ω DQ Notes: 1. Include scope and jig capacitance. 2. Test conditions as specified with output loading as shown in Fig. 1 unless otherwise noted 3. Output load 2 for tLZ, tHZ, tOLZ and tOHZ. 5pF1 434Ω AC Characteristics Read Cycle Parameter Symbol Read cycle time -8 -10 -12 Unit Min Max Min Max Min Max tRC 8 — 10 — 12 — ns Address access time tAA — 8 — 10 — 12 ns Chip enable access time (CE) tAC — 8 — 10 — 12 ns Output enable to output valid (OE) tOE — 3.5 — 4 — 5 ns Output hold from address change tOH 3 — 3 — 3 — ns Chip enable to output in low Z (CE) tLZ* 3 — 3 — 3 — ns Output enable to output in low Z (OE) tOLZ* 0 — 0 — 0 — ns Chip disable to output in High Z (CE) tHZ* — 4 — 5 — 6 ns Output disable to output in High Z (OE) tOHZ* — 3.5 — 4 — 5 ns Rev: 1.04 5/2006 5/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Read Cycle 1:CE = OE = VIL tRC Address tAA tOH Data Out Previous Data Data valid * These parameters are sampled and are not 100% tested Write Cycle Parameter Symbol Write cycle time -8 -10 -12 Unit Min Max Min Max Min Max tWC 8 — 10 — 12 — ns Address valid to end of write tAW 5.5 — 7 — 8 — ns Chip enable to end of write tCW 5.5 — 7 — 8 — ns Data set up time tDW 4 — 5 — 6 — ns Data hold time tDH 0 — 0 — 0 — ns Write pulse width tWP 5.5 — 7 — 8 — ns Address set up time tAS 0 — 0 — 0 — ns Write recovery time (WE) tWR 0 — 0 — 0 — ns Write recovery time (CE) tWR1 0 — 0 — 0 — ns Output Low Z from end of write tWLZ* 3 — 3 — 3 — ns Write to output in High Z tWHZ* — 3.5 — 4 — 5 ns Rev: 1.04 5/2006 6/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Write Cycle 1: WE Controlled tWC Address tAW tWR OE tCW CE tAS tWP WE tDW Data In tDH Data valid tWHZ tWLZ Data Out High impedance Write Cycle 2: CE Controlled tWC Address tAW tWR1 OE tAS tCW CE tWP WE tDW Data In Data valid Data Out Rev: 1.04 5/2006 tDH High impedance 7/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Package Dimensions—119-Bump FPBGA (Package B, Variation 1) (Date Code: yyww.31) Pin #1 Corner BOTTOM VIEW A1 Ø0.10S C Ø0.30S C AS B S Ø0.60~0.90 (119x) 1 2 3 4 5 6 7 Ø1.00(3x) REF 20.32 22±0.20 19.50 B 0.70 REF 1.27 7.62 12.00 C Rev: 1.04 5/2006 0.15 C 30 TYP. 14±0.20 SEATING PLANE 0.50~0.70 2.06.±0.13 0.90±0.10 0.15 C A 0.20(4x) 0.56±0.05 A B C D E F G H J K L M N P R T U 1.27 A B C D E F G H J K L M N P R T U 7 6 5 4 3 2 1 8/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Package Dimensions—119-Bump FPBGA (Package B, Variation 2) (Date Code: yyww.3H) TOP VIEW A1 1 2 3 4 5 6 BOTTOM VIEW A1 Ø0.10S C Ø0.30S C AS B S Ø0.60~0.90 (119x) 7 7 6 5 4 3 2 1 A B C D E F G H J K L M N P R T U 20.32 22±0.10 1.27 A B C D E F G H J K L M N P R T U B 1.27 C Rev: 1.04 5/2006 SEATING PLANE A 0.20(4x) 14±0.10 0.50~0.70 1.86.±0.13 0.15 C 7.62 9/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Ordering Information Part Number1 Package Access Time Temp. Range GS78108AB-8 119-Bump BGA2 8 ns Commercial GS78108AB-10 119-Bump BGA2 10 ns Commercial GS78108AB-12 119-Bump BGA2 12 ns Commercial GS78108AB-8I 119-Bump BGA2 8 ns Industrial GS78108AB-10I 119-Bump BGA2 10 ns Industrial GS78108AB-12I 119-Bump BGA2 12 ns Industrial GS78108AB-15I 119-Bump BGA2 15 ns Industrial GS78108AGB-8 RoHS-compliant 119-Bump BGA2 8 ns Commercial GS78108AGB-10 RoHS-compliant 119-Bump BGA2 10 ns Commercial GS78108AGB-12 RoHS-compliant 119-Bump BGA2 12 ns Commercial GS78108AGB-8I RoHS-compliant 119-Bump BGA2 8 ns Industrial GS78108AGB-10I RoHS-compliant 119-Bump BGA2 10 ns Industrial GS78108AGB-12I RoHS-compliant 119-Bump BGA2 12 ns Industrial GS78108AGB-15I RoHS-compliant 119-Bump BGA2 15 ns Industrial Status Notes: 1. Customers requiring delivery in Tape and Reel should add the character “T” to the end of the part number. For example: GS78108AB-12T 2. Please see pages 8 and 9 for date code information for Variation 1 and Variation 2 of the 119-bump BGA. Rev: 1.04 5/2006 10/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology GS78108AB Revision History Rev. Code: Old; New Types of Changes Format or Content • Creation of new datasheet GS78108AB_r1 GS78108AB_r1_01 Content GS78108AB_r1_01; GS78108AB_r1_02 Content/Format GS78108AB_r1_02; GS78108AB_r1_03 Content GS78108AB_r1_03; GS78108AB_r1_04 Content Rev: 1.04 5/2006 Page #/Revisions/Reason • Added AC specifications to datasheet • Updated format • Added variation information to package mechanical • Added Variation 2 119 BGA to datasheet • Added date codes to mechanicals • Added RoHS-compliant package information 11/11 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. © 2003, GSI Technology