LTC3419 Dual Monolithic 600mA Synchronous Step-Down Regulator DESCRIPTION FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High Efficiency Dual Step-Down Outputs: Up to 96% 600mA Current per Channel at VIN = 3V Only 35μA Quiescent Current During Operation (Both Channels) 2.25MHz Constant-Frequency Operation 2.5V to 5.5V Input Voltage Range Low Dropout Operation: 100% Duty Cycle No Schottky Diodes Required Internally Compensated for All Ceramic Capacitors Independent Internal Soft-Start for Each Channel Available in Fixed Output Versions Current Mode Operation for Excellent Line and Load Transient Response 0.6V Reference Allows Low Output Voltages User-Selectable Burst Mode® Operation Short-Circuit Protected Ultralow Shutdown Current: IQ < 1μA Available in Small MSOP or 3mm × 3mm DFN-8 Packages APPLICATIONS ■ ■ ■ ■ ■ Cellular Telephones Digital Still Cameras Wireless and DSL Modems Portable Media Players PDAs/Palmtop PCs The LTC®3419 is a dual, 2.25MHz, constant-frequency, synchronous step-down DC/DC converter in a tiny 3mm × 3mm DFN package. 100% duty cycle provides low dropout operation, extending battery life in portable systems. Low output voltages are supported with the 0.6V feedback reference voltage. Each regulator can supply 600mA output current. The input voltage range is 2.5V to 5.5V, making it ideal for Li-Ion and USB powered applications. Supply current during operation is only 35μA and drops to <1μA in shutdown. A user-selectable mode input allows the user to trade off between high efficiency Burst Mode operation and pulse-skipping mode. An internally set 2.25MHz switching frequency allows the use of tiny surface mount inductors and capacitors. Internal soft-start reduces inrush current during start-up. Both outputs are internally compensated to work with ceramic output capacitors. The LTC3419 is available in a low profile (0.75mm) 3mm × 3mm DFN package. The LTC3419 is also available in a fixed output voltage configuration selected via internal resistor dividers (see Table 2). , LT, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst Mode is a registered trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents, including 5481178, 6127815, 6304066, 6498466, 6580258, 6611131. TYPICAL APPLICATION Efficiency and Power Loss vs Output Current Dual Monolithic Buck Regulator in 8-Lead 3 × 3 DFN 100 80 10μF SW2 3.3μH SW1 22pF 22pF VOUT1 2.5V AT 600mA EFFICIENCY (%) LTC3419 3.3μH 1 70 60 0.1 50 40 0.01 30 VFB2 10μF 118k 59k GND 20 VFB1 59k 187k 10μF 3419 TA01 10 0 0.1 VOUT = 1.2V VOUT = 1.8V VOUT = 2.5V 1 10 100 OUTPUT CURRENT (mA) POWER LOSS (W) RUN2 VIN RUN1 MODE VOUT2 1.8V AT 600mA 10 VIN = 3.6V 90 VIN 2.5V TO 5.5V 0.001 0.0001 1000 3419 TA01b 3419f 1 LTC3419 ABSOLUTE MAXIMUM RATINGS (Note 1) Input Supply Voltage (VIN) ............................. –0.3 to 6V VFB1, VFB2 ........................................ –0.3V to VIN + 0.3V RUN1, RUN2, MODE ........................ –0.3V to VIN + 0.3V SW1, SW2 ....................................... –0.3V to VIN + 0.3V P-Channel SW Source Current (DC) (Note 2).......800mA N-Channel SW Source Current (DC) (Note 2) ......800mA Peak SW Source and Sink Current (Note 2) .............1.3A Operating Temperature Range (Note 3) .......–40 to 85°C Junction Temperature (Note 6) ............................. 125°C Storage Temperature Range...................–65°C to 125°C Lead Temperature (Soldering, 10 sec) MSOP Package ................................................. 300°C PACKAGE/ORDER INFORMATION TOP VIEW VFB1 1 RUN1 2 MODE 3 9 SW1 4 TOP VIEW 8 VFB2 7 RUN2 6 SW2 5 VIN VFB1 RUN1 MODE SW1 GND DD PART MARKING LTC3419EDD LTC3419EDD-1 VFB2 RUN2 SW2 VIN GND MS PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 120°C/W DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 40°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB ORDER PART NUMBER 10 9 8 7 6 1 2 3 4 5 ORDER PART NUMBER MS PART MARKING LTC3419EMS LTC3419EMS-1 LTCQK LTCWX LCQJ LCWW Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 3.6V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN ● TYP 2.5 MAX UNITS VIN VIN Operating Voltage 5.5 V VUV VIN Undervoltage Lockout VIN Low to High ● 2.1 2.5 V IFB Feedback Pin Input Current LTC3419 LTC3419-1 ● ● 3 ±30 5 nA μA VFBREG1 Regulated Feedback Voltage (Channel 1) LTC3419, 0°C < TA < 85°C LTC3419, –40°C < TA < 85°C LTC3419-1, –40°C < TA < 85°C ● ● 0.590 0.588 1.544 0.600 0.600 1.575 0.610 0.612 1.606 V V V VFBREG2 Regulated Feedback Voltage (Channel 2) LTC3419, 0°C < TA < 85°C LTC3419, –40°C < TA < 85°C LTC3419-1, –40°C < TA < 85°C ● ● 0.590 0.588 1.764 0.600 0.600 1.8 0.610 0.612 1.836 V V V ΔVLINE REG Reference Voltage Line Regulation 0.3 0.5 VIN = 2.5V to 5.5V (Note 7) %/V 3419f 2 LTC3419 ELECTRICAL CHARACTERISTICS The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = 3.6V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS ΔVLOAD REG Output Voltage Load Regulation ILOAD = 0mA to 600mA (Note 7) 0.5 IS Input DC Supply Current Active Mode (Note 4) Sleep Mode Shutdown VFB1 = VFB2 = 0.95 × VFBREG VFB1 = VFB2 = 1.05 × VFBREG , VIN = 5.5V RUN1 = RUN2 = 0V, VIN = 5.5V 500 35 0.1 700 60 1 μA μA μA fOSC Oscillator Frequency VFB = VFBREG 1.8 2.25 2.7 MHz ILIM Peak Switch Current Limit Channel 1 (600mA) Channel 2 (600mA) VIN = 3V, VFB < VFBREG , Duty Cycle < 35% 900 900 1200 1200 RDS(ON) Channel 1 (Note 5) Top Switch On-Resistance Bottom Switch On-Resistance Channel 2 (Note 5) Top Switch On-Resistance Bottom Switch On-Resistance MIN ● TYP MAX UNITS % mA mA VIN = 3.6V, ISW = 100mA VIN = 3.6V, ISW = 100mA 0.4 0.4 0.6 0.6 Ω Ω VIN = 3.6V, ISW = 100mA VIN = 3.6V, ISW = 100mA 0.4 0.4 0.6 0.6 Ω Ω 0.01 1 μA 0.1 0.95 1.3 ms 0.4 1 1.2 V 0.01 1 μA 1 1.2 V 0.01 1 μA ISW(LKG) Switch Leakage Current VIN = 5V, VRUN = 0V tSOFTSTART Soft-Start Time VFB from 10% to 90% Full Scale VRUN RUN Threshold High ● IRUN RUN Leakage Current ● VMODE MODE Threshold High ● IMODE MODE Leakage Current ● VBURST Output Ripple in Burst Mode Operation VOUT = 1.5V, COUT = 10μF Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by long term current density limitations. Note 3: The LTC3419E and LTC3419E-1 are guaranteed to meet specified performance from 0°C to 85°C. Specifications over the –40°C and 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Dynamic supply current is higher due to the internal gate charge being delivered at the switching frequency. 0.4 20 mVP-P Note 5: The DFN switch on-resistance is guaranteed by correlation to wafer level measurements. Note 6: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 7: The converter is tested in a proprietary test mode that connects the output of the error amplifier to the SW pin, which is connected to an external servo loop. 3419f 3 LTC3419 TYPICAL PERFORMANCE CHARACTERISTICS Burst Mode Operation TA = 25°C, VIN = 3.6V, unless otherwise noted. Pulse Skip Mode Operation Efficiency vs Input Voltage 100 SW 2V/DIV IOUT = 100mA 90 SW 2V/DIV EFFICIENCY (%) 80 VOUT 50mV/DIV AC-COUPLED VOUT 50mV/DIV AC-COUPLED IL 100mA/DIV IL 100mA/DIV 60 IOUT = 0.1mA 3419 G02 5μs/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 25mA IOUT = 10mA 50 3419 G01 2μs/DIV 70 IOUT = 1mA IOUT = 600mA 40 VIN = 3.6V VOUT = 1.8V ILOAD = 5mA VOUT = 1.8V 30 3.0 3.5 2.5 4.0 VIN (V) 4.5 5.5 5.0 3419 G03 Reference Voltage vs Temperature Oscillator Frequency vs Temperature 1.5 2.6 60 2.5 1.0 0 –0.5 VIN = 4.2V 2.3 SUPPLY CURRENT (μA) FREQUENCY (MHz) 0.5 VIN = 3.6V 2.2 VIN = 2.7V 2.1 2.0 40 VIN = 5.5V 30 VIN = 2.7V 20 –1.0 1.9 –1.5 –50 –25 0 50 25 75 TEMPERATURE (°C) 100 1.8 –50 125 –25 25 75 0 50 TEMPERATURE (°C) 3419 G04 2.5 0.45 2.0 0.40 MAIN SWITCH 1.5 0.5 3.5 4.0 VIN (V) 4.5 5.0 5.5 0.5 0.35 3419 G07 0.20 2.5 75 100 0.6 3.0 3.5 4.0 4.5 VIN (V) MAIN SWITCH 0.4 0.3 SYNCHRONOUS SWITCH SYNCHRONOUS SWITCH 0.2 0.25 3.0 25 0 50 TEMPERATURE (°C) Switch On-Resistance vs Temperature MAIN SWITCH 0.30 SYNCHRONOUS SWITCH –25 3419 G06 RDS(ON) (Ω) RDS(ON) (Ω) 0.50 0 2.5 10 –50 125 Switch On-Resistance vs Input Voltage 3.0 1.0 100 3419 G05 Switch Leakage vs Input Voltage LEAKAGE CURRENT (nA) ILOAD = 0A RUN1 = RUN2 = VIN 50 2.4 VFB (% ERROR) Supply Current vs Temperature 5.0 5.5 6.0 3419 G08 0.1 –50 VIN = 2.7V VIN = 3.6V VIN = 4.2V –25 25 75 0 50 TEMPERATURE (°C) 100 125 3419 G09 3419f 4 LTC3419 TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load Current Efficiency vs Load Current 100 100 90 90 90 80 80 80 70 70 70 60 50 40 60 50 40 30 30 20 20 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 VOUT = 1.2V 0 0.1 10 100 1 OUTPUT CURRENT (mA) EFFICIENCY (%) 100 EFFICIENCY (%) EFFICIENCY (%) Efficiency vs Load Current VOUT = 1.8V 0 0.1 10 100 1 OUTPUT CURRENT (mA) Efficiency vs Load Current VOUT = 2.5V 0 0.1 10 100 1 OUTPUT CURRENT (mA) 1000 2.5 1000 3419 G12 Load Regulation 2.0 VOUT = 1.2V VOUT = 1.8V VOUT = 2.5V Burst Mode OPERATION VOUT = 1.8V 1.5 VOUT ERROR (%) PULSE SKIP MODE 60 50 40 30 VOUT ERROR (%) 2.0 70 EFFICIENCY (%) VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 Load Regulation 3.0 80 1.5 Burst Mode OPERATION 1.0 0.5 1.0 0.5 0 0 20 –0.5 –0.5 10 VOUT = 1.8V 0 0.1 10 100 1 OUTPUT CURRENT (mA) –1.0 1000 0 100 200 400 300 LOAD CURRENT (mA) 3419 G13 500 600 –1.0 0.4 0.2 0 100 300 200 400 LOAD CURRENT (mA) 500 600 3419 G15 Start-Up from Shutdown VOUT = 1.8V ILOAD = 100mA Burst Mode OPERATION PULSE SKIP MODE 3419 G14 Line Regulation 0.6 40 3419 G11 100 90 50 20 VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 1000 60 30 3419 G10 VOUT ERROR (%) TA = 25°C, VIN = 3.6V, unless otherwise noted. Start-Up from Shutdown RUN 2V/DIV RUN 2V/DIV VOUT 1V/DIV VOUT 1V/DIV IL 500mA/DIV ILOAD 500mA/DIV 0 –0.2 –0.4 –0.6 2.5 250μs/DIV 3.0 3.5 4.0 VIN (V) 4.5 5.0 5.5 VIN = 3.6V VOUT = 1.8V ILOAD = 0A 3419 G17 250μs/DIV 3419 G18 VIN = 3.6V VOUT = 1.8V RLOAD = 3Ω 3419 G16 3419f 5 LTC3419 TYPICAL PERFORMANCE CHARACTERISTICS Load Step TA = 25°C, VIN = 3.6V, unless otherwise noted. Load Step Load Step VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED IL 500mA/DIV IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV 20μs/DIV 3419 G19 VIN = 3.6V VOUT = 1.8V ILOAD = 0A TO 600mA PIN FUNCTIONS 20μs/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 40mA TO 600mA 3419 G20 20μs/DIV 3419 G21 VIN = 3.6V VOUT = 1.2V ILOAD = 40mA TO 600mA (DD/MS) VFB1 (Pin 1/Pin 1): Regulator 1 Output Feedback. Receives the feedback voltage from the external resistive divider across the regulator 1 output. Nominal voltage for this pin is 0.6V. RUN1 (Pin 2/Pin 2): Regulator 1 Enable. Forcing this pin to VIN enables regulator 1, while forcing it to GND causes regulator 1 to shut down. MODE (Pin 3/Pin 3): Mode Select Input. To select pulseskipping mode, tie to VIN. Grounding this pin selects Burst Mode operation. Do not leave this pin floating. SW1 (Pin 4/Pin 4): Regulator 1 Switch Node Connection to the Inductor. This pin swings from VIN to GND. VIN (Pin 5/Pin 7): Main Power Supply. Must be closely de-coupled to GND. SW2 (Pin 6/Pin 8): Regulator 2 Switch Node Connection to the Inductor. This pin swings from VIN to GND. RUN2 (Pin 7/Pin 9): Regulator 2 Enable. Forcing this pin to VIN enables regulator 2, while forcing it to GND causes regulator 2 to shut down. VFB2 (Pin 8/Pin 10): Regulator 2 Output Feedback. Receives the feedback voltage from the external resistive divider across the regulator 2 output. Nominal voltage for this pin is 0.6V. Exposed Pad (Pin 9/NA): Ground. The Exposed Pad must be soldered to PCB for optimal thermal performance. GND (NA/Pins 5, 6): Ground. Connect to the (–) terminal of COUT, and the (–) terminal of CIN. Pin 5 of the MS package must be soldered to the PC board for optimal thermal performance. 3419f 6 LTC3419 FUNCTIONAL DIAGRAM REGULATOR 1 MODE 3 BURST CLAMP 5 VIN SLOPE COMP VFB1 – – 1 EA 0.6V VSLEEP + – SLEEP ITH + ICOMP + BURST S Q RS LATCH R Q SOFT-START SWITCHING LOGIC AND BLANKING CIRCUIT ANTI SHOOTTHRU 4 SW1 + IRCMP – SHUTDOWN RUN1 2 SLEEP2 0.6V REF RUN2 9 GND SLEEP1 OSC 7 OSC VFB2 8 REGULATOR 2 (IDENTICAL TO REGULATOR 1) 6 SW2 3419 FD 3419f 7 LTC3419 OPERATION The LTC3419 uses a constant-frequency, current mode architecture. The operating frequency is set at 2.25MHz. Both channels share the same clock and run in-phase. The output voltage is set by an external resistor divider returned to the VFB pins. An error amplifier compares the divided output voltage with a reference voltage of 0.6V and regulates the peak inductor current accordingly. Main Control Loop During normal operation, the top power switch (P-channel MOSFET) is turned on at the beginning of a clock cycle when the VFB voltage is below the reference voltage. The current into the inductor and the load increases until the peak inductor current (controlled by ITH) is reached. The RS latch turns off the synchronous switch and energy stored in the inductor is discharged through the bottom switch (N-channel MOSFET) into the load until the next clock cycle begins, or until the inductor current begins to reverse (sensed by the IRCMP comparator). MOSFET on. This cycle repeats at a rate that is dependent on load demand. For applications where low ripple voltage and constantfrequency operation is a higher priority than light load efficiency, pulse-skipping mode can be used by connecting the MODE pin to VIN. In this mode, the peak inductor current is not fixed, which allows the LTC3419 to switch at a constant-frequency down to very low currents, where it will begin skipping pulses. Dropout Operation When the input supply voltage decreases toward the output voltage the duty cycle increases to 100%, which is the dropout condition. In dropout, the PMOS switch is turned on continuously with the output voltage being equal to the input voltage minus the voltage drops across the internal P-channel MOSFET and the inductor. The peak inductor current is controlled by the internally compensated ITH voltage, which is the output of the error amplifier. This amplifier regulates the VFB pin to the internal 0.6V reference by adjusting the peak inductor current accordingly. An important design consideration is that the RDS(ON) of the P-channel switch increases with decreasing input supply voltage (see Typical Performance Characteristics). Therefore, the user should calculate the worst-case power dissipation when the LTC3419 is used at 100% duty cycle with low input voltage (see Thermal Considerations in the Applications Information section). Light Load Operation Soft-Start There are two modes to control the LTC3419 at light load currents: Burst Mode operation and pulse-skipping mode. Both automatically transition from continuous operation to the selected mode when the load current is low. In order to minimize the inrush current on the input bypass capacitor, the LTC3419 slowly ramps up the output voltage during start-up. Whenever the RUN1 or RUN2 pin is pulled high, the corresponding output will ramp from zero to full-scale over a time period of approximately 750μs. This prevents the LTC3419 from having to quickly charge the output capacitor and thus supplying an excessive amount of instantaneous current. To optimize efficiency, Burst Mode operation can be selected by grounding the MODE pin. When the load is relatively light, the peak inductor current (as set by ITH) remains fixed at approximately 60mA and the PMOS switch operates intermittently based on load demand. By running cycles periodically, the switching losses are minimized. The duration of each burst event can range from a few cycles at light load to almost continuous cycling with short sleep intervals at moderate loads. During the sleep intervals, the load current is being supplied solely from the output capacitor. As the output voltage droops, the error amplifier output rises above the sleep threshold, signaling the burst comparator to trip and turn the top Short-Circuit Protection When either regulator output is shorted to ground, the corresponding internal N-channel switch is forced on for a longer time period for each cycle in order to allow the inductor to discharge, thus preventing inductor current runaway. This technique has the effect of decreasing switching frequency. Once the short is removed, normal operation resumes and the regulator output will return to its nominal voltage. 3419f 8 LTC3419 APPLICATIONS INFORMATION A general LTC3419 application circuit is shown in Figure 1. External component selection is driven by the load requirement, and begins with the selection of the inductor L. Once the inductor is chosen, CIN and COUT can be selected. Inductor Selection Although the inductor does not influence the operating frequency, the inductor value has a direct effect on ripple current. The inductor ripple current ΔIL decreases with higher inductance and increases with higher VIN or VOUT : V Δ IL = OUT fO • L ⎛ ⎞ V • ⎜ 1 − OUT ⎟ VIN ⎠ ⎝ (1) Accepting larger values of ΔIL allows the use of low inductances, but results in higher output voltage ripple, greater core losses, and lower output current capability. A reasonable starting point for setting ripple current is 40% of the maximum output load current. So, for a 600mA regulator, ΔIL = 240mA (40% of 600mA). The inductor value will also have an effect on Burst Mode operation. The transition to low current operation begins when the peak inductor current falls below a level set by the internal burst clamp. Lower inductor values result in higher ripple current which causes the transition to occur at lower load currents. This causes a dip in efficiency in the upper range of low current operation. Furthermore, lower inductance values will cause the bursts to occur with increased frequency. Inductor Core Selection Different core materials and shapes will change the size/current and price/current relationship of an inductor. Toroid VIN 2.5V TO 5.5V C1 LTC3419 SW2 CF1 VFB2 R4 R3 GND MANUFACTURER Taiyo Yuden PART NUMBER CB2016T2R2M CB2012T2R2M CB2016T3R3M MAX DC VALUE CURRENT 2.2μH 2.2μH 3.3μH 510mA 530mA 410mA DCR HEIGHT 0.13Ω 1.6mm 0.33Ω 1.25mm 0.27Ω 1.6mm Panasonic ELT5KT4R7M 4.7μH 950mA 0.2Ω 1.2mm Sumida CDRH2D18/LD 4.7μH 630mA 0.086Ω 2mm Murata LQH32CN4R7M23 4.7μH 450mA 0.2Ω 2mm Taiyo Yuden NR30102R2M NR30104R7M 2.2μH 4.7μH 1100mA 750mA 0.1Ω 0.19Ω 1mm 1mm FDK FDKMIPF2520D FDKMIPF2520D FDKMIPF2520D 4.7μH 3.3μH 2.2μH 1100mA 1200mA 1300mA 0.11Ω 0.1Ω 0.08Ω 1mm 1mm 1mm TDK VLF3010AT4R7MR70 VLF3010AT3R3MR87 VLF3010AT2R2M1R0 4.7μH 700mA 0.28Ω 1mm 3.3μH 870mA 0.17Ω 1mm 2.2μH 1000mA 0.12Ω 1mm Input Capacitor (CIN) Selection In continuous mode, the input current of the converter is a square wave with a duty cycle of approximately VOUT / VIN . To prevent large voltage transients, a low equivalent series resistance (ESR) input capacitor sized for the maximum RMS current must be used. The maximum RMS capacitor current is given by: VOUT ( VIN − VOUT ) VIN L1 SW1 CF2 COUT2 Table 1. Representative Surface Mount Inductors IRMS ≈ IMAX RUN2 VIN RUN1 MODE L2 VOUT2 or shielded pot cores in ferrite or permalloy materials are small and do not radiate much energy, but generally cost more than powdered iron core inductors with similar electrical characteristics. The choice of which style inductor to use often depends more on the price versus size requirements, and any radiated field/EMI requirements, than on what the LTC3419 requires to operate. Table 1 shows some typical surface mount inductors that work well in LTC3419 applications. VOUT1 VFB1 R1 R2 COUT1 3419 F01 Where the maximum average output current IMAX equals the peak current minus half the peak-to-peak ripple current, IMAX = ILIM – ΔIL /2. This formula has a maximum at VIN = 2VOUT, where IRMS = IOUT/2. This simple worst-case is commonly used to design because even significant Figure 1. LTC3419 General Schematic 3419f 9 LTC3419 APPLICATIONS INFORMATION deviations do not offer much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours lifetime. This makes it advisable to further derate the capacitor, or choose a capacitor rated at a higher temperature than required. Several capacitors may also be paralleled to meet the size or height requirements of the design. An additional 0.1μF to 1μF ceramic capacitor is also recommended on VIN for high frequency decoupling when not using an all-ceramic capacitor solution. However, care must be taken when ceramic capacitors are used at the input. When a ceramic capacitor is used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VIN. At best, this ringing can couple to the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. For more information, see Application Note 88. Output Capacitor (COUT) Selection When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size. The selection of COUT is driven by the required effective series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating generally far exceeds the IRIPPLE(P-P) requirement. The output ripple ΔVOUT is determined by: ⎛ 1 ⎞ Δ VOUT ≈ Δ IL ⎜ ESR + 8 fOCOUT ⎟⎠ ⎝ where fO = operating frequency, COUT = output capacitance and ΔIL = ripple current in the inductor. For a fixed output voltage, the output ripple is highest at maximum input voltage since ΔIL increases with input voltage. If tantalum capacitors are used, it is critical that the capacitors are surge tested for use in switching power supplies. An excellent choice is the AVX TPS series of surface mount tantalum. These are specially constructed and tested for low ESR so they give the lowest ESR for a given volume. Other capacitor types include Sanyo POSCAP, Kemet T510 and T495 series, and Sprague 593D and 595D series. Consult the manufacturer for other specific recommendations. Using Ceramic Input and Output Capacitors Higher values, lower cost ceramic capacitors are now becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal for switching regulator applications. Because the LTC3419 control loop does not depend on the output capacitor’s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circuit size. Setting the Output Voltage The LTC3419 regulates the VFB1 and VFB2 pins to 0.6V during regulation. Thus, the output voltage is set by a resistive divider according to the following formula: ⎛ R2 ⎞ VOUT = 0 . 6 V ⎜ 1 + ⎟ ⎝ R1⎠ (2) Keeping the current small (< 10μA) in these resistors maximizes efficiency, but making it too small may allow stray capacitance to cause noise problems or reduce the phase margin of the error amp loop. To improve the frequency response of the main control loop, a feedback capacitor (CF) may also be used. Great care should be taken to route the VFB line away from noise sources, such as the inductor or the SW line. Fixed output versions of the LTC3419 (e.g. LTC3419-1) include an internal resistive divider, eliminating the need for external resistors. The resistor divider is chosen such that the VFB input current is approximately 3μA. For these versions the VFB pin should be connected directly to VOUT. Table 2 lists the fixed output voltages available for the LTC3419. Table 2. Fixed Output Voltage Versions PART NUMBER LTC3419 LTC3419-1 VOUT1 VOUT2 Adjustable Adjustable 1.575V 1.8V 3419f 10 LTC3419 APPLICATIONS INFORMATION Checking Transient Response The regulator loop response can be checked by looking at the load transient response. Switching regulators take several cycles to respond to a step in load current. When a load step occurs, VOUT immediately shifts by an amount equal to ΔILOAD • ESR, where ESR is the effective series resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the regulator to return VOUT to its steady-state value. During this recovery time, VOUT can be monitored for overshoot or ringing that would indicate a stability problem. The initial output voltage step may not be within the bandwidth of the feedback loop, so the standard second order overshoot/DC ratio cannot be used to determine the phase margin. In addition, feedback capacitors (CF1 and CF2) can be added to improve the high frequency response, as shown in Figure 1. Capacitor CF provides phase lead by creating a high frequency zero with R2 which improves the phase margin. The output voltage settling behavior is related to the stability of the closed-loop system and will demonstrate the actual overall supply performance. For a detailed explanation of optimizing the compensation components, including a review of control loop theory, refer to Application Note 76. In some applications, a more severe transient can be caused by switching in loads with large (>1μF) input capacitors. The discharged input capacitors are effectively put in parallel with COUT , causing a rapid drop in VOUT. No regulator can deliver enough current to prevent this problem if the switch connecting the load has low resistance and is driven quickly. The solution is to limit the turn-on speed of the load switch driver. A Hot Swap™ controller is designed specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-starting. Efficiency Considerations The percent efficiency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the efficiency and which change would produce the most improvement. Percent efficiency can be expressed as: % Efficiency = 100% – (L1 + L2 + L3 + ...) where L1, L2, etc., are the individual losses as a percentage of input power. Although all dissipative elements in the circuit produce losses, four sources usually account for the losses in LTC3419 circuits: 1) VIN quiescent current, 2) switching losses, 3) I2R losses, 4) other system losses. 1. The VIN current is the DC supply current given in the Electrical Characteristics which excludes MOSFET driver and control currents. VIN current results in a small (<0.1%) loss that increases with VIN, even at no load. 2. The switching current is the sum of the MOSFET driver and control currents. The MOSFET driver current results from switching the gate capacitance of the power MOSFETs. Each time a MOSFET gate is switched from low to high to low again, a packet of charge dQ moves from VIN to ground. The resulting dQ/dt is a current out of VIN that is typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are the gate charges of the internal top and bottom MOSFET switches. The gate charge losses are proportional to VIN and thus their effects will be more pronounced at higher supply voltages. 3. I2R losses are calculated from the DC resistances of the internal switches, RSW , and external inductor, RL. In continuous mode, the average output current flows through inductor L, but is “chopped” between the internal top and bottom switches. Thus, the series resistance looking into the SW pin is a function of both top and bottom MOSFET RDS(ON) and the duty cycle (DC) as follows: RSW = (RDS(ON)TOP) • (DC) + (RDS(ON)BOT) • (1– DC) Hot Swap is a trademark of Linear Technology Corporation. 3419f 11 LTC3419 APPLICATIONS INFORMATION The RDS(ON) for both the top and bottom MOSFETs can be obtained from the Typical Performance Characteristics curves. Thus, to obtain I2R losses: I2R losses = IOUT2 • (RSW + RL) 4. Other “hidden” losses, such as copper trace and internal battery resistances, can account for additional efficiency degradations in portable systems. It is very important to include these “system” level losses in the design of a system. The internal battery and fuse resistance losses can be minimized by making sure that CIN has adequate charge storage and very low ESR at the switching frequency. Other losses, including diode conduction losses during dead-time, and inductor core losses, generally account for less than 2% total additional loss. Thermal Considerations In a majority of applications, the LTC3419 does not dissipate much heat due to its high efficiency. In the unlikely event that the junction temperature somehow reaches approximately 150°C, both power switches will be turned off and the SW node will become high impedance. The goal of the following thermal analysis is to determine whether the power dissipated causes enough temperature rise to exceed the maximum junction temperature (125°C) of the part. The temperature rise is given by: TRISE = PD • θJA Where PD is the power dissipated by the regulator and θJA is the thermal resistance from the junction of the die to the ambient temperature. The junction temperature, TJ, is given by: TJ = TRISE + TAMBIENT As a worst-case example, consider the case when the LTC3419 is in dropout on both channels at an input voltage of 2.7V with a load current of 600mA and an ambient temperature of 70°C. From the Typical Performance Characteristics graph of Switch Resistance, the RDS(ON) of the main switch is 0.6Ω. Therefore, power dissipated by each channel is: PD = IOUT2 • RDS(ON) = 216mV Given that the thermal resistance of a properly soldered DFN package is approximately 40°C/W, the junction temperature of an LTC3419 device operating in a 70°C ambient temperature is approximately: TJ = (2 • 0.216W • 40°C/W) + 70°C = 87.3°C which is well below the absolute maximum junction temperature of 125°C. PC Board Layout Considerations When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the LTC3419. These items are also illustrated graphically in the layout diagrams of Figures 2 and 3. Check the following in your layout: 1. Does the capacitor CIN connect to the power VIN (Pin 5) and GND (Pin 9) as closely as possible? This capacitor provides the AC current of the internal power MOSFETs and their drivers. 2. Are the respective COUT and L closely connected? The (–) plate of COUT returns current to GND and the (–) plate of CIN. 3. The resistor divider, R1 and R2, must be connected between the (+) plate of COUT1 and a ground sense line terminated near GND (Pin 9). The feedback signals VFB1 and VFB2 should be routed away from noisy components and traces, such as the SW lines (Pins 4 and 6), and their trace length should be minimized. 4. Keep sensitive components away from the SW pins, if possible. The input capacitor CIN and the resistors R1, R2, R3 and R4 should be routed away from the SW traces and the inductors. 5. A ground plane is preferred, but if not available, keep the signal and power grounds segregated with small signal components returning to the GND pin at a single point. These ground traces should not share the high current path of CIN or COUT. 6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power components. These copper areas should be connected to VIN or GND. 3419f 12 LTC3419 APPLICATIONS INFORMATION VIN 2.5V TO 5.5V C1 RUN2 VIN RUN1 MODE LTC3419 L2 VOUT2 SW2 L1 VOUT1 SW1 CF2 CF1 VFB2 R4 COUT2 R3 GND VFB1 R2 R1 COUT1 3419 F02 BOLD LINES INDICATE HIGH CURRENT PATHS Figure 2. LTC3419 Layout Diagram (See Board Layout Checklist) CF1 CF2 R2 R1 R3 R4 VOUT1 VOUT2 COUT1 COUT2 VIA TO VIN L1 VFB1 VFB2 RUN1 RUN2 MODE SW2 SW1 L2 VIN VIA TO GND GND CIN 3419 F03 Figure 3. LTC3419 Suggested Layout Design Example As a design example, consider using the LTC3419 in a portable application with a Li-Ion battery. The battery provides a VIN ranging from 2.8V to 4.2V. The load on each channel requires a maximum of 600mA in active mode and 2mA in standby mode. The output voltages are VOUT1 = 2.5V and VOUT2 = 1.8V. Start with channel 1. First, calculate the inductor value for about 40% ripple current (240mA in this example) at maximum VIN. Using a derivation of Equation 1: L1 = 2 . 5V ⎛ 2 . 5V ⎞ • ⎜ 1− = 1 . 8 7μH 2 . 25MHz • (240mA) ⎝ 4 . 2V ⎟⎠ For the inductor, use the closest standard value of 2.2μH. A 10μF ceramic capacitor should be more than sufficient for this output capacitor. As for the input capacitor, a typical value of CIN = 10μF should suffice, as the source impedance of a Li-Ion battery is very low. The feedback resistors program the output voltage. To maintain high efficiency at light loads, the current in these resistors should be kept small. Choosing 10μA with the 0.6V feedback voltage makes R1~60k. A close standard 1% resistor is 59k. Using Equation 2. ⎛V ⎞ R2 = ⎜ OUT − 1⎟ • R1 = 187k ⎝ 0.6 ⎠ An optional 22pF feedback capacitor (CF1) may be used to improve transient response. 3419f 13 LTC3419 APPLICATIONS INFORMATION Using the same analysis for channel 2 (VOUT2 = 1.8V), the results are: 100 90 80 L2 = 1.9μH EFFICIENCY (%) 70 R3 = 59k R4 = 118k 60 50 40 30 20 CF2 = 22pF VIN = 2.7V VIN = 3.6V VIN = 4.2V 10 VOUT = 1.8V 0 0.1 1 10 100 OUTPUT CURRENT (mA) Figure 4 shows the complete schematic for this example, along with the efficiency curve and transient response. 1000 100 VIN 2.5V TO 5.5V 80 RUN2 VIN RUN1 MODE L2 2.2μH SW2 70 L1 2.2μH LTC3419 VOUT1 2.5V AT 600mA SW1 CF2, 22pF EFFICIENCY (%) VOUT2 1.8V AT 600mA 90 C1 10μF CF1, 22pF 60 50 40 30 COUT2 10μF VFB2 R4 118k R3 59k VFB1 GND R1 59k 20 COUT1 10μF R2 187k 10 VOUT = 2.5V 0 0.1 3419 F04a C1, C2, C3: TAIYO YUDEN JMK316BJ106ML L1, L2: TDK VLF3010AT2R2M1RD 1 10 100 OUTPUT CURRENT (mA) 1000 3419 F04b Figure 4a. Design Example Circuit Figure 4b. Efficiency vs Output Current Load Step Transient Response VOUT 100mV/DIV AC-COUPLED VOUT 100mV/DIV AC-COUPLED IL 500mA/DIV IL 500mA/DIV ILOAD 500mA/DIV ILOAD 500mA/DIV 20μs/DIV VIN = 3.6V VOUT = 1.8V ILOAD = 40mA TO 600mA VIN = 2.7V VIN = 3.6V VIN = 4.2V 3419 F04c1 20μs/DIV VIN = 3.6V VOUT = 2.5V ILOAD = 40mA TO 600mA 3419 F04c2 Figure 4c. Transient Response 3419f 14 LTC3419 PACKAGE DESCRIPTION DD Package 8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698) R = 0.115 TYP 5 0.38 ± 0.10 8 0.675 ±0.05 3.5 ±0.05 1.65 ±0.05 2.15 ±0.05 (2 SIDES) 3.00 ±0.10 (4 SIDES) PACKAGE OUTLINE 1.65 ± 0.10 (2 SIDES) PIN 1 TOP MARK (NOTE 6) 0.25 ± 0.05 (DD) DFN 1203 4 0.25 ± 0.05 0.75 ±0.05 0.200 REF 0.50 BSC 2.38 ±0.05 (2 SIDES) 1 0.50 BSC 2.38 ±0.10 (2 SIDES) 0.00 – 0.05 BOTTOM VIEW—EXPOSED PAD RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE MS Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1661) 3.00 ± 0.102 (.118 ± .004) (NOTE 3) 0.889 ± 0.127 (.035 ± .005) 10 9 8 7 6 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.254 (.010) 1 2 3 4 5 0° – 6° TYP 0.86 (.034) REF 1.10 (.043) MAX DETAIL “A” DETAIL “A” 3.00 ± 0.102 (.118 ± .004) (NOTE 4) 4.90 ± 0.152 (.193 ± .006) 0.50 0.305 ± 0.038 (.0197) (.0120 ± .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 0.497 ± 0.076 (.0196 ± .003) REF 0.18 (.007) SEATING PLANE GAUGE PLANE 0.53 ± 0.152 (.021 ± .006) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 0.17 – 0.27 (.007 – .011) TYP 0.50 (.0197) BSC 0.127 ± 0.076 (.005 ± .003) MSOP (MS) 0603 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 3419f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC3419 TYPICAL APPLICATION Dual 600mA Buck Converter VIN 2.5V TO 5.5V VIN 2.5V TO 5.5V C1 10μF L1 3.3μH LTC3419 SW2 CF1, 22pF VFB2 R4 118k VOUT1 2.5V AT 600mA SW1 CF2, 22pF COUT2 10μF C1 10μF RUN2 VIN RUN1 MODE L2 3.3μH VOUT2 1.8V AT 600mA 1.8V/1.575V Dual 600mA Buck Converter R3 59k GND VFB1 R1 59k COUT1 10μF R2 187k L2 3.3μH VOUT2 1.8V AT 600mA RUN2 VIN RUN1 MODE SW2 COUT2 10μF L1 3.3μH LTC3419-1 VFB2 SW1 GND VFB1 COUT1 10μF 3419 TA02 C1, C2, C3: TAIYO YUDEN JMK316BJ106ML L1, L2: TDK VLF3010AT3R3M1RD VOUT1 1.575V AT 600mA 3419 TA03 C1, C2, C3: TAIYO YUDEN JMK316BJ106ML L1, L2: TDK VLF3010AT3R3M1RD RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LTC3405/LTC3405A 300mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.8V, IQ = 20μA, ISD = <1μA, ThinSOTTM Package LTC3406/LTC3406B 600mA IOUT, 1.5MHz, Synchronous Step-Down DC/DC Converters 96% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.6V, IQ = 20μA, ISD = <1μA, ThinSOT Package LTC3407/LTC3407-2 Dual 600mA/800mA IOUT, 1.5MHz/ 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.6V, IQ = 40μA, ISD = <1μA, MS10E and DFN Packages LTC3409 600mA IOUT, 1.7MHz/2.6MHz, Synchronous Step-Down DC/DC Converter 96% Efficiency, VIN(MIN) = 1.6V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.6V, IQ = 65μA, ISD = <1μA, DFN Package LTC3410/LTC3410B 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.8V, IQ = 26μA, ISD = <1μA, SC70 Package LTC3411 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD = <1μA, MS10 and DFN Packages LTC3412 2.5A IOUT 4MHz, Synchronous Step-Down DC/DC Converter 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN) = 0.8V, IQ = 60μA, ISD = <1μA, TSSOP-16E Package LTC3441/LTC3442, LTC3443 1.2A IOUT 2MHz, Synchronous Buck-Boost DC/DC Converters 95% Efficiency, VIN(MIN) = 2.4V, VIN(MAX) = 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 50μA, ISD = <1μA, DFN Package LTC3531/LTC3531-3/ 200mA IOUT, 1.5MHz, Synchronous Buck-Boost DC/DC Converter LTC3531-3.3 95% Efficiency, VIN(MIN) = 1.8V, VIN(MAX) = 5.5V, VOUT(MIN): 2V to 5V, IQ = 16μA, ISD = <1μA, ThinSOT and DFN Packages LTC3532 500mA IOUT, 2MHz, Synchronous Buck-Boost DC/DC Converter 95% Efficiency, VIN(MIN) = 2.4V, VIN(MAX) = 5.5V, VOUT(MIN): 2.4V to 5.25V, IQ = 35μA, ISD = <1μA, MS10 and DFN Packages LTC3547/LTC3547B Dual 300mA IOUT, 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN): 0.6V, IQ = 40μA, ISD = <1μA, DFN-8 Package LTC3548/LTC3548-1/ Dual 400mA and 800mA IOUT, LTC3548-2 2.25MHz, Synchronous Step-Down DC/DC Converters 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN): 0.6V, IQ = 40μA, ISD = <1μA, MS10E and DFN Packages LTC3561 95% Efficiency, VIN(MIN) = 2.5V, VIN(MAX) = 5.5V, VOUT(MIN): 0.8V, IQ = 240μA, ISD = <1μA, DFN Package 1.25A IOUT, 4MHz, Synchronous Step-Down DC/DC Converter ThinSOT™ is a trademark of Linear Technology Corporation. 3419f 16 Linear Technology Corporation LT 0407 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007