ETC LTC3405AES6

LTC3405A
1.5MHz, 300mA
Synchronous Step-Down
Regulator in ThinSOT
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DESCRIPTIO
FEATURES
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The LTC ®3405A is a high efficiency monolithic synchronous buck regulator using a constant frequency, current
mode architecture. Supply current during operation is
only 20µA and drops to <1µA in shutdown. The 2.5V to
5.5V input voltage range makes the LTC3405A ideally
suited for single Li-Ion battery-powered applications. 100%
duty cycle provides low dropout operation, extending
battery life in portable systems.
High Efficiency: Up to 96%
Very Low Quiescent Current: Only 20µA
During Operation
300mA Output Current at VIN = 3V
2.5V to 5.5V Input Voltage Range
1.5MHz Constant Frequency Operation
No Schottky Diode Required
Low Dropout Operation: 100% Duty Cycle
Stable with Ceramic Capacitors
0.8V Reference Allows Low Output Voltages
Shutdown Mode Draws < 1µA Supply Current
±2% Output Voltage Accuracy
Current Mode Operation for Excellent Line and
Load Transient Response
Overtemperature Protected
Low Profile (1mm) ThinSOTTM Package
Switching frequency is internally set at 1.5MHz, allowing
the use of small surface mount inductors and capacitors.
The LTC3405A is specifically designed to work well with
ceramic output capacitors, achieving very low output
voltage ripple and a small PCB footprint.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. Low
output voltages are easily supported with the 0.8V feedback reference voltage. The LTC3405A is available in a low
profile (1mm) ThinSOT package.
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APPLICATIO S
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Cellular Telephones
Personal Information Appliances
Wireless and DSL Modems
Digital Still Cameras
MP3 Players
Portable Instruments
For fixed 1.5V and 1.8V output versions, refer to the
LTC3405A-1.5/LTC3405A-1.8 data sheet.
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
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TYPICAL APPLICATIO
100
95
4
†
CIN
2.2µF
CER
VIN
SW
3
22pF
LTC3405A
1
6
4.7µH**
RUN
MODE
VFB
GND
2
5
VOUT*
3.3V
COUT††
4.7µF
CER
887k
280k
3405A F01a
*VOUT CONNECTED TO VIN FOR 2.7V < VIN < 3.3V
**MURATA LQH3C4R7M34
†
TAIYO YUDEN LMK212BJ225MG
††
TAIYO YUDEN JMK212BJ475MG
90
EFFICIENCY (%)
VIN
2.7V
TO 5.5V
VIN = 3.6V
85
80
VIN = 4.2V
75
VIN = 5.5V
70
65
60
0.1
1
100
10
OUTPUT CURRENT (mA)
1000
3405A F01b
Figure 1a. High Efficiency Step-Down Converter
Figure 1b. Efficiency vs Load Current
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LTC3405A
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ABSOLUTE
RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
Input Supply Voltage .................................. – 0.3V to 6V
MODE, RUN, VFB Voltages ......................... – 0.3V to VIN
SW Voltage .................................. – 0.3V to (VIN + 0.3V)
P-Channel Switch Source Current (DC) ............. 400mA
N-Channel Switch Sink Current (DC) ................. 400mA
Peak SW Sink and Source Current .................... 630mA
Operating Temperature Range (Note 2) .. – 40°C to 85°C
Junction Temperature (Note 3) ............................ 125°C
Storage Temperature Range ................ – 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
ORDER PART
NUMBER
TOP VIEW
RUN 1
6 MODE
GND 2
5 VFB
SW 3
4 VIN
LTC3405AES6
S6 PACKAGE
6-LEAD PLASTIC SOT-23
S6 PART MARKING
TJMAX = 125°C, θJA = 250°C/ W
LTZW
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 3.6V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
IVFB
Feedback Current
IPK
Peak Inductor Current
VIN = 3V, VFB = 0.7V, Duty Cycle < 35%
375
VFB
Regulated Feedback Voltage
(Note 4)
●
0.784
∆VOVL
∆Output Overvoltage Lockout
∆VOVL = VOVL – VFB
●
20
∆VFB
Reference Voltage Line Regulation
VIN = 2.5V to 5.5V (Note 4)
●
VLOADREG
Output Voltage Load Regulation
VIN
Input Voltage Range
IS
Input DC Bias Current
Pulse Skipping Mode
Burst Mode® Operation
Shutdown
(Note 5)
VFB = 0.7V, Mode = 3.6V, ILOAD = 0A
VFB = 0.83V, Mode = 0V, ILOAD = 0A
VRUN = 0V, VIN = 5.5V
fOSC
Oscillator Frequency
VFB = 0.8V
VFB = 0V
RPFET
RDS(ON) of P-Channel FET
ISW = 100mA
RNFET
RDS(ON) of N-Channel FET
ISW = –100mA
ILSW
SW Leakage
VRUN = 0V, VSW = 0V or 5V, VIN = 5V
VRUN
RUN Threshold
●
IRUN
RUN Leakage Current
●
VMODE
MODE Threshold
●
IMODE
MODE Leakage Current
●
TYP
MAX
UNITS
±30
nA
500
625
mA
0.8
0.816
50
80
mV
0.04
0.4
%/V
●
V
0.5
●
●
2.5
1.2
0.3
0.3
%
5.5
V
300
20
0.1
400
35
1
µA
µA
µA
1.5
210
1.8
MHz
kHz
0.7
0.85
Ω
0.6
0.90
Ω
±0.01
±1
µA
1
1.5
V
±0.01
±1
µA
1.5
2
V
±0.01
±1
µA
Burst Mode is a registered trademark of Linear Technology Corporation.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC3405AE is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: TJ is calculated from the ambient temperature TA and power
dissipation PD according to the following formula:
LTC3405A: TJ = TA + (PD)(250°C/W)
Note 4: The LTC3405A is tested in a proprietary test mode that connects
VFB to the output of the error amplifier.
Note 5: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
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LTC3405A
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TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure1a Except for the Resistive Divider Resistor Values)
Efficiency vs Input Voltage
100
100
IOUT = 100mA
80
IOUT = 10mA
IOUT = 1mA
IOUT = 250mA
80
75
70
65
VIN = 4.2V
60
VIN = 3.6V
50
VIN = 4.2V
40
50
2.5
10
3.5
4.0
4.5
INPUT VOLTAGE (V)
3.0
VIN = 4.2V
70
5.0
5.5
50
VOUT = 1.8V
0
0.1
3405A G02
3405A G04
Oscillator Frequency vs
Temperature
Reference Voltage vs
Temperature
0.814
100
1.70
VIN = 3.6V
VIN = 3.6V
60
VIN = 4.2V
1.60
FREQUENCY (MHz)
REFERENCE VOLTAGE (V)
EFFICIENCY (%)
80
70
VIN = 3.6V
1.65
0.809
VIN = 2.7V
0.804
0.799
0.794
40
0.1
VOUT = 1.3V
1
100
10
OUTPUT CURRENT (mA)
1.50
1.45
1.35
0.784
–50 –25
1000
1.55
1.40
0.789
50
1000
1
100
10
OUTPUT CURRENT (mA)
3405A G03
Efficiency vs Output Current
90
VOUT = 1.8V
40
0.1
1000
1
100
10
OUTPUT CURRENT (mA)
VIN = 5.5V
60
PULSE SKIPPING MODE
Burst Mode OPERATION
20
Burst Mode OPERATION
VOUT = 1.8V
55
VIN = 3.6V
80
30
IOUT = 0.1mA
60
90
70
EFFICIENCY (%)
85
VIN = 2.7V
90 V = 3.6V
IN
EFFICIENCY (%)
90
EFFICIENCY (%)
Efficiency vs Output Current
Efficiency vs Output Current
95
50
25
75
0
TEMPERATURE (°C)
100
125
1.30
–50 –25
50
25
75
0
TEMPERATURE (°C)
3405A G06
3405A G05
Oscillator Frequency vs
Supply Voltage
1.834
1.7
1.824
125
3405A G07
RDS(ON) vs Input Voltage
Output Voltage vs Load Current
1.8
100
1.2
1.6
1.5
1.4
1.0
0.9
1.814
1.804
1.794
1.784
1.2
1.774
0.7
0.6
SYNCHRONOUS
SWITCH
0.5
0.4
0.3
PULSE SKIPPING MODE
1.3
MAIN SWITCH
0.8
Burst Mode
OPERATION
RDS(0N) (Ω)
OUTPUT VOLTAGE (V)
OSCILLATOR FREQUENCY (MHz)
1.1
0.2
0.1
2
3
4
5
SUPPLY VOLTAGE (V)
6
3405A G08
0
100
200
300
400
LOAD CURRENT (mA)
500
600
3405A G09
0
0
1
3
2
5
4
INPUT VOLTAGE (V)
6
7
3405A G10
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TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1a Except for the Resistive Divider Resistor Values)
RDS(ON) vs Temperature
600
1600
1.0 V = 2.7V
IN
DYNAMIC SUPPLY CURRENT (µA)
VIN = 4.2V
VIN = 3.6V
0.8
0.6
0.4
0.2
1400
1200
1000
800
600
PULSE SKIPPING MODE
400
200
SYNCHRONOUS SWITCH
MAIN SWITCH
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
VOUT = 1.8V
ILOAD = 0A
400
PULSE SKIPPING MODE
300
200
100
Burst Mode OPERATION
0
125
2
3
4
5
SUPPLY VOLTAGE (V)
6
0
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
3405A G12
3405A G13
Switch Leakage vs Temperature
Switch Leakage vs Input Voltage
Burst Mode Operation
60
160
VIN = 5.5V
140 RUN = 0V
RUN = 0V
50
120
SWITCH LEAKAGE (pA)
SWITCH LEAKAGE (nA)
500
VIN = 3.6V
VOUT = 1.8V
ILOAD = 0A
Burst Mode OPERATION
3405A G11
100
80
60
SYNCHRONOUS
SWITCH
40
40
VOUT
100mV/DIV
AC COUPLED
30
20
IL
100mA/DIV
MAIN SWITCH
0
50
25
75
0
TEMPERATURE (°C)
SW
5V/DIV
SYNCHRONOUS
SWITCH
10
MAIN SWITCH
20
0
–50 –25
DYNAMIC SUPPLY CURRENT (µA)
1.2
RDS(ON) (Ω)
Dynamic Supply Current
vs Temperature
Dynamic Supply Current
100
125
0
1
2
3
4
INPUT VOLTAGE (V)
5
6
3405A G15
3405A G14
Pulse Skipping Mode Operation
Start-Up from Shutdown
IL
200mA/DIV
IL
200mA/DIV
ILOAD
200mA/DIV
IL
100mA/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 20mA
500ns/DIV
3405A G17
3405A G16
VOUT
100mV/DIV
AC
COUPLED
VOUT
1V/DIV
VOUT
10mV/DIV
AC
COUPLED
5µs/DIV
Load Step
RUN
2V/DIV
SW
5V/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 20mA
VIN = 3.6V
VOUT = 1.8V
ILOAD = 250mA
100µs/DIV
3405A G18
VIN = 3.6V
40µs/DIV
VOUT = 1.8V
ILOAD = 0mA TO 250mA
PULSE SKIPPING MODE
3405A G19
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TYPICAL PERFOR A CE CHARACTERISTICS
(From Figure 1a Except for the Resistive Divider Resistor Values)
Load Step
Load Step
Load Step
VOUT
100mV/DIV
AC
COUPLED
VOUT
100mV/DIV
AC
COUPLED
IL
200mA/DIV
IL
200mA/DIV
IL
200mA/DIV
ILOAD
200mA/DIV
ILOAD
200mA/DIV
ILOAD
200mA/DIV
VIN = 3.6V
40µs/DIV
VOUT = 1.8V
ILOAD = 20mA TO 250mA
PULSE SKIPPING MODE
3405A G20
VOUT
100mV/DIV
AC
COUPLED
VIN = 3.6V
40µs/DIV
VOUT = 1.8V
ILOAD = 20mA TO 250mA
Burst Mode OPERATION
3405A G21
VIN = 3.6V
40µs/DIV
VOUT = 1.8V
ILOAD = 0mA TO 250mA
Burst Mode OPERATION
3405A G22
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PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin above
1.2V enables the part. Forcing this pin below 0.4V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
GND (Pin 2): Ground Pin.
SW (Pin 3): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchronous power MOSFET switches.
VIN (Pin 4): Main Supply Pin. Must be closely decoupled
to GND, Pin 2, with a 2.2µF or greater ceramic capacitor.
VFB (Pin 5): Feedback Pin. Receives the feedback voltage
from an external resistive divider across the output.
MODE (Pin 6): Mode Select Input. To select pulse skipping mode, tie to VIN. Grounding this pin selects Burst
Mode operation. Do not leave this pin floating.
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MODE
6
SLOPE
COMP
0.65V
OSC
OSC
4 VIN
FREQ
SHIFT
–
VFB
+
5
–
+
0.8V
0.4V
– EA
SLEEP
S
Q
R
Q
RS LATCH
RUN
–
OVDET
0.85V
ICOMP
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTISHOOTTHRU
3 SW
OV
+
+
0.8V REF
5Ω
+
–
+
BURST
VIN
1
EN
SHUTDOWN
IRCMP
2 GND
–
3405A BD
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OPERATIO (Refer to Functional Diagram)
Main Control Loop
The LTC3405A uses a constant frequency, current mode
step-down architecture. Both the main (P-channel
MOSFET) and synchronous (N-channel MOSFET) switches
are internal. During normal operation, the internal top
power MOSFET is turned on each cycle when the oscillator
sets the RS latch, and turned off when the current comparator, ICOMP, resets the RS latch. The peak inductor
current at which ICOMP resets the RS latch, is controlled by
the output of error amplifier EA. The VFB pin, described in
the Pin Functions section, allows EA to receive an output
feedback voltage from an external resistive divider. When
the load current increases, it causes a slight decrease in
the feedback voltage relative to the 0.8V reference, which
in turn, causes the EA amplifier’s output voltage to increase until the average inductor current matches the new
load current. While the top MOSFET is off, the bottom
MOSFET is turned on until either the inductor current
starts to reverse, as indicated by the current reversal
comparator IRCMP, or the beginning of the next clock
cycle.
Comparator OVDET guards against transient overshoots
> 6.25% by turning the main switch off and keeping it off
until the fault is removed.
Burst Mode Operation
The LTC3405A is capable of Burst Mode operation in
which the internal power MOSFETs operate intermittently
based on load demand. To enable Burst Mode operation,
simply connect the MODE pin to GND. To disable Burst
Mode operation and enable PWM pulse skipping mode,
connect the MODE pin to VIN or drive it with a logic high
(VMODE > 1.5V). In this mode, the efficiency is lower at
light loads, but becomes comparable to Burst Mode
operation when the output load exceeds 25mA. The advantage of pulse skipping mode is lower output ripple and
less interference to audio circuitry.
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LTC3405A
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OPERATIO (Refer to Functional Diagram)
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 100mA regardless of the output load. Each burst event can last from
a few cycles at light loads to almost continuously cycling
with short sleep intervals at moderate loads. In between
these burst events, the power MOSFETs and any unneeded
circuitry are turned off, reducing the quiescent current to
20µA. In this sleep state, the load current is being supplied
solely from the output capacitor. As the output voltage
droops, the EA amplifier’s output rises above the sleep
threshold signaling the BURST comparator to trip and turn
the top MOSFET on. This process repeats at a rate that is
dependent on the load demand.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 210kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the inductor current has more time to decay, thereby preventing
runaway. The oscillator’s frequency will progressively
increase to 1.5MHz when VFB rises above 0V.
Dropout Operation
As the input supply voltage decreases to a value approaching the output voltage, the duty cycle increases toward the
maximum on-time. Further reduction of the supply voltage
forces the main switch to remain on for more than one cycle
until it reaches 100% duty cycle. The output voltage will then
be determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
Another important detail to remember is that at low input
supply voltages, the RDS(ON) of the P-channel switch
increases (see Typical Performance Characteristics). Therefore, the user should calculate the power dissipation when
the LTC3405A is used at 100% duty cycle with low input
voltage (See Thermal Considerations in the Applications
Information section).
Low Supply Operation
The LTC3405A will operate with input supply voltages as
low as 2.5V, but the maximum allowable output current is
reduced at this low voltage. Figure 2 shows the reduction
in the maximum output current as a function of input
voltage for various output voltages.
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant frequency architectures by preventing subharmonic oscillations at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles > 40%. However, the LTC3405A uses a
patent-pending scheme that counteracts this compensating ramp, which allows the maximum inductor peak
current to remain unaffected throughout all duty cycles.
600
MAXIMUM OUTPUT CURRENT (mA)
VOUT = 1.8V
500
VOUT = 1.3V
400
VOUT = 2.5V
300
200
100
0
2.5
3.0
3.5
4.0
4.5
SUPPLY VOLTAGE (V)
5.0
5.5
3405A F02
Figure 2. Maximum Output Current vs Input Voltage
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APPLICATIO S I FOR ATIO
The basic LTC3405A application circuit is shown in Figure␣ 1. External component selection is driven by the load
requirement and begins with the selection of L followed by
CIN and COUT.
Inductor Selection
For most applications, the value of the inductor will fall in
the range of 2.2µH to 10µH. Its value is chosen based on
the desired ripple current. Large value inductors lower
ripple current and small value inductors result in higher
ripple currents. Higher VIN or VOUT also increases the ripple
current as shown in equation 1. A reasonable starting point
for setting ripple current is ∆IL = 120mA (40% of 300mA).
∆IL =
 V 
1
VOUT  1 − OUT 
( f)(L)  VIN 
(1)
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 360mA rated
inductor should be enough for most applications (300mA
+ 60mA). For better efficiency, choose a low DC-resistance
inductor.
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately
100mA. Lower inductor values (higher ∆IL) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
Inductor Core Selection
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid or shielded pot cores in ferrite or permalloy materials
are small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
Table 1. Representative Surface Mount Inductors
MANUFACTURER PART NUMBER
Taiyo Yuden
MAX DC
VALUE CURRENT DCR HEIGHT
LB2016T2R2M
LB2012T2R2M
LB2016T3R3M
2.2µH
2.2µH
3.3µH
315mA
240mA
280mA
0.13Ω 1.6mm
0.23Ω 1.25mm
0.2Ω 1.6mm
Panasonic
ELT5KT4R7M
4.7µH
950mA
0.2Ω 1.2mm
Murata
LQH3C4R7M34
4.7µH
450mA
0.2Ω
Taiyo Yuden
LB2016T4R7M
4.7µH
210mA
0.25Ω 1.6mm
Panasonic
ELT5KT6R8M
6.8µH
760mA
0.3Ω 1.2mm
Panasonic
ELT5KT100M
10µH
680mA
0.36Ω 1.2mm
Sumida
CMD4D116R8MC 6.8µH
620mA
0.23Ω 1.2mm
2mm
electrical characteristics. The choice of which style inductor to use often depends more on the price vs size requirements and any radiated field/EMI requirements than on
what the LTC3405A requires to operate. Table 1 shows
some typical surface mount inductors that work well in
LTC3405A applications.
CIN and COUT Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle VOUT/VIN. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
1/ 2
VOUT (VIN − VOUT )]
[
CIN required IRMS ≅ IOMAX
VIN
This formula has a maximum at VIN = 2VOUT, where
IRMS = IOUT/2. This simple worst-case condition is commonly used for design because even significant deviations
do not offer much relief. Note that the capacitor
manufacturer’s ripple current ratings are often based on
2000 hours of life. This makes it advisable to further derate
the capacitor, or choose a capacitor rated at a higher
temperature than required. Always consult the manufacturer if there is any question.
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APPLICATIO S I FOR ATIO
The selection of COUT is driven by the required effective
series resistance (ESR). Typically, once the ESR requirement for COUT has been met, the RMS current rating
generally far exceeds the IRIPPLE(P-P) requirement. The
output ripple ∆VOUT is determined by:

1 
∆VOUT ≅ ∆IL  ESR +


8fC OUT 
where f = operating frequency, COUT = output capacitance
and ∆IL = ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since ∆IL increases with input voltage.
If tantalum capacitors are used, it is critical that the
capacitors are surge tested for use in switching power
supplies. An excellent choice is the AVX TPS series of
surface mount tantalum. These are specially constructed
and tested for low ESR so they give the lowest ESR for a
given volume. Other capacitor types include Sanyo
POSCAP, Kemet T510 and T495 series, and Sprague 593D
and 595D series. Consult the manufacturer for other
specific recommendations.
couple to the output and be mistaken as loop instability. At
worst, a sudden inrush of current through the long wires
can potentially cause a voltage spike at VIN, large enough
to damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage characteristics of all the ceramics for a given value and size.
Output Voltage Programming
The output voltage is set by a resistive divider according
to the following formula:
 R2
VOUT = 0.8V  1 + 
 R1
The external resistive divider is connected to the output,
allowing remote voltage sensing as shown in Figure 3.
0.8V ≤ VOUT ≤ 5.5V
R2
VFB
LTC3405A
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the
LTC3405A’s control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
However, care must be taken when ceramic capacitors are
used at the input and the output. When a ceramic capacitor
is used at the input and the power is supplied by a wall
adapter through long wires, a load step at the output can
induce ringing at the input, VIN. At best, this ringing can
(2)
R1
GND
3405A F03
Figure 3. Setting the LTC3405A Output Voltage
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage
of input power.
3405af
9
LTC3405A
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APPLICATIO S I FOR ATIO
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3405A circuits: VIN quiescent current and I2R
losses. The VIN quiescent current loss dominates the
efficiency loss at very low load currents whereas the I2R
loss dominates the efficiency loss at medium to high load
currents. In a typical efficiency plot, the efficiency curve at
very low load currents can be misleading since the actual
power lost is of no consequence as illustrated in Figure 4.
1
POWER LOST (W)
VOUT = 1.8V
0.01
0.0001
0.1
Other losses including CIN and COUT ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
VOUT = 3.3V
VOUT = 2.5V
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I2R losses, simply add RSW to
RL and multiply the result by the square of the average
output current.
VIN = 3.6V
0.1
0.001
2. I2R losses are calculated from the resistances of the
internal switches, RSW, and external inductor RL. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET RDS(ON) and the duty cycle
(DC) as follows:
Thermal Considerations
VOUT = 1.3V
1
100
10
LOAD CURRENT (mA)
1000
3405A F04
Figure 4. Power Lost vs Load Current
1. The VIN quiescent current is due to two components:
the DC bias current as given in the electrical characteristics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from VIN to ground. The resulting
dQ/dt is the current out of VIN that is typically larger than
the DC bias current. In continuous mode, IGATECHG =
f(QT + QB) where QT and QB are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to VIN and thus
their effects will be more pronounced at higher supply
voltages.
In most applications the LTC3405A does not dissipate
much heat due to its high efficiency. But, in applications
where the LTC3405A is running at high ambient
temperature with low supply voltage and high duty
cycles, such as in dropout, the heat dissipated may
exceed the maximum junction temperature of the part. If
the junction temperature reaches approximately 150°C,
both power switches will be turned off and the SW node
will become high impedance.
To avoid the LTC3405A from exceeding the maximum
junction temperature, the user will need to do some
thermal analysis. The goal of the thermal analysis is to
determine whether the power dissipated exceeds the
maximum junction temperature of the part. The temperature rise is given by:
TR = (PD)(θJA)
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to the
ambient temperature.
3405af
10
LTC3405A
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APPLICATIO S I FOR ATIO
The junction temperature, TJ, is given by:
T J = TA + TR
where TA is the ambient temperature.
As an example, consider the LTC3405A in dropout at an
input voltage of 2.7V, a load current of 300mA and an
ambient temperature of 70°C. From the typical performance graph of switch resistance, the RDS(ON) of the
P-channel switch at 70°C is approximately 0.94Ω. Therefore, power dissipated by the part is:
PD = ILOAD2 • RDS(ON) = 84.6mW
For the SOT-23 package, the θJA is 250°C/ W. Thus, the
junction temperature of the regulator is:
TJ = 70°C + (0.0846)(250) = 91.15°C
which is well below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction temperature is lower due to reduced switch resistance (RDS(ON)).
equal to (∆ILOAD • ESR), where ESR is the effective series
resistance of COUT. ∆ILOAD also begins to charge or
discharge COUT, which generates a feedback error signal.
The regulator loop then acts to return VOUT to its steadystate value. During this recovery time VOUT can be monitored for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
A second, more severe transient is caused by switching in
loads with large (>1µF) supply bypass capacitors. The
discharged bypass capacitors are effectively put in parallel
with COUT, causing a rapid drop in VOUT. No regulator can
deliver enough current to prevent this problem if the load
switch resistance is low and it is driven quickly. The only
solution is to limit the rise time of the switch drive so that
the load rise time is limited to approximately (25 • CLOAD).
Thus, a 10µF capacitor charging to 3.3V would require a
250µs rise time, limiting the charging current to about
130mA.
PC Board Layout Checklist
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
1
RUN
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3405A. These items are also illustrated graphically in
Figures 5 and 6. Check the following in your layout:
MODE
6
LTC3405A
2
–
GND
VFB
5
COUT
VOUT
+
R2
3
L1
SW
VIN
R1
4
CFWD
CIN
VIN
BOLD LINES INDICATE HIGH CURRENT PATHS
3405A F05
Figure 5. LTC3405A Layout Diagram
3405af
11
LTC3405A
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APPLICATIO S I FOR ATIO
VIA TO GND
R1
VOUT
VIN
VIA TO VIN
VIA TO VOUT
R2
PIN 1
L1
CFWD
LTC3405A
SW
COUT
CIN
GND
3405A F06
Figure 6. LTC3405A Suggested Layout
1. The power traces, consisting of the GND trace, the SW
trace and the VIN trace should be kept short, direct and
wide.
2. Does the VFB pin connect directly to the feedback
resistors? The resistive divider R1/R2 must be connected between the (+) plate of COUT and ground.
3. Does the (+) plate of CIN connect to VIN as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
4. Keep the (–) plates of CIN and COUT as close as possible.
5. Keep the switching node, SW, away from the sensitive
VFB node.
Design Example
As a design example, assume the LTC3405A is used in a
single lithium-ion battery-powered cellular phone
application. The VIN will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.25A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
2.5V. With this information we can calculate L using
equation (1),
L=
 V 
1
VOUT  1 − OUT 
( f)(∆IL )  VIN 
(3)
Substituting VOUT = 2.5V, VIN = 4.2V, ∆IL = 100mA and
f = 1.5MHz in equation (3) gives:
L=
2.5V
 2.5V 
1 −
 ≅ 6.8µH
1.5MHz(100mA)  4.2V 
For best efficiency choose a 300mA or greater inductor
with less than 0.3Ω series resistance.
CIN will require an RMS current rating of at least 0.125A ≅
ILOAD(MAX)/2 at temperature and COUT will require an ESR
of less than 0.5Ω. In most cases, a ceramic capacitor will
satisfy this requirement.
For the feedback resistors, choose R1 = 412k. R2 can
then be calculated from equation (2) to be:
V

R2 =  OUT − 1 R1 = 875.5k; use 887k
 0.8

Figure 7 shows the complete circuit along with its efficiency curve.
3405af
12
LTC3405A
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APPLICATIO S I FOR ATIO
4
†
CIN
2.2µF
CER
VIN
SW
3
6.8µH*
VOUT
2.5V
22pF
LTC3405A
1
6
COUT**
4.7µF
CER
RUN
VFB
MODE
5
887k
GND
412k
2
3405A F07a
*SUMIDA CMD4D11-6R8MC
** TAIYO YUDEN JMK212BJ475MG
†
TAIYO YUDEN LMK212BJ225MG
Figure 7a
100
VIN = 2.7V
90
VIN = 3.6V
80
EFFICIENCY (%)
VIN
2.7V
TO 4.2V
VIN = 4.2V
70
60
50
40
30
0.1
1
100
10
OUTPUT CURRENT (mA)
1000
3405A F07b
Figure 7b
VOUT
100mV/DIV
AC COUPLED
IL
200mA/DIV
ILOAD
200mA/DIV
VIN = 3.6V
20µs/DIV
VOUT = 2.5V
ILOAD = 100mA TO 300mA
3405A F07c
Figure 7c
3405af
13
LTC3405A
U
TYPICAL APPLICATIO S
Single Li-Ion to 1.2V/300mA Regulator
Using Ceramic and Tantalum Output Capacitors
VIN
2.7V
TO 4.2V
4
CIN**
2.2µF
CER
SW
VIN
4.7µH*
3
22pF
LTC3405A
1
6
COUT1*** +
1µF
CER
RUN
VFB
MODE
5
887k
GND
1.774M
2
3405A TA01a
VOUT
1.2V
COUT2†
22µF
TANT
*MURATA LQH3C4R7M34
**TAIYO YUDEN CERAMIC LMK212BJ225MG
***TAIYO YUDEN CERAMIC JMK107BJ105MA
†
AVX TAJA226M006R
100
VIN = 2.7V
90
VOUT
100mV/DIV
AC COUPLED
EFFICIENCY (%)
80
VIN = 3.6V
70
VIN = 4.2V
IL
200mA/DIV
60
50
ILOAD
200mA/DIV
40
30
0.1
VIN = 3.6V
20µs/DIV
VOUT = 1.2V
ILOAD = 100mA TO 300mA
1000
1
100
10
OUTPUT CURRENT (mA)
3405A TA01b
3405A TA01c
Single Li-Ion to 1V/200mA Regulator
Using All Ceramic Capacitors Optimized for Small Footprint
VIN
2.7V
TO 4.2V
4
CIN**
4.7µF
CER
VIN
SW
3
22pF
LTC3405A
1
3.3µH*
RUN
6
MODE
VFB
GND
2
5
VOUT
1V
COUT**
4.7µF
CER
3405A TA02a
249k
1M
*TAIYO YUDEN LM2016T3R3M
**TAIYO YUDEN CERAMIC JMK212BJ475MG
90
VIN = 2.7V
EFFICIENCY (%)
80
70
VOUT
100mV/DIV
AC COUPLED
VIN = 4.2V
VIN = 3.6V
IL
100mA/DIV
60
50
ILOAD
100mA/DIV
40
30
0.1
1
100
10
OUTPUT CURRENT (mA)
1000
3405A TA02b
VIN = 3.6V
20µs/DIV
VOUT = 1V
ILOAD = 100mA TO 200mA
3405A TA02c
3405af
14
LTC3405A
U
PACKAGE DESCRIPTIO
S6 Package
6-Lead Plastic SOT-23
(Reference LTC DWG # 05-08-1636)
2.90 BSC
(NOTE 4)
0.754
0.854 ± 0.127
2.80 BSC
3.254
1.50 – 1.75
(NOTE 4)
PIN ONE ID
0.95 BSC
1.9 BSC
RECOMMENDED SOLDER PAD LAYOUT
0.30 – 0.45 TYP
6 PLCS (NOTE 3)
0.95 BSC
0.80 – 0.90
0.20 BSC
0.01 – 0.10
1.00 MAX
DATUM ‘A’
0.30 – 0.50 REF
0.09 – 0.20
(NOTE 3)
1.90 BSC
S6 TSOT-23 0801
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3405af
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3405A
U
TYPICAL APPLICATIO
Single Li-Ion to 1.5V/150mA Regulator
Using All Ceramic Capacitors Optimized for Smallest Footprint
VIN
2.7V
TO 4.2V
4
CIN**
2.2µF
CER
VIN
SW
3
6
VOUT
1.5V
22pF
LTC3405A
1
2.2µH*
COUT**
2.2µF
CER
RUN
VFB
MODE
GND
2
5
887k
1M
3405A TA03a
*TAIYO YUDEN LB2012T2R2M
**TAIYO YUDEN CERAMIC LMK212BJ225MG
90
VOUT = 1.5V
80
EFFICIENCY (%)
70
VIN = 2.7V
VOUT
100mV/DIV
AC COUPLED
VIN = 3.6V
VIN = 4.2V
IL
200mA/DIV
60
50
ILOAD
100mA/DIV
40
30
0.1
1000
1
100
10
OUTPUT CURRENT (mA)
VIN = 3.6V
20µs/DIV
VOUT = 1.5V
ILOAD = 50mA TO 150mA
3405A TA03b
3405A TA03c
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Fixed Output Versions of the LTC3405A
3405af
16
Linear Technology Corporation
LT/TP 0202 2K • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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