MICREL MIC2159YMME

MIC2159
SYNCHRONOUS-itty™ Step-Down
Converter IC
General Description
Features
The MIC2159 is a high efficiency, simple to use
synchronous buck controller ICs housed in a 10-pin MSOP
ePAD package. The MIC2159 switches at 400kHz,
allowing the smallest possible external components and is
designed to drive loads up to 30A. The devices feature
high output driver capability, combined with an all nchannel synchronous architecture.
The MIC2159 operates from a 3V to 14.5V input and can
be configured to generate output voltages as low as 0.8V.
Efficiencies of over 95% can be achieved within the
smallest possible printed circuit board space area.
The MIC2159 is available in a thermally capable 10-pin
ePAD MSOP package, with an junction operating range
from –40°C to +125°C.
•
•
•
•
•
•
•
•
•
•
•
Small footprint 10-lead ePAD MSOP
3V to 14.5V input voltage range
Adjustable output voltage down to 0.8V
400KHz operation
Drives two n-channel MOSFETs
- Built-in 3Ω drivers
Simple control: voltage-mode PWM
Fast transient response
- Transient Hysteretic control
- Externally compensated
Over-current protection
Hiccup mode short-circuit protection
Dual function COMP & EN pin
- ISD = 50µA
Short minimum ON time
- 30ns
- Very low duty cycle possible
Applications
• Point-of-Load DC/DC conversion
• High Current Power Supplies
• Telecom/datacom and Networking Power Supplies
• Servers and Workstations
• Graphics Cards and other PC Peripherals
___________________________________________________________________________________________________________
Typical Application
MIC2159 Adjustable Output 400kHz Converter
MLF and MicroLead Frame is a registered trademark of Amkor Technologies
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
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MIC2159
Ordering Information
Part Number
Output Voltage
Frequency
Juction Temperature
Range
Package
MIC2159YMME
Adj
400KHz
-40°C to +125°C
10-lead ePAD MSOP
Pin Configuration
10-lead e-PAD MSOP (MME)
Pin Description
Pin Number
(MSOP-10)
Pin Name
1
VIN
Supply voltage (Input): 3V to 14.5V
2
VDD
5V Internal Linear Regulator (Output): VDD is the external MOSFET gate drive supply voltage
and an internal supply bus for the IC. When Vin is ≤5V, VDD should be connected to Vin.
3
CS
Current Sense. Current-limit comparator non-inverting input. The current limit is sensed across
the FET during the ON time. The current can be set by the resistor in series with the CS pin.
4
COMP/EN
5
FB
6
GND
Pin Function
Compensation (Input): Dual function pin. Pin for external compensation. If this pin is pulled
below 0.2V, with the reference fully up the device shuts down (50µA typical current draw)
Feedback (Input): Input to error amplifier. Regulates error amplifier to 0.8V.
Ground (Return)
7
LSD
Low-Side Drive (Output): High-current driver output for external synchronous MOSFET.
8
VSW
Switch (Return): High-side MOSFET driver return
9
HSD
High-Side Drive (Output): High current output-driver for the high-side MOSFET.
When Vin is below 5v, 2.5v threshold FETs should be used. At Vin > 5V, 4.5V threshold FETs
should be used.
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BST
Boost (Input): Provides the drive voltage for the high-side MOSFET driver. The gate drive
voltage is higher than the source voltage by VIN minus a diode drop.
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Absolute Maximum Rating(1)
Operating Ratings(2)
Supply Voltage (VIN) ....................................................15.5V
Booststrapped Voltage (VBST) .................................. VIN +5V
Junction Temperature Range..............–40°C ≤ TJ ≤ +125°C
Ambient Storage Temp .............................–65°C to +150°C
Supply Voltage.............................................. +3V to +14.5V
Output Voltage Range ................................0.8V to VIN*DMAX
Package Thermal Resistance
θJA 10-lead ePAD MSOP................................... 63°C/W
Electrical Characteristics
Tj = 25ºC, bold values indicate -40ºC<Tj<+125ºC; Vin = 5V; unless otherwise specified
Parameter
Condition
Min
Typ
Max
Units
Regulation
Feedback Voltage
Reference
(+/- 1%)
0.792
0.8
0.808
V
Feedback Voltage
Reference
(+/- 2% over temp)
0.784
0.8
0.816
V
Feedback Bias Current
150
350
nA
Output Voltage Line
Regulation
0.03
%/V
Output Voltage Load
Regulation
0.5
%
Output Voltage Total
Regulation
3V ≤ VIN ≤ 14.5V; 1A ≤ IOUT ≤ 10A
0.6
1.5
%
400
450
kHz
(VOUT = 2.5V) Note 3
Oscillator Section
Oscillator Frequency
350
Maximum Duty Cycle
92
Minimum On-Time
%
Note 3
30
60
ns
VCS/EN =Vin- 0.25V; VFB = 0.7V
1.6
3
mA
50
150
µA
0.1
0.25
0.35
V
1
4
8
ms
4.7
5
5.3
V
Input and VDD Supply
PWM mode supply
current
Shutdown Quiescent
Current (MSOP-10)
(output switching but excluding external MOSFET gate
current.)
VCOMP = 0V
VCOMP Shutdown
Threshold (MSOP-10)
VCOMP Shutdown
Blanking Period (MSOP10)
Digital Supply Voltage
(VDD)
VIN >6V
Error Amplifier
DC Gain
70
dB
Transconductance
1.4
mS
Soft Start
Soft Start Current
After time out of internal timer
-13
9
-4
µA
135
200
275
µA
Current Sense
Current Sense Over
Current Trip Point
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Temperature Coefficient
Parameter
ppm/°C
2300
Condition
Min
Typ
Max
Units
Upper Threshold,
VFB_OVT
2
3.5
5
%
Lower Threshold,
VFB_UVT
-2
-3.5
-5
%
Output Fault Correction Thresholds
Gate Drivers
Rise/Fall Time
Into 3000pF at VIN > 5V
15
ns
Source, VIN= 4.5V
2.5
3
Sink, VIN = 4.5V
2.5
3
Ω
Output Driver Impedance
Driver Non-overlap Time
Source, VIN= 3V
3
4
Sink, VIN = 3V
3
4
Note 3
50
ns
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Guaranteed by design
4. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
5. Specification for packaged product only.
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Typical Characteristics
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Block Diagram
MIC2159 Block Diagram
Functional Description
The MIC2159 is a voltage mode, synchronous stepdown switching regulator controller designed for high
power. Current limit is implemented without the use of an
external sense resistor. It includes an internal soft-start
function which reduces the power supply input surge
current at start-up by controlling the output voltage rise
time, a PWM generator, a reference voltage, two
MOSFET drivers, and short-circuit current limiting
circuitry to form a complete 400kHz switching regulator.
the triangle crosses the output waveform of the error
amplifier. To illustrate the control loop, assume the
output voltage drops due to sudden load turn-on, this
would cause the inverting input of the error amplifier,
which is the divided down version of VOUT, to be slightly
less than the reference voltage, causing the output
voltage of the error amplifier to go high. This will cause
the PWM comparator to increase tON time of the top side
MOSFET, causing the output voltage to go up and
bringing VOUT back in regulation. If this sudden load
transient was large enough to cause a 3% change in
output voltage, then the output of the Hysteretic
comparator will bypass the PWM comparator and drive
the LSD and HSD outputs at full Duty cycle in order to
recover the nominal output voltage in the fastest manner
possible whilst fixed frequency PWM switching is
maintained during normal loading.
Theory of Operation
The MIC2159 is a voltage mode step-down regulator.
The figure above illustrates the block diagram for the
voltage control loop. The output voltage variation due to
load or line changes will be sensed by the inverting input
of the transconductance error amplifier via the feedback
resistors R3, and R2 and compared to a reference
voltage at the non-inverting input. This will cause a
small change in the DC voltage level at the output of the
error amplifier which is the input to the PWM
comparator. The other input to the comparator is a 1v
triangular waveform. The comparator generates a
rectangular waveform whose width tON is equal to the
time from the start of the clock cycle t0 until t1, the time
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Soft-Start
The COMP/EN pin on the MIC2159 is used for the
following three functions:
1. Disables the part by grounding this pin.
2. External compensation to stabilize the voltage
control loop.
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3. Soft-start.
For better understanding of the soft-start feature,
assume VIN = 12V and the MIC2159 is allowed to
power-up by un-grounding the COMP/EN pin. The
COMP pin has an internal 8.5µA current source that
charges the external compensation capacitor. As soon
as this voltage rises to 180mV (t = Cap_COMP ×
0.18V/8.5µA), the MIC2159 allows the internal VDD
linear regulator to power up and as soon as it crosses
the under-voltage lockout of 2.6V, the chip’s internal
oscillator starts switching. At this point in time, the
COMP pin current source increases to 40µA and an
internal 12-bit counter starts counting, which takes
approximately 2ms to complete. During counting, the
COMP voltage is clamped at 0.65V. After this counting
cycle the COMP current source is reduced to 8.5µA and
the COMP pin voltage rises from 0.65V to 0.95V, the
bottom edge of the saw-tooth oscillator. This is the
beginning of 0% duty cycle and it increases slowly
causing the output voltage to rise slowly. The MIC2159
has two hysteretic comparators that are enabled when
VOUT is outside ±3% of steady state. When the output
voltage reaches 97% of programmed output voltage then
the gm error amplifier is enabled along with the
hysteretic comparator. From this point onwards, the
voltage control loop (gm error amplifier) is fully in control
and will regulate the output voltage. Soft-start time can
be calculated approximately by adding the following four
time frames:
a hard short. The circuit in Figure 1 illustrates the
MIC2159 current limiting circuit.
Figure 1. MIC2159 Current Limiting Circuit
The current limiting resistor RCS is calculated by the
following equation:
R CS =
Equation (1)
1
⋅ IRIPPLE
2
Where:
IRIPPLE = VOUT ⋅
VIN − VOUT
VIN ⋅ FSWITCHING ⋅ L
FSWITCHING = 400kHz
200µA is the internal sink current to program the
MIC2159 current limit.
The MOSFET RDS(ON) varies 30% to 40% with
temperature; therefore, it is recommended to add a 50%
margin to the load current (ILOAD) in the above equation
to avoid false current limiting due to increased MOSFET
junction temperature rise. It is also recommended to
connect RCS resistor directly to the drain of the top
MOSFET Q1, and the RSW resistor to the source of Q1
to accurately sense the MOSFETs RDS(ON). To make the
MIC2159 insensitive to board layout and noise
generated by the switch node, a 1.4Ω resistor and a
1000pF capacitor is recommended between the switch
node and GND. A 0.1µF capacitor in parallel with RCS
should be connected to filter some of the switching
noise.
VOUT ⋅ 0.5 ⋅ Cap_COMP
VIN ⋅ 8.5µ.
Soft-Start Time(Cap_COMP=100nF) = t1 + t2 +
t3 + t4 = 2.1ms + 2ms + 3.5ms + 1.8ms =
10ms
Current Limit
The MIC2159 uses the RDS(ON) of the top power
MOSFET to measure output current. Since it uses the
drain to source resistance of the power MOSFET, it is
not very accurate. This MOSFET scheme is adequate to
protect the power supply and external components
during a fault condition by cutting back the time the top
MOSFET is on if the feedback voltage is greater than
0.67V. In case of a hard short when feedback voltage is
less than 0.67V, the MIC2159 discharges the COMP
capacitor to 0.65V, resets the digital counter and
automatically shuts off the top gate drive, and the gm
error amplifier and the +/- 3% hysteretic comparators are
completely disabled and the soft-start cycles restarts.
This mode of operation is called the “hiccup mode” and
its purpose is to protect the down stream load in case of
October 2006
200µ A
IL = ILOAD +
t1 = Cap_COMP × 0.18V/8.5µA
t2 = internal counter, approx 2ms
t3 = Cap_COMP × 0.3V/8.5µA
t4 =
R DS(ON) ⋅ IL
Internal VDD Supply
The MIC2159 controller internally generates VDD for self
biasing and to provide power to the gate drives. This
VDD supply is generated through a low-dropout
regulator and generates 5V from VIN supply greater than
5V. For supply voltage less than 5V, the VDD linear
regulator is approximately 200mV in dropout. Therefore,
it is recommended to short the VDD supply to the input
supply through a 5Ω resistor for input supplies between
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switch is turned back on, CBST is recharged through D1.
The drive voltage is derived from the internal 5V VDD
bias supply. The nominal low-side gate drive voltage is
5V and the nominal high-side gate drive voltage is
approximately 4.5V due the voltage drop across D1. An
approximate 50ns delay between the low-side(off) to
high-side(on) driver transitions is used to prevent current
from simultaneously flowing unimpeded through both
MOSFETs (shoot-through). Adaptive gate drive is
implemented on the high-side(off) to low-side(on) driver
transition to reduce losses in the flywheel diode and to
prevent shoot-through. This is operated by detecting the
VSW pin; once this pin is detected to reach 1.5v, the
high-side MOSFET can be assumed to be off and the
low side driver is enabled.
2.9V to 5V.
MOSFET Gate Drive
The MIC2159 high-side drive circuit is designed to
switch an N-Channel MOSFET. The Functional Block
Diagram shows a bootstrap circuit, consisting of D1 and
CBST. This circuit supplies energy to the high-side drive
circuit. Capacitor CBST circuit is charged while the lowside MOSFET is on and the voltage on the VSW pin is
approximately 0V. When the high-side MOSFET driver is
turned on, energy from CBST is used to turn the MOSFET
on. As the MOSFET turns on, the voltage on the VSW
pin increases to approximately VIN. Diode D1 is
reversed biased and CBST floats high while continuing to
keep the high-side MOSFET on. When the low-side
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QG. Lower numbers translate into higher efficiency. Low
gate-charge logic-level MOSFETs are a good choice for
use with the MIC2159.
Parameters that are important to MOSFET switch
selection are:
Application information
MOSFET Selection
The MIC2159 controller works from input voltages of 3V
to 14.5V and has an internal 5V regulator to provide
power to turn the external N-Channel power MOSFETs
for high- and low-side switches. For applications where
VIN < 5V, the internal VDD regulator operates in dropout
mode, and it is necessary that the power MOSFETs
used are sub-logic level and are in full conduction mode
for VGS of 2.5V. For applications when VIN > 5V; logiclevel MOSFETs, whose operation is specified at VGS =
4.5V must be used. For the lower (<5v) applications, the
VDD supply can be connected directly to Vin to help
increase the driver voltage to the MOSFET.
It is important to note the on-resistance of a MOSFET
increases with increasing temperature. A 75°C rise in
junction temperature will increase the channel resistance
of the MOSFET by 50% to 75% of the resistance
specified at 25°C. This change in resistance must be
accounted for when calculating MOSFET power
dissipation and in calculating the value of current-sense
(CS) resistor. Total gate charge is the charge required to
turn the MOSFET on and off under specified operating
conditions (VDS and VGS). The gate charge is supplied by
the MIC2159 gate-drive circuit. At 400kHz switching
frequency and above, the gate charge can be a
significant source of power dissipation in the MIC2159.
At low output load, this power dissipation is noticeable
as a reduction in efficiency. The average current
required to drive the high-side MOSFET is:
IG[high-side](avg)=QG x FS
Where:
IG[high-side](avg)=Average high-side MOSFET gate
current
QG = total gate charge for the high-side MOSFET
taken from manufacturer’s data sheet for VGS =
5V.
FS = Switching Frequency (400kHz)
The low-side MOSFET is turned on and off at VDS = 0
because the freewheeling diode is conducting during this
time. The switching loss for the low-side MOSFET is
usually negligible. Also, the gate-drive current for the
low-side MOSFET is more accurately calculated using
CISS at VDS = 0 instead of gate charge.
For the low-side MOSFET:
IG[low-side](avg) = CISS × VGS x FS
Since the current from the gate drive comes from the
input voltage, the power dissipated in the MIC2159 due
to gate drive is:
PGATEDRIVE = VIN.(IG[high-sde](avg) + IG[low-side](avg))
A convenient figure of merit for switching MOSFETs is
the on resistance times the total gate charge RDS(ON) ×
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•
Voltage rating
•
On-resistance
• Total gate charge
The voltage ratings for the top and bottom MOSFET are
essentially equal to the input voltage. A safety factor of
20% should be added to the VDS(max) of the MOSFETs
to account for voltage spikes due to circuit parasitic
elements.
The power dissipated in the switching transistor is the
sum of the conduction losses during the on-time
(PCONDUCTION) and the switching losses that occur during
the period of time when the MOSFETs turn on and off
(PAC).
PSW = PCONDUCTION + PAC
Where:
PCONDUCTION = ISW (RMS )2 ⋅ RSW
PAC = PAC(off ) + PAC(on )
RSW = on-resistance of the MOSFET switch
V
D = duty _ cyle = OUT
VIN
Making the assumption the turn-on and turn-off transition
times are equal; the transition times can be
approximated by:
C
⋅V ⋅ C
⋅V
tT = ISS GS OSS IN
IG
where:
CISS and COSS are measured at VDS = 0
IG = gate-drive current (1.4A for the MIC2159)
The total high-side MOSFET switching loss is:
PAC = (VIN + VD ) ⋅ I PK ⋅ tT ⋅ FS
Where:
tT = Switching transition time (~20ns)
VD = Freewheeling diode drop (0.5v)
FS = Switching Frequency (400kHz)
The low-side MOSFET switching losses are negligible
and can be ignored for these calculations.
Inductor Selection
Values for inductance, peak, and RMS currents are
required to select the output inductor. The input and
output voltages and the inductance value determine the
peak-to-peak inductor ripple current. Generally, higher
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calculated by the equation below:
inductance values are used with higher input voltages.
Larger peak-to-peak ripple currents will increase the
power dissipation in the inductor and MOSFETs. Larger
output ripple currents will also require more output
capacitance to smooth out the larger ripple current.
Smaller peak-to-peak ripple currents require a larger
inductance value and therefore a larger and more
expensive inductor. A good compromise between size,
loss and cost is to set the inductor ripple current to be
equal to 20% of the maximum output current. The
inductance value is calculated by the equation below.
(
PINDUCTORCu = IINDUCTOR ( rms )2.RWINDING
The resistance of the copper wire, RWINDING,
increases with temperature. The value of the winding
resistance used should be at the operating temperature.
(
)
T20oC = ambient temperature
VOUT ⋅ VIN (max) − VOUT
L=
VIN (max) ⋅ FS ⋅ 0.2 ⋅ IOUT (max)
RWINDING(20oC) = room temperature winding
resistance (usually specified by manufacturer)
where:
Output Capacitor Selection
The output capacitor values are usually determined by
the capacitors ESR (equivalent series resistance).
Voltage and RMS current capability are two other
important factors for selecting the output capacitor.
Recommended capacitors are tantalum, low-ESR
aluminium electrolytic, and POSCAPS. The output
capacitor’s ESR is usually the main cause of output
ripple. The output capacitor ESR also affects the overall
voltage feedback loop from a stability point of view. See
“Feedback Loop Compensation” section for more
information. The maximum value of ESR is calculated:
FS = switching frequency, 400 kHz
0.2 = ratio of AC ripple current to DC output
current
VIN(max) = maximum input voltage
The peak-to-peak inductor current (AC ripple
current) is:
IPP =
VOUT .(VIN (max) − VOUT )
VIN (max).FS .L
The peak inductor current is equal to the average output
current plus one half of the peak-to-peak inductor ripple
current.
RESR ≤
IPP = peak-to-peak inductor ripple current
The total output ripple is a combination of the
ESR and output capacitance. The total ripple
is calculated below:
2
2
Maximizing efficiency requires the proper selection of
core material and minimizing the winding resistance. The
high frequency operation of the MIC2159 requires the
use of ferrite materials for all but the most cost sensitive
applications.
Lower cost iron powder cores may be used but the
increase in core loss will reduce the efficiency of the
power supply. This is especially noticeable at low output
power. The winding resistance decreases efficiency at
the higher output current levels. The winding resistance
must be minimized although this usually comes at the
expense of a larger inductor. The power dissipated in the
inductor is equal to the sum of the core and copper
losses. At higher output loads, the core losses are
usually insignificant and can be ignored. At lower output
currents, the core losses can be a significant contributor.
Core loss information is usually available from the
magnetics vendor. Copper loss in the inductor is
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∆VOUT
IPP
Where:
VOUT = peak-to-peak output voltage ripple
IPK = IOUT(max)+0.5 x IPP
The RMS inductor current is used to calculate the I2R
losses in the inductor.
⎞
1 ⎛
IPK
⎟
IINDUCTOR = IOUT (max) ⋅ 1 + ⋅ ⎜
⎜
3 ⎝ IOUT (max) ⎟⎠
(
RWINDING( hot ) = RWINDING( 20 o C ) ⋅ 1 + 0.0042 ⋅ THOT − T20 o C
Where:
THOT = temperature of wire under full load
∆VOUT
⎛I
⋅ (1 − D ) ⎞
⎟ + (I PP ⋅ R ESR )2
= ⎜⎜ PP
⎟
⎝ COUT ⋅ FS ⎠
Where:
D = duty cycle
COUT = output capacitance value
fS = switching frequency
The voltage rating of the capacitor should be
twice the voltage for a tantalum and 20%
greater for aluminium electrolytic. The output
capacitor RMS current is calculated below:
I
ICOUT ( rms ) = PP
12
The power dissipated in the output capacitor is:
PDISS (COUT ) = ICOUT ( rms )2 ⋅ RESR (COUT )
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Note that ∆Vout should be kept within the +/- 3% of
nominal limits to prevent the loop switching between
hysteretic and voltage mode control.
R2 =
External Schottky Diode
An external freewheeling diode is used to keep the
inductor current flow continuous while both MOSFETs
are turned off. This dead time prevents current from
flowing unimpeded through both MOSFETs and is
typically ~50ns. The diode conducts twice during each
switching cycle. Although the average current through
this diode is small, the diode must be able to handle the
peak current.
Input Capacitor Selection
The input capacitor should be selected for ripple current
rating and voltage rating. Tantalum input capacitors may
fail when subjected to high inrush currents, caused by
turning the input supply on. A tantalum input capacitor’s
voltage rating should be at least 2 times the maximum
input voltage to maximize reliability. Aluminium
electrolytic, OS-CON, and multilayer polymer film
capacitors can handle the higher inrush currents without
voltage de-rating. The input voltage ripple will primarily
depend on the input capacitor’s ESR. The peak input
current is equal to the peak inductor current, so:
ID(avg) = IOUT ⋅ 2 ⋅ 50ns ⋅ FS
The reverse voltage requirement of the diode is:
VDIODE(rrm) = VIN
The power dissipated by the Schottky diode is:
∆VIN = IINDUCTOR( peak ) ⋅ RESR(CIN )
The input capacitor must be rated for the input current
ripple. The RMS value of input capacitor current is
determined at the maximum output current. Assuming
the peak-to-peak inductor ripple current is low:
PDIODE = ID(avg) x VF
Where:
VF = forward voltage at the peak diode current
The external Schottky diode, D1, is not necessary for
circuit operation since the low-side MOSFET contains a
parasitic body diode. The external diode will improve
efficiency and decrease high frequency noise. If the
MOSFET body diode is used, it must be rated to handle
the peak and average current. The body diode has a
relatively slow reverse recovery time and a relatively
high forward voltage drop. The power lost in the diode is
proportional to the forward voltage drop of the diode. As
the high-side MOSFET starts to turn on, the body diode
becomes a short circuit for the reverse recovery period,
dissipating additional power. The diode recovery and the
circuit inductance will cause ringing during the high-side
MOSFET turn-on. An external Schottky diode conducts
at a lower forward voltage preventing the body diode in
the MOSFET from turning on. The lower forward voltage
drop dissipates less power than the body diode. The lack
of a reverse recovery mechanism in a Schottky diode
causes less ringing and less power loss. Depending on
the circuit components and operating conditions, an
external Schottky diode will give a 1/2% to 1%
improvement in efficiency.
I CIN ( rms ) ≈ IOUT (max) ⋅ D ⋅ (1 − D )
The power dissipated in the input capacitor is:
PDISS (CIN ) = ICIN ( rms )2.RESR (CIN )
Voltage Setting Components
The MIC2159 requires two resistors to set the output
voltage as shown in Figure 2.
Figure 2. Voltage-Divider Configuration
The output voltage is determined by the equation:
Feedback Loop Compensation
The MIC2159 controller comes with an internal
transconductance error amplifier used for compensating
the voltage feedback loop by placing a capacitor (C1) in
series with a resistor (R1) and another capacitor C2 in
parallel from the COMP pin to ground. See “MIC2159
Block Diagram.”
R1 ⎞
⎛
VO = VREF ⋅ ⎜1 +
⎟
R
2⎠
⎝
A typical value of R1 can be between 3kΩ and 10kΩ. If
R1 is too large, it may allow noise to be introduced into
the voltage feedback loop. If R1 is too small, in value, it
will decrease the efficiency of the power supply,
especially at light loads. Once R1 is selected, R2 can be
calculated using:
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VREF ⋅ R1
VO − VREF
Power Stage
The power stage of a voltage mode controller has an
inductor, L1, with its winding resistance (DCR)
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connected to the output capacitor, COUT, with its
electrical series resistance (ESR) as shown in Figure 3.
The transfer function G(s), for such a system is:
gain curve that the output inductor and capacitor create
a two pole system with a break frequency at:
fLC =
1
2⋅π ⋅ L ⋅ COUT
Therefore, fLC = 3.6kHz
By looking at the phase curve, it can be seen that the
output capacitor ESR (0.050Ω) cancels one of the two
system poles (LCOUT) by introducing a zero at:
fZERO=
Figure 3. The Output LC Filter in a voltage Mode Buck
Converter
G(s)=
1
2 ⋅ π ⋅ ESR⋅ COUT
Therefore, FZERO = 6.36kHz.
From the point of view of compensating the voltage loop,
it is recommended to use higher ESR output capacitors
since they provide a 90° phase gain in the power path.
For comparison purposes, Figure 6, shows the same
phase curve with an ESR value of 0.002Ω.
1+ ESR⋅ s ⋅ COUT
s(DCR⋅ COUT+ ESR⋅ COUT) + s2(L ⋅ COUT) + 1
Plotting this transfer function with the following assumed
values (L=2 µH, DCR=0.009Ω, COUT=1000µF,
ESR=0.050Ω) gives lot of insight as to why one needs to
compensate the loop by adding resistor and capacitors
on the COMP pin. Figures 4 and 5 show the gain curve
and phase curve for the above transfer function.
Figure 6. The Phase Curve with ESR = 0.002Ω
It can be seen from Figure 5 that at 50 kHz, the phase is
approximately –90° versus Figure 6 where the number is
–150°. This means that the transconductance error
amplifier has to provide a phase boost of about 45° to
achieve a closed loop phase margin of 45° at a
crossover frequency of 50kHz for Figure 4, versus 105°
for Figure 6. The simple R1,C1 and C2 compensation
scheme allows a maximum error amplifier phase boost
of about 90°. Therefore, it is easier to stabilize the
MIC2169A voltage control loop by using high ESR value
output capacitors.
Figure 4. The Gain Curve for G(s)
gm Error Amplifier
It is undesirable to have high error amplifier gain at high
frequencies because high frequency noise spikes would
be picked up and transmitted at large amplitude to the
output, thus, gain should be permitted to fall off at high
frequencies. At low frequency, it is desired to have high
open-loop gain to attenuate the power line ripple. Thus,
the error amplifier gain should be allowed to increase
rapidly at low frequencies.
Figure 5. Phase Curve for G(s)
It can be seen from the transfer function G(s) and the
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The transfer function with R1, C1, and C2 for the internal
gm error amplifier can be approximated by the following
equation:
⎤
⎡
⎥
⎢
+
⋅
⋅
1
R
1
S
C
1
⎥
Error _ Amplifier(z) = gm ⋅ ⎢
⎢
C1⋅ C2 ⋅ S ⎞ ⎥
⎛
⎟⎥
⎢ S ⋅ (C1+ C2) ⋅ ⎜1+ R1⋅
C1+ C2 ⎠ ⎦
⎝
⎣
The above equation can be simplified by assuming
C2<<C1,
⎡
⎤
1 + R1 ⋅ S ⋅ C1
Error _ Amplifier ( z ) = gm ⋅ ⎢
⎥
⎣ S ⋅ ( C1) ⋅ (1 + R1 ⋅ C 2 ⋅ S ) ⎦
Figure 8. Error Amplifier Phase Curve
From the above transfer function, one can see that R1
and C1 introduce a zero and R1 and C2 a pole at the
following frequencies:
Total Open-Loop Response
The open-loop response for the MIC2159 controller is
easily obtained by adding the power path and the error
amplifier gains together, since they already are in Log
scale. It is desirable to have the gain curve intersect zero
dB at tens of kilohertz, this is commonly called crossover
frequency; the phase margin at crossover frequency
should be at least 45°. Phase margins of 30° or less
cause the power supply to have substantial ringing when
subjected to transients, and have little tolerance for
component or environmental variations.
Figures 9 and 10 show the open-loop gain and phase
margin and it can be seen from Figure 9 that the gain
curve intersects the 0dB at approximately 50kHz, and
from Figure 10 that at 50kHz, the phase shows
approximately 50° of margin.
Fzero= 1/2 π × R1 × C1
Fpole = 1/2 π × C2 × R1
[email protected] = 1/2 π × C1
Figures 7 and 8 show the gain and phase curves for the
above transfer function with R1 = 9.3k, C1 = 1000pF, C2
= 100pF, and gm = .005Ω–1. It can be seen that at 50
kHz, the error amplifier exhibits approximately 45° of
phase margin.
Figure 7. Error Amplifier Gain Curve
Figure 9. Open-Loop Gain Margin
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Figure 10. Open-Loop Phase Margin
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bottom MOSFET gate drives. If necessary, gate resistors
of 5Ω or less should be used.
7. Low gate charge MOSFETs should be used to
maximize efficiency.
8. Compensation component GND, feedback resistor
ground, chip ground should all run together and connect
to the output capacitor ground. See demo board layout,
bottom layer.
9. The 10µF ceramic capacitor should be placed
between the drain of the top MOSFET and the source of
the bottom MOSFET.
10. The 10µF ceramic capacitor should be placed right
on the VDD pin without any vias.
11. The source of the bottom MOSFET should connect
directly to the input capacitor GND with a thick trace.
The output capacitor and the input capacitor should
connect directly to the GND plane.
12. Place a 0.01µF to 0.1µF Ceramic capacitor in
parallel with the CS resistor to filter any switching noise.
Design Example
Layout and Checklist:
1. Connect the current limiting resistor directly to the
drain of top MOSFET.
2. Use a resistor from the input supply to the VIN pin on
the MIC2159. Also, place a 1µF ceramic
Capacitor from this pin to GND, preferably not thru a via.
3. The feedback resistors should be placed close to the
FB pin. The top side of the resistor should connect
directly to the output node. Run this trace away from the
switch node. The bottom side of the lower resistor
should connect to the GND pin on the MIC2159.
4. The compensation resistor and capacitors should be
placed right next to the COMP pin and the other side
should connect directly to the GND pin on the MIC2159
rather than going to the plane.
5. Add a 1.4Ω resistor and a 1000pF capacitor from the
switch node to ground pin. See page 7, Current Limiting
section for more detail.
6. Add place holders for gate resistors on the top and
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Package Drawing
10-Lead e-PAD MSOP (MME)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http:/www.micrel.com
The information furnished by Micrel in this data sheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its
use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2004 Micrel, Incorporated.
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Revision History
Date
6/15/06
October 2006
Revision
1.0
1.1
Edits by:
M. Mclean
Description of Change
Initial Spec
Coversion to Micrel Format
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