NCP112 Supervisory IC for Desktop Power Supply Monitoring The NCP112 is a highly integrated supervisory circuit that incorporates all the functions necessary for monitoring and controlling a multi−output switch−mode power supply system. The NCP112 provides an ability to monitor the status of the power supply outputs and communicate it to the system controller. The programmable output delays protect against spurious fault indicators. http://onsemi.com MARKING DIAGRAMS 14 Features 1 • Under and Overvoltage Protection for 3.3 V, 5.0 V and 12 V • • • • • • • • • • Outputs Additional Adjustable Overvoltage Protection Input Built−in Hysteresis on all Input Pins Programmable Undervoltage Blanking During Power−Up Fault Output with 20 mA Sink Capability Programmable Remote On/Off Delay Time Programmable Power Good Delay Time Precision Voltage Reference with 20 mA Source Capability Optimized for Low−Cost 100 nF Capacitors Enhanced Replacement to the TSM112 Pb−Free Packages are Available Typical Applications • Personal Computer Switch Mode Power Supply Monitoring • Multi−Output Power Supplies Requiring System Supervision SOIC−14 D SUFFIX CASE 751A NCP112DG AWLYWW 1 PDIP−14 P SUFFIX CASE 646 1 14 NCP112P AWLYYWWG 1 A WL Y, YY WW G = Assembly Location = Wafer Lot = Year = Work Week = Pb−Free Package PIN CONNECTIONS VS33 VS5 VCC FAULT VS12 PGO ADJ CTPG PGI CTREMOTE CTUV GND REMOTE VREF PDIP−14, SOIC−14 ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet. © Semiconductor Components Industries, LLC, 2006 October, 2006 − Rev. 3 1 Publication Order Number: NCP112/D NCP112 PIN FUNCTION DESCRIPTION Pin No. Symbol Function Description 1 VS33 3.3 V SENSE INPUT Over/undervoltage sense input for 3.3 V. 2 VS5 5.0 V SENSE INPUT Over/undervoltage sense input for 5.0 V. 3 VS12 12 V SENSE INPUT Over/undervoltage sense input for 12 V. 4 ADJ ADJUSTABLE OVP INPUT 5 PGI POWER GOOD INPUT 6 CTUV ADJUSTABLE TIMING CAPACITOR 7 GND GROUND 8 VREF VOLTAGE REFERENCE Precision 2.5 V reference output. 9 REMOTE REMOTE ON/OFF INPUT Input remote control from the microcontroller. Acts as a reset signal after a fault condition. 10 CTREMOTE ADJUSTABLE REMOTE ON/OFF CAPACITOR 11 CTPG ADJUSTABLE POWER GOOD CAPACITOR 12 PGO POWER GOOD OUTPUT 13 FAULT FAULT OUTPUT 14 VCC POWER SUPPLY VOLTAGE May be used for an additional overvoltage protection signal. Power good input signal. Adjustable undervoltage blanking delay during power−up. Ground Adjustable remote delay. Adjustable power good delay. Power good output. Active high when no fault conditions are present. Detects over/undervoltage conditions. Active high during a fault condition. Power supply voltage. http://onsemi.com 2 NCP112 VCC 14 VREF VS33 VS5 VS12 1 VCC 2 OV Fault Delay OV Detector 3 13 S SET FAULT Q R CLR Q Remote On/Off Delay UV Detector 10 CTREMOTE 3.4 V VREF 8 2.5 V Reference 1.28 V ADJ + − 9 + − REMOTE 1.28 V UV Blanking Delay at Power Up − + 4 1.28 V 5 PGI VCC GND 7 12 Power Good Delay 6 CTUV 11 CTPG Figure 1. Block Diagram http://onsemi.com 3 PGO NCP112 MAXIMUM RATINGS Rating Symbol Value Unit Power Supply Voltage (Note 1) VCC 18 V Power Good Output Current IPGO 30 mA IFAULT 30 mA IREF 20 mA ADJ, PGI, CTUV, REMOTE, CTREMOTE, CTPG VCC V PGO, FAULT 18 V Power Dissipation and Thermal Characteristics (PDIP−14) Thermal Resistance, Junction−to−Air Thermal Resistance, Junction−to−Case Maximum Power Dissipation @ 25°C RqJA RqJC PD 100 45 1.25 °C/W °C/W W Power Dissipation and Thermal Characteristics (SOIC−14) Thermal Resistance, Junction−to−Air Thermal Resistance, Junction−to−Case Maximum Power Dissipation @ 25°C RqJA RqJC PD 125 30 1.0 °C/W °C/W W Operating Junction Temperature TJ +150 °C Operating Ambient Temperature TA −40 to +125 °C Tstg −55 to +150 °C Fault Output Current Voltage Reference Output Current Voltage Rating (Pins 4, 5, 6, 9, 10, 11) Voltage Rating (Pins 12, 13) Storage Temperature Range ELECTRICAL CHARACTERISTICS (VCC = 5.0 V, TA = 25°C for typical values and TA = 0°C to 85°C for min and max values, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit DC Power Supply VCC 4.5 − 16 V Power Supply Current ICC − 3.0 5.0 mA 3.3 V Output Sense Hysteresis* VOV33 VOVhys33 3.8 − 4.0 40 4.2 − V mV 5.0 V Output Sense Hysteresis* VOV5 VOVhys5 5.8 − 6.1 60 6.4 − V mV 12 V Output Sense Hysteresis* VOV12 VOVhys12 13.4 − 14.2 130 15 − V mV 3.3 V Output Sense Hysteresis* VUV33 VUVhys33 2.3 − 2.5 100 2.7 − V mV 5.0 V Output Sense Hysteresis* VUV5 VUVhys5 3.7 − 4.0 100 4.3 − V mV 12 V Output Sense Hysteresis* VUV12 VUVhys12 9.2 − 10 100 10.8 − V mV OPERATING CONDITIONS OVERVOLTAGE/UNDERVOLTAGE PROTECTION Overvoltage Protection Undervoltage Protection *Hysteresis is measured in direction from threshold point back to nominal value of input voltage (i.e. 3.3 V, 5.0 V or 12 V). 1. This device contains ESD protection and exceeds the following tests: Human Body Model JESD 22−A114−B: 2.0 kV Machine Model JESD 22−A115−A: 200 V http://onsemi.com 4 NCP112 ELECTRICAL CHARACTERISTICS (continued) (VCC = 5.0 V, TA = 25°C for typical values and TA = 0°C to 85°C for min and max values, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit VADJth VADJth − − 1.28 100 − − V mV TUV 100 300 500 ms TUVth − 2.5 − V VPGIth VPGIhys − − 1.28 25 − − V mV Low State Open Collector Saturation Voltage (I = 20 mA) VLsat − − 0.4 V High State Open Collector Leakage Current (V = 5.0 V) IHleak − − 1.0 mA TPGraise TPGfall − − 1.0 1.0 − − Adjustable Delay Time (CTPG = 100 nF) TPG 100 300 500 ms Power Good Threshold Voltage (Pin 11) TPGth − 2.5 − V IFAULT 20 − − mA Fault Saturation Voltage (I = 20 mA) VFAULTsat − − 0.4 V Fault Leakage Current (V = 5.0 V) IFAULTleak − − 1.0 mA Fault Delay Time Before Latching TFAULT − 100 − ms VRth VRhys − − 1.28 25 − − V mV Remote Pin Internal Pull−Up Voltage VRh 3.3 3.4 3.6 V Remote Low State Saturation Current IRl − − 0.5 mA Remote Time Delay (CTREMOTE = 100 nF) Remote On Remote Off TREMon TREMoff 35 35 45 45 60 60 Remote Delay Threshold Voltage (Pin 10) Low Level High Level TREMth lo TREMth hi − − 0.2 2.3 − − VREF VREF 2.46 2.42 2.50 2.50 2.54 2.58 VREFline VREFline − − 4.0 15 10 − VREFload − 25 − OVERVOLTAGE/UNDERVOLTAGE PROTECTION (continued) Undervoltage Protection (continued) Adjustable Overvoltage Protection Threshold Hysteresis UNDERVOLTAGE BLANKING DURING POWER UP Undervoltage Blanking Time (CTUV = 100 nF) Undervoltage Blanking Threshold Voltage (Pin 6) POWER GOOD Power Good Input Threshold Voltage Power Good Input Hysteresis Power Good Transient (See Application Note Section) Rise Time Fall Time ms FAULT Fault Sink Current REMOTE CONTROL Remote Input Voltage Threshold Remote Hysteresis ms V VOLTAGE REFERENCE Internal Voltage Reference (IO = 1.0 mA) @ 25°C Internal Voltage Reference (IO = 1.0 mA) 0°C to 85°C Line Regulation (4.5 V < VCC < 16 V) Iout = 0 mA Iout = 10 mA V mV Load Regulation (VCC = 5.0 V) 0 mA < Iout < 10 mA http://onsemi.com 5 mV NCP112 VCC REMOTE FAULT PGI PGO OVP UVP 3.3 V, 5 V, 12 V Tpg Tremote (ON) Tremote (OFF) Tfault (OV) Figure 2. Timing Diagram Table 1. FUNCTION TABLE PGI REMOTE ADJ Undervoltage Overvoltage FAULT PGO <1.28 V (L) L <1.28 V (L) No No H L <1.28 V (L) L <1.28 V (L) No Yes H L <1.28 V (L) L <1.28 V (L) Yes No H L <1.28 V (L) L >1.28 V (H) No No L L <1.28 V (L) L >1.28 V (H) No Yes H L <1.28 V (L) L >1.28 V (H) Yes No H L >1.28 V (H) L <1.28 V (L) No No H L >1.28 V (H) L <1.28 V (L) No Yes H L >1.28 V (H) L <1.28 V (L) Yes No H L >1.28 V (H) L >1.28 V (H) No No L H >1.28 V (H) L >1.28 V (H) No Yes H L >1.28 V (H) L >1.28 V (H) Yes No H L X H X X X H L 2. X = > Don’t care. 3. FAULT = L means main PWM is Enable. 4. PGO = H means power supply is working within ATX specifications. http://onsemi.com 6 NCP112 X 12 V PRIMARY RECTIFIER 12 V MAIN CONVERTER 5V 5V 3.3 V 3.3 V PWM + OPTO + Vref VCC AUXILIARY CONVERTER 5 V STBY 5 V STBY PWM + OPTO + Vref NCP112 FAULT − Over and Undervoltage Protection − Reference − Logic − Sequencer Figure 3. Simplified Application Schematic http://onsemi.com 7 PG REM NCP112 PIN FUNCTION DESCRIPTION Main Line Sensing − VS33, VS5 and VS12 internal current sources for charging and/or discharging capacitors. These pins are used to monitor the main power outputs. The internal circuitry of the NCP112 provides over and undervoltage detection and indicates an error state. The over and undervoltage levels meet the ATX specification. In order to avoid unexpected oscillation of the device, the NCP112 features both over and undervoltage hysteresis. The overvoltage detection circuitry incorporates a fault delay, which helps to filter short positive voltage spikes below 100 ms. To avoid triggering a false undervoltage signal during power−up, a timing capacitor (CTUV) may be used to introduce a user defined blanking delay. Remote Control – REMOTE A reset signal can be realized with the REMOTE pin. When the Remote pin is in the active low state, the external link (the Fault signal) between the NCP112 and the Pulse Width Modulator (PWM) generator of the external power supply is enabled (Figure 3). In order to effectively reset the latch, a minimum width remote pulse should be applied. The width of this pulse should be greater than TREM, which is determined by adding an external capacitor (CTREMOTE). Note that the REMOTE pin is internally pulled up to 3.4 V. Additional Overvoltage Protection – ADJ This pin can be used as another user−defined monitoring input and has a hysteresis feature similar to VS33, VS5 and VS12. When the input voltage is below the threshold level of 1.28 V, a fault condition is asserted. Note that the ADJ pin is logically ORed with the overvoltage detector output, thus there is a 100 ms fault delay. Power Good Output – PGO The purpose of the PGO function is to warn the motherboard that the voltage of at least one of the three main power lines is out of range, independent of the ADJ input. Please refer to Table 1 for a functional Truth table. The PGO is subject to a delay TPG, which can be adjusted with an external capacitor (CTPG). The Power Good Output pin is capable of sinking 20 mA of current. Power Good Input – PGI The Power Good Input (PGI) can be used to monitor an additional logic event, for example, the temperature inside an ATX power supply unit. When the input voltage at the PGI input is below the threshold level of 1.28 V, the Power Good Output (PGO) signal remains in a low state, even if all three sense inputs are within voltage limits. The PGI signal, along with the REMOTE, and the over and undervoltage singles encounter a power good delay circuit as depicted in Figure 1. Fault Output – FAULT In a typical application such as Figure 3, the fault pin (FAULT), is activated when any one of the three main power lines (3.3 V, 5.0 V, 12 V) is out of range or the ADJ pin is below 1.28 V. This is independent of the PGI input. The Fault output is the external link between the NCP112 and the primary PWM. In the event of a short circuit condition, the overvoltage circuitry provides an additional delay time TFAULT which provides adequate protection. Timing Capacitors – CTUV, CTREMOTE, CTPG The NCP112 timing circuitry is optimized for utilizing low cost, 100 nF ceramic capacitors. The time delays of CTUV, CTREMOTE, and CTPG can be adjusted by simply changing external capacitor values. The time delay is a linear function of the capacitance because the NCP112 uses Voltage Reference – VREF The VREF is a 2.5V precision reference output, with current sourcing capability of 20 mA. No bypass capacitor or minimum output current is required to maintain stability. ORDERING INFORMATION Device Package NCP112P PDIP−14 NCP112PG PDIP−14 (Pb−Free) NCP112D SOIC−14 NCP112DG SOIC−14 (Pb−Free) NCP112DR2 SOIC−14 NCP112DR2G SOIC−14 (Pb−Free) Shipping† 25 Units / Rail 55 Units / Rail 2500 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 8 NCP112 PACKAGE DIMENSIONS PDIP−14 CASE 646−06 ISSUE P 14 8 1 7 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. B A F L N C −T− SEATING PLANE H G D 14 PL J K 0.13 (0.005) M M http://onsemi.com 9 DIM A B C D F G H J K L M N INCHES MIN MAX 0.715 0.770 0.240 0.260 0.145 0.185 0.015 0.021 0.040 0.070 0.100 BSC 0.052 0.095 0.008 0.015 0.115 0.135 0.290 0.310 −−− 10 _ 0.015 0.039 MILLIMETERS MIN MAX 18.16 19.56 6.10 6.60 3.69 4.69 0.38 0.53 1.02 1.78 2.54 BSC 1.32 2.41 0.20 0.38 2.92 3.43 7.37 7.87 −−− 10 _ 0.38 1.01 NCP112 PACKAGE DIMENSIONS SOIC−14 CASE 751A−03 ISSUE H NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− 14 8 −B− P 7 PL 0.25 (0.010) M 7 1 G −T− D 14 PL 0.25 (0.010) T B S A DIM A B C D F G J K M P R J M K M F R X 45 _ C SEATING PLANE B M S SOLDERING FOOTPRINT* MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019 7X 7.04 14X 1.52 1 14X 0.58 1.27 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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