TSM121 SINGLE CHIP PWM & HOUSEKEEPING IC FOR HALF BRIDGE SMPS ■ HOUSEKEEPING CIRCUIT : ■ Over voltage protection for 3.3V, 5V and 12V without external components ■ Additional Over voltage protection (-5V and/ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ or -12V, or Primary Over Power control) with external components Under voltage protection for 3.3V, 5V and 12V without external components Over current protection for 3.3V, 5V and 12V with internal threshold voltage Externally adjustable Inrush Current blanking during transients Externally adjustable Under voltage blanking during Power Up Power Good output Externally adjustable PG delay Remote input Externally adjustable Remote delay Internal Precision Voltage Reference (Vref1) PWM GENERATOR : Error Amplifier (easy compensation) Oscillator (adjustable frequency) PWM generation Soft Start & Dead Time Control (adjustable) Open collector outputs for indirect Pulse Transformer driving Precision Voltage Reference (Vref2) (Uncommitted with Vref1) ORDER CODE Part Number Temperature Range Package TSM121C 0 to 85°C • Marking N TSM121C N = Dual in Line Package (DIP) N DIP24 shrink (Plastic Package) PIN CONNECTIONS (top view) C1 1 24 C2 VCC 2 23 SS/DTC FB 3 22 OSC IN- 4 21 GND IN+ 5 20 VREF2 REM 6 19 TSUR TREM 7 18 TUV TPG 8 17 PI PG 9 16 EP IS12 10 15 VS12 APPLICATION IS5 11 14 VS5 ■ Primary PWM and secondary housekeeping IS33 12 13 VS33 DESCRIPTION The TSM121 integrated circuit incorporates all sensing circuit to regulate and protect from over voltage, under voltage and over current a multiple output power supply (12V, 5V, 3.3V). TSM121 incorporates all the necessary functions for proper PWM generation and pulse transformer drive to be adapted easily in the PC SMPS power supplies, and all the Housekeeping features which allow safe operation in all conditions, and very high integration. TSM121 integrates two independent Voltage References which are uncommitted to ensure safe Regulation and Protection by the same chip. in PC/Server SMPS using Half Bridge topology January 2001 1/12 TSM121 PIN DESCRIPTION Name Pin # Vcc Gnd 2 21 Type Power Supply Power Supply Function Positive Power Supply line. Ground. 0V Reference for all voltages. Housekeeping Vs12 Vs5 Vs33 Tuv EP 15 14 13 18 16 Analog input Analog input Analog input Timing capacitor Analog input Is12 Is5 Is33 PI PG Tpg REM 10 11 12 17 9 8 6 Analog input Analog input Analog input Analog input Open Collector Timing capacitor TTL input Trem Tsur 7 19 Timing capacitor Analog input Over & under voltage sense input dedicated to the 12V line Over & under voltage sense input dedicated to the 5V line Over & under voltage sense input dedicated to the 3.3V line Adjustable Under voltage blanking delay at Power Up (setting capacitor) Extra Protection (Over voltage for -5V and/or -12V line or Primary OverPower protection). If this extra Protection circuit is not used, pin EP should be connected to Vref2 Over current sense input dedicated to the 12V line Over current sense input dedicated to the 5V line Over current sense input dedicated to the 3.3V line Power Good input. This pin detects the power conditions. Power Good output. PG output is High when the power conditions are OK. Adjustable Power Good delay (setting capacitor) Input Remote control of the complete system by the motherboard (µController). Remote is active high. Switch OFF/ON of the Power Supply. Reset of the complete system after a FAULT activation. Adjustable Remote delay (setting capacitor) Inrush Current Blank (surge) setting resistor and capacitor input. Avoids that the Housekeeping protection latches on normal start up surge conditions. PWM Vref2 20 Voltage Reference IN+ INFB OSC SS/DTC 5 4 3 22 23 Opamp input Opamp input Feedback Timing capacitor Analog input C1 C2 1 24 Open Collector Open Collector 2/12 Voltage Reference for all the PWM section. Vref2 is uncommitted to Vref1 (Housekeeping section). Vref2 should be connected to a decoupling capacitor (0.1µF) Positive Input of the error amplifier Negative Input of the error amplifier Feedback input of the error amplifier Frequency setting capacitor input Soft Start. Imposes progressive increase of the switching duty cycle to avoid current inrush at power up. When SS/DTC is high, duty cycle is low. When SS/DTC is low, duty cycle is high. Dead Time Control. Limits the maximum duty cycle to a programmable level using appropriate external bridge resistor. Output Drive (to Pulse Transformer. Open Collector 1) Output Drive (to Pulse Transformer. Open Collector 2) TSM121 ABSOLUTE MAXIMUM RATINGS Symbol Vcc Iout Co Top Pd Tstg Tuv EP PI PG Tpg REM Trem Tsur IN+ INFB OSC DC Supply Voltage DC Supply voltage pin 2 1) Output current Power Good and Fault Collector Output Current Operating Free Air Temperature Range Power dissipation Storage temperature Adjustable Under voltage blanking delay at Power Up Extra Protection Power Good input Power Good output Adjustable Power Good delay Remote control Adjustable Remote delay Adjustable Inrush Current Blank (surge) Positive Input of the error amplifier Negative Input of the error amplifier Feedback input of the error amplifier Frequency setting capacitor input Value Unit 25 V 30 50 -55 to 125 1 -55 to 125 5 5 5 5 5 5 5 5 5 5 5 5 mA mA °C W °C V V V V V V V V V V V V Value Unit 1. All voltages values , except differential voltage , are with respect to network ground terminal . OPERATING CONDITIONS Symbol Vcc Co Freq Toper Parameter 1) DC Supply Voltage Collector Output Current Oscillator Frequency Operating Free Air Temperature Range 14 to 24 V up to 30 <200 0 to 85 mA kHz °C 1. The TSM121 starts working properly before 14V, but the 12V line over current protection can be reliable only when Vcc has reached a sufficient level: t(he DC supply voltage must be higher than the voltage applied on the Is12 input (12V line protection) plus 2V. For example, if 13.2V is present on the IS12 input, the minimum required value on Vcc is 15.2V. 3/12 TSM121 ELECTRICAL CHARACTERISTICS Tamb = 25°C and Vcc = 17V (unless otherwise Symbol Parameter specified) Test Condition Min Typ Max Unit 7 12 mA Total Current Consumption Icc Total Supply Current HOUSEKEEPING SECTION Voltage Reference (Vref1) Vref1 Internal Voltage Reference 2.5 V Over Current, Over Voltage and Under Voltage Protection Vcs33 Vcs5 Vcs12 Vov33 Vov5 Vov12 Vuv33 Vuv5 Vuv12 Vep Tfault Over Current Sense Threshold 3.3V Over Current Sense Threshold 5V Over Current Sense Threshold 12V Over Voltage Sense 3.3V Over Voltage Sense 5V Over Voltage Sense12V Under Voltage Sense 3.3V Under Voltage Sense 5V Under Voltage Sense 12V Extra Over voltage Protection Threshold Fault Delay Before Latching Internally Fixed Delay 46.5 46.5 60.5 3.8 5.8 13.4 2.1 3.7 9.2 50 50 65 4 6.1 14.2 2.3 4 10 1.25 150 53.5 53.5 69.5 4.2 6.4 15 2.5 4.3 10.8 mV mV mV V V V V V V V µs Current Surge Blanking Vsur Tsur Vsurth Threshold Voltage Current Surge blank Surge detection clamp voltage 2.5 21 6 Rsur = 33kΩ, Csur = 4.7µF V ms V Under Voltage Blanking During Power Up Tuv Thuv Under Voltage Blanking During Power Up (Vcc rise) Blanking Threshold Cuv = 2.2µF 100 300 500 ms 2.5 V 2.5 150 V mV Power Good (PG) Vpgth Power Good Voltage Threshold Vpghyst Power Good Voltage Threshold Hysteresis Vpgol Low Output Open Collector Saturation Voltage Ipgoh High Output Open Collector Leakage Current Tpgr Power Good Output Rise Time Tpgf Power Good Output Fall Time Tpg Power Good Adjustable Delay PIth Power Input Detection Threshold Collector Current = 15mA PG Output = 5V Load Capacitor = 100pF Load Capacitor = 100pF Load Capacitor Cpg=2.2µF 100 1 1 300 1.25 0.4 V 1 µA 500 µs µs ms V Remote Control (REM) Vremth Vremih Iremil Trem1 4/12 Remote ON/OFF Input Voltage Threshold High Input Remote Voltage Low Input Remote Saturation Current Remote Adjustable Delay ON to OFF Load Capacitor Crem=0.1µF 0.7 0.8 4.8 5 40 50 1 V 0.5 60 V mA ms TSM121 Symbol Trem2 Parameter Test Condition Remote Adjustable Delay OFF to ON Load Capacitor Crem=0.1µF Min Typ Max Unit 40 50 60 ms 2.46 2.5 2.54 20 17 10 V mV mV mV 15 30 PWM SECTION Voltage Reference (Vref2) Vref2 Is Ts Regline Voltage Reference Current Stability = Load Regulation Temperature Stability Line Regulation Iout Output Sourcing Current Capability Iout = 0mA Iout = 0mA to 10mA Iout <10mA, Vcc=14 to 24V mA Error Amplifier (IN+, IN-) Vio Iio Iib GBP Vicm CMR Isink Input Offset Voltage Input Offset Current Input Bias Current Gain Bandwidth Product Input Common Mode Voltage Range Common Mode Rejection Ratio Output Sink Current Vout (Feedback) = 2.5V Vout (Feedback) = 2.5V Vout (Feedback) = 2.5V RL = 2kΩ, CL = 100pF 0 3 50 200 5 -0.3 3.5 80 1 Vout (Feedback) = 0.7V mV nA nA MHz V dB mA PWM Comparator ∆max Vicmp Maximum Duty Cycle Input Common Mode Voltage Range Soft Start=0V 45 -0.3 48 50 3.5 % V Soft Start & Dead Time Control Vssth Soft Start Voltage Threshold Vicms Input Common Mode Voltage Range Zero Duty Cycle Maximum Duty Cycle 2.5 0 -0.3 V 3.5 V 100 140 kHz 0.5 0.2 1 1 2 0.5 µA V µs µs Oscillator (OSC) Freq Oscillator Frequency Cf=220pF 70 Open Collector Outputs (C1, C2, Sink Current Only) Icoh Vcol tr tf High Output Collector Leakage Current Low Output Collector Saturation Voltage Collector Current = 20mA C1, C2 rise time C1, C2 fall time 5/12 TSM121 Figure 1 : Application Schematic. Power Supply Based On Half Bridge + Pulse Transformer Topology 12V sense 12V 12V OUT sense 5V 5V OUT sense 3.3V 3.3V OUT DC AC 5V AUX Conv 3.3V 5V Stby Vcc DC Over & Under Voltage Protect Over Current Protection + Aux TSM121 Aux opto Viper Power Good Remote Fault PWM Error Amplifier Open Collector Transf Drive GND 6/12 to/from Motherboard MAIN Conv Vcc TSM121 Figure 2 : Internal Schematic Vcc VREF1 TO POWER SUPPLY TSM121 Tuv 12v Vs12 UV SURGE 5v 3.3v Vs5 Vs33 BLANK BLANK EP OUTPUT OVP UVP Tsur Trem Tpg PI LOGIC MAIN CONV. Is12 Is5 3.3v Is33 Vs5 Vs12 VREF2 PG OCP to MOTHERBOARD SECONDARY REM HOUSEKEEPING FAULT FROM 12v 5v VREF2 IN+ IN- C1 ERR AMP PWM GENERATOR FB OSC Vcc to PULSE TRANSF. C2 OSCILLATOR SS/DTC Gnd 7/12 TSM121 Figure 3 : Detailed Internal Schematic VCC TSUR IN 12V IS12 Vcs12 VCC OCP Rs12 VS12 OUT 12V Vov12 OVP OCP Tsur Vref1 Tfault S OVP Q FAULT R Vuv12 UVP UVP IN 5V IS5 Vcs5 Rs5 VS5 OUT 5V Vov5 Trem Crem Trem 5V OCP Power Up UV blanking Tuv OVP Tuv Cuv 5V Vref1 REM 0.8V Vuv5 IN 3.3V IS33 Vcs33 UVP OCP PG Rs33 OUT 3.3V TO MOTHERBOARD Tpg VS33 Vov33 OVP Tpg TSM121 Cpg Vref1 VREF1 Vuv33 EP 1.25V UVP Vcc PI OVP R16 HOUSEKEEPING CIRCUIT 1.25V VREF2 C3 Vs5 Vs12 R1 R2 R6 Vcc C2 R7 ERR AMP PWM COMP D Vcc R15 C1 R14 Q C1 FB R4 OSC + CK C2 OSCILLATOR !Q SS/DTC Cf SS/DTC COMP GND 8/12 Vcc FAULT R5 IN+ IN- R3 PWM CIRCUIT VREF2 R13 R12 TSM121 PRINCIPLE OF OPERATION & APPLICATION HINTS TSM121 is a one chip solution for all PC SMPS based on the half bridge topology: it integrates on the same chip the PWM circuitry (generating the appropriate signals for the power lines voltage regulations) as well as the HOUSEKEEPING circuitry (Over voltage, Over current, Under voltage protections as well as logic interface for proper communication with motherboard). 1. PWM Generator and Regulation Circuit: The PWM Generator circuit is composed of an Error Amplifier, a Saw Tooth Oscillator, a PWM Comparator, a Soft Start/Dead Time Control Comparator, a D-Latch and two Open Collector Outputs. 1.1. Error Amplifier The Error Amplifier delivers a signal proportional to the positive and negative inputs voltage difference (IN+, IN-). The output of this error amplifier can be compensated thanks to the Feedback (FB) pin with a compensation network inserted between the output (FB) and the negative input (IN-) (see figure 3). This error amplifier should be used to amplify the error between the middle point of a resistor bridge connected to the output power line(s) to be regulated (as an example), and the internal Voltage Reference Vref2 (as shown on figure 3). The resistors should fit the following equation: Vref2 / (R3 + VR1) = (Vs5 - Vref2) / R1 + (Vs12 Vref2) / R2 Recommended values are: R3=4.7kΩ, R1=10kΩ, R2=39kΩ VR1 is an optional potentiometer which can be used to obtain more accurate 5V and 12V lines. Its recommended range is 0 to 1kΩ. To compensate the error amplifier, the recommended values are: C1=10nF, R4=43kΩ, R5=10kΩ. These values need to be adjusted according to the whole system. 1.2. Oscillator The Oscillator frequency is to be fixed with an external capacitor (220pF for 100kHz typical) and gives a Saw Tooth Oscillation wave form with positive ramp (see figure 3). 1.3. PWM Comparator The PWM Comparator takes both outputs from the Error Amplifier and the Saw Tooth Oscillator. The resulting signal is a square wave oscillation. 1.4. Soft Start & Dead Time Control The Soft Start/Dead Time Control Comparator has two distinct functions. The Soft Start function ensures that during start up (power up of the complete SMPS at mains switch ON) the switching duty cycle starts from 0% for safe operation during the charging of all output capacitive loads. This can be achieved by setting an R7/C2 couple to be connected to the SS/DTC input. The Soft Start Time is determined by R7 and C2. In all cases, pay attention to the fact that the bypass capacitor C3 will degrade the Soft Start function. From this point of view, the value of the bypass capacitor should be chosen equal or lower than 100nF. The Dead Time Control allows to reduce the maximum duty cycle limit in order to limit the maximum output power. This can be achieved by adding a resistor R6 between SS/DTC input and Vref 2. This additional resistor will form a resistor bridge with the previous resistor and lower the maximum duty cycle. The maximum duty cycle is set by R6 and R7. The duty cycle DC fits the following equation: DC (%) = (100 x R6 / (R6 + R7)) / 2 The PWM comparator and the Soft Start/Dead Time Ctrl Comparator are ORed to form the input Clock signal of the D-Latch. Using the Q and !Q outputs of the D-Latch, and combining them with some NOR logic will impose proper switching of the output Open Collector Transistors with Duty Cycle varying from 0% to 50% max (on each output, and depending on the Error Amplifier inputs & Soft Start/Dead Time Ctrl conditions). Figure 4 summarizes all the oscillogram wave forms of the PWM Circuit. 9/12 TSM121 When the Soft Start input (SS/DTC) is low, the C1 / C2 outputs duty cycle is high. When the Soft Start input (SS/DTC) is high, the C1 / C2 outputs duty cycle is low. When the Error Amplifier output (FB) is low, the C1 / C2 outputs duty cycle is high. When the Error Amplifier output (FB) is high, the C1 / C2 outputs duty cycle is low. Figure 4 : FAULT PWM GENERATOR C1 FB PWM D Q A CK OSC OSCILLATOR SSDTC SS OSC FB SS PWM SSDTC CK Q !Q A B C1 C2 SS C1 C2 10/12 OSC C2 CK FB !Q B TSM121 1.5. Output Driver - Open Collectors The typical driving current from the TSM121 is 25mA. The recommended values of R12 to R16 are: R12=R13=3.9kΩ, R14=R15=7.5kΩ, R16=2kΩ 2. Housekeeping Circuit The TSM121 Housekeeping Circuit is dedicated to 3.3V, 5V, and 12V power lines protection. It integrates a Precision Voltage reference (independent from the PWM generator circuit Voltage Reference), a triple Over current Protection circuit, a triple Over voltage Protection circuit, and a triple Under voltage Protection circuit, as well as all the necessary logic and transient timing management circuits for optimal and secure communication with the motherboard, during start up, switch off and stabilized conditions. 2.1. Over current protection circuit The Over current protection circuit is made of 3 comparators with internal voltage thresholds requiring 3 different Sense resistors in series with the 3 different power lines. The thresholds are internally fixed to the Vcs33, Vcs5, Vcs12 values, and the sense resistors need to be chosen depending on the required over current limit. The outputs of these three comparators are ORed, and blanked by an internal delay circuitry (Surge Current Blanking - Tsur) which can be adjusted with external components (Rsur, Csur). Note that the three Over current protection circuits are blanked from current surges by the same delay circuit. This allows that during power up, large inrush currents are allowed during a short period of time corresponding to the charging of capacitive loads (see figure 3). The maximum output currents of the 12V, 5V, and 3.3V lines are determined by Rs12, Rs5 and Rs33 respectively: I12max = Vcs12 / Rs12 I5max = Vcs5 / Rs5 I33max = Vcs33 / Rs33 2.2. Over voltage protection circuit The Over voltage protection circuit is made of three comparators with internal voltage thresholds (Vov33, Vov5, Vov12) which do not require any external components for proper operation. The outputs of these three comparators are ORed. 2.3. Under voltage protection circuit The Under voltage protection circuit is made of three comparators with internal voltage thresholds (Vuv33, Vuv5, Vuv12) which do not require any external components for proper operation. The outputs of these three comparators are ORed, and blanked by an internal delay circuitry (Power Up UV Blanking - Tuv) which can be adjusted with external components (Cuv). This allows that during power up, the under voltage protection circuit is inhibited. 2.4. Logic Interface The Over current, Over voltage and Under voltage circuits outputs are again ORed before activating a Latch. When activated, this latch commands the full switch OFF of the three main power lines (3.3V, 5V, 12V) by an internal link between the Housekeeping and the PWM circuits. Note that the Under voltage circuit, after power up UV blanking, bears no other delay to the Latch setting input whereas the Over current and Over voltage circuits both bear an additional Tfault delay time. This allows an efficient protection against Output Short Circuit Conditions. The Over current, Over voltage and Under voltage circuits are all ORed to switch the Power Good output active (PG) to warn the motherboard that the voltage of at least one of the three power line is out of range. The PG activation bears an internal Tpg delay circuitry which can be adjusted with external components (Cpg) Thanks to this information link to the motherboard, a resetting signal to the latch is achievable with the Remote pin (REM). When the Remote pin is active, the internal Fault link between Housekeeping circuit and the PWM generator is active (high: PWM off), the PG pin is active (high). Note that to reset effectively the Latch, a minimum width Remote pulse should be applied thanks to an internal delay circuitry (Trem) which can be adjusted with external components (Crem). 2.5. Additional circuits: A Power Input (PI) is available for a supplementary power condition supervision. For example, the supervision of the Vcc power supply line. An Extra Protection (EP) circuit is available for an additional input power protection. For example, this operator can be used for the supervision of the primary input power via an additional wiring at the foot of the power half bridge. This operator can also be used for the supervision of eventual negative power lines (ex: -5V or -12V). 11/12 TSM121 PACKAGE MECHANICAL DATA 24 PINS - PLASTIC PACKAGE E A2 A L A1 E1 Stand-off B B1 e e1 e2 c D E 13 .015 F 24 0,38 Gage Plane 1 12 e3 e2 Dimensions Millimeters Min. A A1 A2 B B1 C D E E1 e e1 e2 e3 L Typ. Inches Max. Min. Typ. 5.08 0.51 3.05 0.36 0.76 0.23 22.61 7.62 6.10 2.54 3.30 0.46 1.02 0.25 22.86 6.40 1.778 7.62 3.30 4.57 0.56 1.14 0.38 23.11 8.64 6.86 10.92 1.52 3.81 Max. 0.20 0.020 0.120 0.0142 0.030 0.0090 0.890 0.30 0.240 0.10 0.130 0.0181 0.040 0.0098 0.90 0.252 0.070 0.30 0.130 0.180 0.0220 0.045 0.0150 0.910 0.340 0270 0.430 0.060 0.150 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 12/12