NUD4301 Advance Information Dual Channel LED Driver/Current Source This device is designed to replace switching regulators for driving LEDs in low voltage DC applications (up to 6 V). Its unique integrated circuit design provides the ability to drive external FETs to achieve higher voltage and current capabilities for different application needs (see Figure 8). An external resistor allows the circuit designer to set the LED current for different applications needs. The device is packaged in a small surface mount leadless package (DFN8), which results in a significant reduction of both system cost and board space. MARKING DIAGRAM Low Dropout Voltage < 300 mV Programmable Output Current from 1 mA to 30 mA Dual Output with Independent Current Limit Set DC Current in LED Analog/Digital PWM Capability This is a Pb−Free Device 43 M G 43 M G G 1 DFN8 CASE 506AQ Features • • • • • • http://onsemi.com = Specific Device Code = Date Code = Pb−Free Package (Note: Microdot may be in either location) PIN CONFIGURATION 1 Typical Applications 2 3 4 • Portables: PDAs, Cell phones • LCD Backlighting Applications 9 9 VCC 6 Drain1 1 Enable 2 Dim 3 NC ÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ 7 Drain2 Enable PWM Analog/ Digital Control Current Limit FET1 ÎÎÎ ÎÎÎ 8 7 6 5 (Bottom View) ORDERING INFORMATION Device Package NUD4301MNT1G DFN8 (Pb−Free) Shipping† 3000/Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please 8 refer to our Tape and Reel Packaging Specification Source2 Brochure, BRD8011/D. Current Limit FET2 5 Source1 4 GND Figure 1. Block Diagram This document contains information on a new product. Specifications and information herein are subject to change without notice. © Semiconductor Components Industries, LLC, 2007 February, 2007 − Rev. P4 1 Publication Order Number: NUD4301/D NUD4301 FUNCTIONAL PIN DESCRIPTIONS Pin Function Description 1 Enable 2 Dim This pin is used for analog or PWM dimming control. An analog signal of 0 – 3.3 volts is required, or a PWM signal with an amplitude greater than 3.3 volts. The dim controls both channels. 3 NC No connection. The device is enabled with a positive voltage signal at this pin. The enable controls both channels. 4 GND 5 Source1 Ground Reference to the device. 6 Drain1 Drain terminal of the FET 1, which is also the switching node of the load 1. 7 Drain2 Drain terminal of the FET 2, which is also the switching node of the load 2. 8 Source2 9 VCC Source terminal of the FET 1 Source terminal of the FET 2 Input voltage to the LED driver. This voltage is compatible with any battery based systems of up to 6 V. MAXIMUM RATINGS Symbol Value Unit Input Voltage, Operating Rating Steady State (VCC to GND) Transient (1 ms) VCC −0.3 to 6 −0.3 to 7 V Drain Voltage, Operating Steady State (Drain−to−Source) Transient (1 ms) VDS −0.3 to 6 −0.3 to 7 V Enable Voltage, Operating Steady State VEN −0.3 to 6 V Dim Voltage, Operating Steady State Vdim −0.3 to 3.6 V Drain Current, Peak IDpk 100 mA ID(avg) 30 mA Thermal Resistance, Junction−to−Air (Note 1) QJA 365 °C/W Power Dissipation @ TA = 25°C (Note 1) Derating above 25°C Pmax 340 2.7 mW mW/°C Operating Temperature Range TJ −40 to 150 °C Non−Operating Temperature Range TJ −55 to 175 °C Maximum Lead Temperature for Soldering Purposes (1.8” from case for 10 s) TL 260 °C Drain Current, Continuous Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Mounted onto minimum pad board. http://onsemi.com 2 NUD4301 ELECTRICAL CHARACTERISTICS (Unless otherwise noted: VCC = 3.6 V, Rsense = 4.7 W, 1%, TA = 25°C for typical values, For min/max values TJ is the applicable junction temperature) Symbol Min Typ Max Unit RDSon − 5.0 5.5 W IDSS − 10 100 nA VBRDSS 7.0 − − V − 100 − pF Vdrop − − 300 mV Iout 19 20 21 mA Logic Level High (Unit Operational) VENhigh 1.7 − − V Logic Level Low (Unit Shutdown) VENlow − − 0.7 V Off Voltage (Zero Output Current), ID = 20 mA, Rsense = 4.7 W Vzero − − 50 mV On Voltage (Max Output Current), ID = Iout, Rsense = 4.7 W Vmax 3.1 3.3 3.6 V Max PWM Frequency fmax − 10 − kHz Bias Current (VCC = 3.6 V, Device Non−Operational, VEnable = 0 V) IBIAS1 − 10 100 nA Bias Current (VCC = 3.6 V, Device Operational, VEnable = VCC) IBIAS2 − 100 200 mA Characteristics Power FET (Each Channel) ON Resistance (VCC = 3.6 V, ID = 10 mA, Rsense = 4.7 W, Vdim = 3.3 V) Zero Enable Voltage Drain Current (VDS = 6 V, VEnable = 0 V) Drain−to−Source Sustaining Voltage (ID = 100 mA) Output Capacitance (VDS = 6 V, VEnable = 0 V, f = 1 kHz) Voltage Drop (Note 2) (VCC = 3.6 V, VLED = 3.3 V, ID = 20 mA, Rsense = 4.7 W, Vdim = 3.3 V) Current Regulation Circuit (Each Channel) Output Current Regulation (VCC = 3.6 V, VLED = 3.3 V, Rsense = 4.7 W, Vdim = 3.3 V) Enable Dim Bias Supply (Complete Device) 2. Vdrop = VDS + VRsense LED1 LED2 Enable Dim + − 3.6 V PWM 3.3 V 1 kHz NC GND Vcc 1 2 3 4 8 NUD4301 7 6 5 Source2 Drain2 Drain1 Source1 Rsense2 Figure 2. Typical Low Voltage Application Circuit http://onsemi.com 3 Rsense1 NUD4301 TYPICAL PERFORMANCE CURVES (TA = 255C, unless otherwise noted) 25 100 ILED2 20 ILED (mA) ILED (mA) ILED1 10 15 10 5.0 1 1 10 0 100 2.0 3.0 4.0 5.0 6.0 7.0 Rsense (W) Figure 3. Current Limit Adjustment Figure 4. Typical Line Regulation Performance (VLED = 3.4 V, Rsense = 4.7 W) ILED2 20000 ILED2 ILED1 15 ILED1 15000 ILED (mA) ILED (mA) 1.0 VCC (V) 20 10 10000 5.0 0 0 5000 0 0.05 0.10 0.15 0.20 0.25 0 0.30 0 Vdrop (V) 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 3.6 Vdim (V) Figure 5. Typical Current Regulation vs. Vdrop (Vdrop = VDS + VRsense) Figure 6. Typical Current Regulation vs. Vdim (VLED = 3.4 V, Rsense = 4.7 W) http://onsemi.com 4 NUD4301 Analog Operation Digital Operation 3.3 V VDIM time ILimit ILED Iavg time Figure 7. Dimming Operation Curves (Graph obtained from SPICE simulations) Theory of Operation ILED + This device contains two LED current sources. Each channel is comprised of a lateral N−channel FET controlled by a current limit circuit that senses the voltage drop across the Rsense resistor and compares it with an internal voltage reference to provide the current regulation. For dimming applications, the current limit circuit operates in combination with the PWM signal applied to the dim pin of the device for control purposes. (Vdim ń35) Rsense If a PWM signal is beyond the input frequency range for the Dim pin, a RC filter may be used to convert it to an analog signal. The RC filter generates an analog voltage signal, which is proportional to the duty cycle of the PWM signal applied. This analog signal is then used as the new reference voltage for the current limit circuit, which compares it with the voltage signal generated across Rsense to provide the current regulation. Current Limit and PWM Circuits With a DC voltage of 3.3 V applied to the Dim pin of the device, the internal reference voltage of the current limit circuit is set to 94 mV. The Rsense resistor is then selected through a very simple formula: Rsense = 94 mV / ILED. This allows the user to set different LED currents (between 1 mA and 30 mA). For dimming control, a PWM signal may be applied to the dim pin of the device. This PWM signal can be used to perform digital dimming. For digital dimming, the amplitude of the PWM signal must be 3.3 V or higher. The LED current will be proportional to the duty cycle of the PWM signal. For analog dimming, the input signal to the Dim pin must be between 0 V and 3.3 V. The resulting output current will be given by the following formula: Enable The enable circuit turns the device on when a positive signal is applied to the enable pin. The circuit is designed to allow low current consumption (0.1 mA typical) when the device is disabled. LCD Backlighting Applications The voltage and current capability of the NUD4301 device can be increased by using external FETs so that the circuit can be used in high voltage backlighting applications such as TV. Figure 8 shows the schematic diagram of this concept. http://onsemi.com 5 NUD4301 R1 LED 1 LED 16 LED 15 LED 30 R2 Current Sense1 Jumper Q1 50−60 V + − Current Sense2 Jumper Q2 5.1 V Dim Jumper Enable Jumper R5 VCC ENABLE DIM DIM_TP Z1 C1 NC SOURCE2 S2_TP DRAIN2 NUD4301 GND EN_TP R6 D2_TP DRAIN1 D1_TP SOURCE1 C2 S1_TP R3 C3 R4 Figure 8. Typical LCD Backlighting Application Circuit Table 1. PROPOSED BOM FOR THE CIRCUIT OF FIGURE 8 Designator Description Characteristics Part Number Manufacturer R1, R2 Leaded Resistor 10 K, 1/2 W, 5% User Selectable User Selectable C1 Ceramic SMT 1206 Capacitor 10 mF, 10 V User Selectable User Selectable Z1 Zener Diode SOT−23 5.1 V, 300 mW BZX84C5V1LT1, G ON Semiconductor R3, R4 SMT 0805 Resistor 4.7 W, 1% User Selectable User Selectable R5, R6 SMT 0805 Resistor 560 K, 5% User Selectable User Selectable C2, C3 Tantalum Leaded Capacitor 1 mF, 10 V User Selectable User Selectable Q1, Q2 N−Channel FET SOT−23 60 V, 115 mA 2N7002LT1G ON Semiconductor NUD4301 Dual LED Driver, DFN 2x2 5 V, 30 mA NUD4301 ON Semiconductor For more details about this application circuit concept, please refer to the application notes posted at the ON Semiconductor Web site in the NUD4301 page. http://onsemi.com 6 NUD4301 PACKAGE DIMENSIONS DFN8 CASE 506AQ−01 ISSUE A D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. 5. INTERNAL PAD SIZE: 1.5 X 0.9 MM. A B PIN ONE REFERENCE 2X 0.10 C 2X ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ ÇÇÇÇ 0.10 C E TOP VIEW 0.08 C SEATING PLANE 0.575 0.0226 (A3) SIDE VIEW A1 1.150 0.0453 0.250 0.0098 C D2 e e/2 4 1 8X MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.50 0.70 0.50 BSC 0.20 −−− 0.25 0.45 SOLDERING FOOTPRINT* A 0.10 C 8X DIM A A1 A3 b D D2 E E2 e K L NOTE 5 L 1.350 0.0531 0.300 0.0118 0.500 0.0197 PITCH E2 0.700 0.0276 SCALE 15:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. K 8 5 8X b 0.10 C A B 0.05 C NOTE 3 BOTTOM VIEW ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5773−3850 http://onsemi.com 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NUD4301/D