SANYO LA76810A

Ordering number : ENA0252
Monolithic Linear IC
LA76810A
For PAL/NTSC Color Television Sets
VIF/SIF/Y/Deflection 1chip IC
Overview
LA76810A is a VIF/SIF/Y/Deflection 1chip IC for PAL/NTSC color television sets.
Functions
• VIF/SIF/Y/Deflection Implemented in a 1chip.
• I2C Bus Control
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Maximum supply current
Allowable power dissipation
Symbol
Conditions
Ratings
Unit
V8 max
7.0
V
V31 max
7.0
V
V43 max
7.0
V
I18 max
25
mA
I25 max
35
mA
Ta ≤ 65°C *
Pd max
Operating temperature
Topg
Storage temperature
Tstg
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1.6
W
-10 to +65
°C
-55 to +150
°C
3
* Provided with a glass epoxy board (114.3×76.1×1.6 mm )
Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage
Symbol
Conditions
Ratings
Unit
V8
5.0
V
V
V31
5.0
V43
5.0
V
Recommended supply current
I18
19
mA
27
mA
Operating supply voltage range
V8 op
4.7 to 5.3
V
V31 op
4.7 to 5.3
V
V43 op
4.7 to 5.3
V
I25 op
24 to 30
mA
I18 op
17 to 21
mA
I25
Operating supply current range
■ Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft’s control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before using any SANYO Semiconductor products described or contained herein in such
applications.
■ SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
N2206 MS PC B8-4814 No.A0252-1/43
LA76810A
Electrical Characteristics Ta = 25°C, VCCL = V8 = V31 = V43 = 5.0V, ICC = I18 = 19mA, ICC = I25 = 27mA
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
[Circuit voltage, current]
IF supply current
65.0
mA
RGB supply voltage
V18
I8
V8 = 5V, V3 = 2.5V
I18 = 19mA
8.0
V
Horizontal supply voltage
V25
I25 = 27mA
5.0
V
CCD supply current
I31
I31 = 5V
5.6
mA
Video supply current
I43
I43 = 5V
124.0
mA
[CCD block]
Voltage gain R
GV_R
-2
0
2
Voltage gain B
GV_B
-2
0
2
dB
Difference of voltage gain
DGV
0
0.1
0.3
dB
Delay time
Td
dB
µs
63.8
[OSD block]
OSD Fast SW
FSTH
1.7
1.9
2.2
V
Red RGB output level
threshold
ROSDH
120
165
200
IRE
Green RGB output level
GOSDH
70
120
140
IRE
Blue RGB output level
BOSDH
85
120
155
IRE
1.12
1.4
1.68
Ratio
LRRGB
45
50
60
%
GRGB
0.8
1
1.2
Ratio
Analog OSD R output level
RRGB
Gain match
Linearity
Analog OSD G output level
Gain match
Linearity
Analog OSD B output level
LGRGB
45
50
60
%
BRGB
0.8
1.0
1.2
Ratio
45
50
60
%
Gain Match
Linearity
LBRGB
[RGB output (cutoff drive) block]
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Brightness control (Normal)
BRT64
1.7
2
2.4
V
Hi brightness (max)
BRT127
15
20
25
IRE
-20
-15
IRE
Low brightness (min)
BRT0
-25
Cutoff control (min)
Vbias0
1.6
2
2.4
V
(Bias control) (max)
Vbias255
2.6
3
3.4
V
Resolution
Vbiassns
Sub-bias control Resolution
Vsbiassns
Drive adjustment
Rbout63
4
mV/Bit
7
mV/Bit
2.5
Vp-p
Maximum output output
Output attenuation
RBout0
7
9
8.5
9
0
0.3
11
dB
[VIF block]
Maximum RFAGC voltage
Minimum RFAGC voltage
VRFH
VRFL
CW = 80dBµ, DAC = 0
CW = 80dBµ, DAC = 63
Vdc
0.7
RFAGC0
DAC = 0
RF AGC Delay Pt (@DAC = 63)
RFAGC63
DAC = 63
75
dBµ
Output-3db
46
dBµ
Input sensitivity
Vi
85
Vdc
RF AGC Delay Pt (@DAC = 0)
dBµ
No-signal video output voltage
VOn
No signal
3.1
3.5
3.9
Vdc
Sync signal tip level
VOtip
CW = 80dBµ
0.9
1.2
1.5
Vdc
VO
80dBµ, AM = 78%, fm = 15kHz
1.9
2.0
2.1
Vp-p
Video S/N
S/N
CW = 80dBµ
45
dB
C-S beat level
IC-S
V4.43MHz/V1.07MHz
30
dB
Differential gain
DG
80dBµ, 87.5% Video MOD
5.0
10.0
DP
80dBµ, 87.5% Video MOD
2.0
10.0
deg
4.7
5
Vdc
Video output amplitude
Differential phase
Maximum AFT output voltage
VAFTH
CW = 80dBµ, frequency variations
4.3
%
Continued on next page.
No.A0252-2/43
LA76810A
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
min
typ
Unit
max
Minimum AFT output voltage
VAFTL
CW = 80dBµ, frequency variations
0.0
0.2
0.7
Vdc
AFT detection sensitivity
VAFTS
CW = 80dBµ, frequency variations
12.0
20.0
28.0
mV/kHz
APC pull-in range (U)
fPU
1.0
APC pull-in range (L)
fPL
1.0
NT Trap1 (4.5MHz)
MHz
MHz
NTR1
for 1MHz
-35
dB
NT Trap2 (4.8MHz)
NTR2
for 1MHz
-20
dB
BG Trap1 (5.5MHz)
BTR1
for 1MHz
-35
dB
BG Trap2 (5.85MHz)
BTR2
for 1MHz
-20
dB
I Trap1 (6.0MHz)
ITR1
for 1MHz
-35
dB
I Trap2 (6.55MHz)
ITR2
for 1MHz
-20
dB
DK Trap1 (6.5MHz)
DTR1
for 1MHz
-35
dB
NT Group Delay1 (3.5MHz)
NGD1
for 1MHz
200
ns
NT Group Delay2 (4.0MHz)
NGD2
for 1MHz
700
ns
BG Group Delay1 (4.0MHz)
BGD1
for 1MHz
100
ns
BG Group Delay2 (4.4MHz)
BGD2
for 1MHz
200
ns
I Group Delay1 (4.0MHz)
IGD1
for 1MHz
50
ns
I Group Delay2 (4.4MHz)
IGD2
for 1MHz
90
ns
DK Group Delay1 (4.0MHz)
DGD1
for 1MHz
30
ns
DGD2
for 1MHz
40
ns
DK Group Delay2 (4.4MHz)
[SIF block]
FM detection output voltage
580
SOADJ
FM limiting sensitivity
SLS
Output -3dB
FM detection output
SF
fm = 100kHz
STHD
FM = ±30kHz
SAMR
AM = 30%
SSN
DIN.Andio
-0.5
600
6.0
620
mVrms
61
dBµ
9.0
dB
1.0
%
f characteristics
FM detection output distortion
AM rejection ratio
SIF S/N
PAL de-emph time constant
PAL/NT difference of
voltage gain
TN de-emph time constant
BPF 3dB band width
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40
dB
50
dB
SPTC
SGD
3.0
dB
0.0
dB
SNTC
3.0
dB
SBW
3.0
dB
[AUDIO block]
Maximum gain
Variable range
Frequency characteristics
Mute
Distortion
AGMAX
1kHz
ARANGE
-2.5
0.0
60
65
2.5
dB
dB
AF
20kHz
-3.0
3.0
dB
AMUTE
20kHz
70
-
dB
0.5
%
ATHD
1kHz, 500mVrms, Vol: MAX
S/N
ASN
DIN.Audio
65
Crosstalk
ACT
20kHz
70
70
dB
dB
[Video SW block]
Video signal input 1DC voltage
VIN1DC
Video signal input 1AC voltage
VIN1AC
Video signal input 2DC voltage
VIN2DC
Video signal input 2AC voltage
VIN2AC
SVO terminal DC voltage
SVO terminal AC voltage
2.2
2.5
2.8
1
V
Vp-p
2.2
2.5
2.8
SVODC
1.7
2
2.3
V
SVOAC
1.7
2
2.3
Vp-p
1
V
Vp-p
[Filter block]
Chroma trap amount NTSC
CtrapN
-36.0
-26.0
-22.0
dB
Chroma trap amount PAL
CtrapP
-36.0
-26.0
-22.0
dB
-6.0
-3.0
0.0
dB
C-BPF1A (3.93MHz)
CBPF1A
Reference: 4.43MHz
FILTER SYS = 0010
Continued on next page.
No.A0252-3/43
LA76810A
Continued from preceding page.
Parameter
Symbol
C-BPF1B (4.73/4.13MHz)
CBPF1B
Conditions
Reference: 4.13MHz
Ratings
min
typ
Unit
max
-0.5
1.5
3.5
dB
6.0
4.0
1
dB
-4.0
-1.0
0.0
dB
-2.0
0.0
2.0
dB
-2.5
0.0
2.5
dB
FILTER SYS = 0010
C-BPF1C (4.93/3.93MHz)
CBPF1C
Reference: 3.93MHz
FILTER SYS = 0010
C-BPF2A (3.93MHz)
CBPF2A
Reference: 4.43MHz
FILTER SYS = 0011
C-BPF2B (4.73/4.13MHz)
CBPF2B
Reference: 4.13MHz
FILTER SYS = 0011
C-BPF2C (4.93/3.93MHz)
CBPF2C
Reference: 3.93MHz
FILTER SYS = 0011
Y-DL TIME1 S-VHS
TdY1
FILTER SYS = 0100
300.0
350.0
400.0
ns
Y-DL TIME2 PAL
TdY2
FILTER SYS = 0010
490.0
540.0
590.0
ns
Y-DL TIME3 NTSC
TdY3
FILTER SYS = 0001
530.0
580.0
630.0
ns
Y-DL TIME4 SECAM
TdY4
FILTER SYS = 1000
630.0
680.0
730.0
ns
CONT127
9.0
11.0
13.0
dB
CONT63
-7.5
-6.0
-4.5
dB
CONT0
-15.0
-12.0
-9.0
dB
6.0
9.0
12.0
dB
dB
[Video block]
Video overall gain
(Contrast max)
Contrast adjustment
Characteristics
(Normal/max)
Contrast adjustment
Characteristics
(Min/max)
Sharpness
(Normal)
Sharp31
FILTER SYS = 0000
variability
(max)
Sharp63
FILTER SYS = 0000
9.0
12.0
15.0
range
(min)
Sharp0
FILTER SYS = 0000
-4.0
-1.0
2.0
dB
Maximum black stretch gain
BKSTmax
20.0
25.0
30.0
IRE
Black stretch threshold
BKSTTH
-5.0
0.0
5.0
IRE
95.0
100.0
105.0
%
0.1
0.4
0.7
V
(60IRE ∆black)
DC transmission amount
ClampG
Horizontal/vertical blanking
RGBBLK
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output level
Video frequency
BW1
6.0MHz/100kHz
-6.0
-3.0
0.0
dB
BW2
3.2MHz/100kHz
-6.0
-3.0
0.0
dB
BW3
2.6MHz/100kHz
-6.0
-3.0
0.0
dB
BW4
3.1MHz/100kHz
-6.0
-3.0
0.0
dB
characteristics 1 S-VHS
Video frequency
characteristics 2 PAL
Video frequency
characteristics 3 NTSC
Video frequency
characteristics 4 SECAM
[Chroma block]: PAL/NTSC common
B-Y/Y amplitude ratio
CLRBY
75
100
150
%
Color control characteristics 1
CLRMN
Color MAX/CEN
1.6
2.0
2.4
deg
Color control characteristics 2
CLRMM
Color MAX/MIN
33
40
50
dB
Color control sensitivity
CLRSE
1
2
4
%/bit
fsc output label
Residual higher harmonic
FSC37
200
mVp-p
E_CAR_B
300
mVp-p
E_CAR_R
300
mVp-p
E_CAR_G
300
mVp-p
level B
Residual higher harmonic
level R
Residual higher harmonic
level G
Continued on next page.
No.A0252-4/43
LA76810A
Continued from preceding page.
Parameter
Symbol
Conditions
Ratings
min
typ
max
Unit
[Chroma block]: PAL
ACC amplitude characteristics 1
ACCM1_P
Input: +6dB/0dB 0dB = 40IRE
ACC amplitude characteristics 2
ACCM2_P
Input: -20dB/0dB
Demodulation output ratio
RB_P
R-Y/B-Y: PAL
Demodulation output ratio
1.2
deg
0.7
1.0
1.1
deg
0.50
0.56
0.67
deg
R-Y/B-Y_GainBalance_DAC,
-0.21
-0.19
-0.17
deg
-0.56
-0.51
-0.46
deg
85
90
95
deg
-36
-30
-23
dB
-350
Hz
R-Y/B-Y_Angle_DAC = Center, R-Y= no-signal
GR_P
G-Y/R-Y: PAL
Demodulation angle R-Y/B-Y:
1.0
R-Y/B-Y_Angle_DAC = Center
GB_P
G-Y/B-Y: PAL
Demodulation output ratio
R-Y/B-Y_GainBalance_DAC,
0.8
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center, B-Y = no-signal
ANGBR_P
PAL
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
Killer operating point
KILL_P
APC pull-in range (+)
PULIN+_P
APC pull-in range (-)
PULIN-_P
0dB = 40IRE
350
Hz
[Chroma block]: NTSC
ACC amplitude characteristics 1
ACCM1_N
Input:+6dB/0dB 0dB = 40IRE
0.8
1.0
1.2
deg
ACC amplitude characteristics 2
ACCM2_N
Input:-20dB/0dB
0.7
1.0
1.1
deg
0.80
0.90
1.00
deg
0.24
0.30
0.38
deg
99
104
109
deg
227
240
250
deg
-39
-32
-25
dB
-350
Hz
10
deg
Demodulation output ratio
RB_N
R-Y/B-Y: NTSC
Demodulation output ratio
GB_N
G-Y/B-Y: NTSC
Demodulation angle B-Y/R-Y:
ANGBR_N
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
ANGGB_N
NTSC
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
Killer operating point
KILL_N
APC pull-in range (+)
PULIN+_N
APC pull-in range (-)
PULIN-_N
Tint center
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
NTSC
Demodulation angle G-Y/B-Y:
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
0dB = 40IRE
350
Hz
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TINCEN
-10
Tint variable range (+)
TINT+
35
Tint variable range (-)
TINT-
0
deg
-35
deg
15625
15750
Hz
[Deflection block]
Horizontal free-running frequency
fH
15500
fH PULL
±400
Horizontal output pulse width
Hduty
36.1
37.6
39.1
µs
Horizontal output pulse
V Hsat
0
0.2
0.4
V
VFR50
312.0
312.5
313.0
H
Vertical free-running cycle 60
VFR60
262.0
262.5
263.0
H
Horizontal output pulse phase
HPHCENpal
9.5
10.5
11.5
µs
Horizontal output pulse phase
HPHCENnt
10.5
11.5
µs
Horizontal position adjustment
HPHrange
Horizontal pull-in range
Hz
saturation voltage
Vertical free-running cycle 50
9.5
±2.2
5bit
µs
range
Horizontal position adjustment
HPHstep
200.0
ns
maximum variability width
POR circuit operating voltage
VPOR
3.70
4.00
4.30
V
Horizontal blanking left @0
BLKL0
BLKL: 000
7500
8300
9100
ns
Horizontal blanking left @7
BLKL7
BLKL: 111
10800
11600
12400
ns
Horizontal blanking right @0
BLKR0
BLKR: 000
1800
2600
3400
ns
Horizontal blanking right @7
BLKR7
BLKR: 111
-1100
-300
500
ns
Sand castle pulse crest value H
SANDH
5.3
5.6
5.9
V
Sand castle pulse crest value
SANDM1
3.7
4.0
4.3
V
SANDL
0.1
0.4
0.7
V
M1
Sand castle pulse crest value L
Continued on next page.
No.A0252-5/43
LA76810A
Continued from preceding page.
Conditions
Ratings
Parameter
Symbol
Sand castle pulse crest value
SANDM2
1.7
2.0
2.3
V
BGPWD
3.5
4.0
4.5
µs
min
typ
max
Unit
M2
Burst gate pulse width
Burst gate pulse phase
BGPPH
4.9
5.4
5.9
µs
SECAM V pulse width
SECAMV
11.0
11.5
12.0
H
<Vertical screen size adjustment>
Vertical ramp output amplitude
Vspal64
VSIZE: 1000000
0.75
0.85
0.95
Vp-p
Vsnt64
VSIZE: 1000000
0.75
0.85
0.95
Vp-p
Vspal0
VSIZE: 0000000
0.40
0.50
0.60
Vp-p
Vspal127
VSIZE: 1111111
1.05
1.20
1.35
Vp-p
Vsizecomp
VCOMP: 000
0.83
0.88
0.93
ratio
Vdcpal32
VDC: 100000
2.25
2.40
2.55
Vdc
Vdcnt32
VDC: 100000
2.25
2.40
2.55
Vdc
Vdcpal0
VDC: 000000
1.85
2.00
2.15
Vdc
Vdcpal63
VDC: 111111
2.65
2.80
2.95
Vdc
Vlin16
VLIN: 10000
0.85
1.00
1.15
ratio
Vertical linearity @0
Vlin0
VLIN: 00000
1.17
1.32
1.47
ratio
Vertical linearity @31
Vlin31
VLIN: 11111
0.57
0.72
0.87
ratio
VScor16
VSC: 10000
0.55
0.70
0.85
ratio
Vertical S-shaped correction @0
VScor0
VSC: 00000
0.85
1.00
1.15
ratio
Vertical
VScor31
VSC: 11111
0.36
0.51
0.66
ratio
PAL@64
Vertical ramp output amplitude
NTSC@64
Vertical ramp output amplitude
PAL@0
Vertical ramp output amplitude
PAL@127
<High-voltage dependent vertical size correction>
Vertical size correction @0
<Vertical screen position adjustment>
Vertical ramp DC voltage
PAL@32
Vertical ramp DC voltage
NTSC@32
Vertical ramp DC voltage
PAL@0
Vertical ramp DC voltage
PAL@63
Vertical linearity @16
Vertical
S-shaped
correction
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@16
S-shaped
correction
@31
Package Dimensions
unit : mm
3273
28
1
27
(0.65)
1.05
1.78
0.25
(4.0)
0.51min
3.8 5.0max
13.8
54
15.24
47.58
0.48
SANYO : DIP54S(600mil)
No.A0252-6/43
LA76810A
Block Diagram and Test Circuit
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No.A0252-7/43
LA76810A
Test Conditions Ta = 25°C, VCC = V8 = V31 = V43 = 5.0V, l18 = 19mA, ICC = l25 = 27mA
Parameter
Symbol
Test point
Input signal
Test method
Bus conditions
[Circuit voltage, current]
Horizontal supply voltage
V25
(pin 25)
RGB supply voltage (pin 18)
IF supply current (pin 8)
V18
I8
(CDDICC)
CCD supply current (pin 31)
Video/vertical supply current
(pin 43)
No signal
Apply a current of 27mA to pin 25 and
25
Initial
measure the voltage at pin 25.
No signal
18
Apply a current of 19mA to pin 18 and
Initial
measure the voltage at pin 18.
No signal
Apply a voltage of 5.0V to pin 8 and
Initial
measure the incoming DC current (mA).
8
(IF AGC 2.5V applied)
I31
(CCDICC)
31
No signal
I43
(DEFICC)
43
Apply a voltage of 5.0V to pin 31 and
Initial
measure the incoming DC current (mA).
No signal
Apply a voltage of 5.0V to pin 43 and
Initial
measure the incoming DC current (mA).
VIF Block Input Signals and Test Conditions
1. Input signals must all be input to the PIF IN (pin 6) in the Test Circuit.
2. All input signal voltage values are the levels at the VIF IN (pin 6) in the Test Circuit.
3. Signal contents and signal levels
Input signal
Waveform
Conditions
SG1
38.9MHz
CW
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SG2
34.47MHz
CW
SG3
33.4MHz
CW
SG4
Frequency variable
CW
SG5
38.9MHz
87.5% Video Mod.
10-stairstep wave
(Subcarrier: 4.43MHz)
SG6
38.9MHz
fm = 15kHz, AM = 78%
4. Before measurement, adjust the DAC as follows.
Parameter
Video
Level DAC
Test point
46
Input signal
SG6, 80dBµ
Adjustment
Set the output level at pin 46 as close to 2.0Vp-p as possible.
NoA0252-8/40
LA76810A
VIF Block Test Conditions
Input signal
Symbol
Test point
VRFH
4
Input signal
Test method
Bus conditions
[VIF block]
Maximum RF AGC
voltage
Minimum RF AGC
VRFL
voltage
RF AGC Delay Pt
RFAGC0
(@DAC = 0)
RF AGC Delay Pt
RFAGC63
(@DAC = 63)
Input sensitivity
Vi
4
4
4
46
SG1
Measure the DC voltage at pin 4.
RF.AGC = "000000"
Measure the DC voltage at pin 4.
RF.AGC = "111111"
Obtain the input level at which the DC voltage at
RF.AGC = "000000"
80dBµ
SG1
80dBµ
SG1
pin 4 becomes 4.5V.
SG1
Obtain the input level at which the DC voltage at
RF.AGC = "111111"
pin 4 becomes 4.5V.
SG6
Using an oscilloscope, observe the level at pin 46
and obtain the input level at which the waveform's
p-p value becomes 1.4Vp-p.
No-signal
VOn
video output voltage
Sync signal tip level
Video output
VOtip
VO
amplitude
Video S/N
S/N
46
46
46
46
No signal
Set IF AGC = “1” and measure the DC voltage at
pin 46.
SG1
Measure the DC voltage at pin 46.
80dBµ
SG6
Using an oscilloscope, observe the level at pin 46
80dBµ
and measure the waveform’s p-p value.
SG1
Measure the noise voltage (Vsn) at pin 46 with an
80dBµ
RMS voltmeter through a 10kHz to 5.0MHz
band-pass filter and calculate 20 log (1.43/Vsn).
C-S beat level
IC-S
46
SG1
Input a 80dBµ SG1 signal and measure the DC
SG2
voltage (V3) at pin 3. Mix SG1 = 74dBµ, SG2 =
SG3
64 dBµ, and SG3 = 64 dBµ to enter the mixture in
the VIF IN. Apply V3 to pin 3 from an external DC
power supply. Using a spectrum analyzer,
measure the difference between pin 46’s
4.43MHz component and 1.07MHz component.
Differential gain
DG
Differential phase
DP
Maximum AFT
VAFTH
output voltage
46
46
10
SG5
Using a vector scope, measure the level at Pin
80dBµ
SG5
46.
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Using a vector scope, measure the level at Pin
80dBµ
46.
SG4
Set and input the SG4 frequency to 37.9MHz to
80dBµ
be input. Measure the DC voltage at pin 10 at
SG4
Set and input the SG4 frequency to 39.9MHz to
that moment.
Minimum AFT
VAFTL
output voltage
10
80dBµz
be input. Measure the DC voltage at pin 10 at
that moment.
AFT detection
VAFTS
sensitivity
10
SG4
80dBµz
Adjust the SG4 frequency and measure
frequency deviation ∆f when the DC voltage at
pin 10 changes from 1.5V to 3.5V.
VAFTS = 2000/∆f [mV/kHz]
APC pull-in
range (U), (L)
fPU, fPL
46
SG4
Connect an oscilloscope to pin 46 and adjust the
80dBµ
SG4 frequency to a frequency higher than
38.9MHz to bring the PLL into unlocked mode.
(A beat signal appears.) Lower the SG4
frequency and measure the frequency at which
the PLL locks again. In the same manner, adjust
the SG4 frequency to a lower frequency to bring
the PLL into unlocked mode. Higher the SG4
frequency and measure the frequency at which
the PLL locks again.
NoA0252-9/40
LA76810A
SIF Block (FM block) Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. Bus control condition: IF.AGC.SW = "1", SIF.SYS = "01", DEEM-TC = "0", FM.GAIN = "0"
2. SW:IF1 = "ON"
3. Input signals are input to pin 54 and the carrier frequency is 5.5MHz.
Input signal
FM detection
Symbol
Test point
SOADJ
2
output voltage
Input signal
Test method
90dBµ,
Adjust the DAC (FM.LEVEL) such that the 400Hz
fm = 400Hz,
component of the FM detection output at pin 2
FM = ±30kHz
become as close to 600mVrms as possible and
Bus conditions
measure (SV1:mVrms) the output at that
moment.
FM limiting
SLS
2
sensitivity
fm = 400Hz,
Measure the input level (dBµ) at which the 400Hz
FM level =
FM = ±30kHz
component of the FM detection output at pin 2
Adjustment value
becomes -3dB relative to SV1.
FM detection
SF
2
output f characteristics
(fm = 100kHz)
90dBµ,
Set SW: IF1 = "OFF".
FM level =
fm = 100kHz
Measure (SV2: mVrms) the FM detection output
Adjustment value
FM = ±30kHz
of pin 2. Calculate as follows:
SF = 20*LOG (SV1/SV2) [dB]
FM detection output
STHD
2
distortion
90dBµ,
Measure the distortion factor of the 400Hz
FM level =
fm = 400Hz,
component of the FM detection output at pin 2.
Adjustment value
90dBµ,
Measure the 1kHz component (SV3: mVrms) of
FM level =
fm = 400Hz,
the FM detection output at pin 2.
Adjustment value
AM = 30%
Assign the measured value to SV3 and
FM = ±30kHz
AM rejection
SAMR
2
ratio
calculate as follows:
SAMR = 20*LOG (SV1/SV3) [dB]
SIF.S/N
SSN
2
90dBµ,
Measure the noise level (DIN AUDIO, SV4:
FM level =
CW
mVrms) at pin 2. Calculate as follows:
Adjustment value
SSN=20*LOG(SV1/SV4) [dB]
PAL de-emph time
SPTC
90dBµ,
2
constant
Measure the 3.18kHz component (SV5: mVrms)
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fm = 3.18KHz
of the FM detection output at pin 2 and calculate
FM = ±30KHz
as follows:
FM level =
Adjustment value
SNTC = 20*LOG (SV1/SV5) [dB]
PAL/NT
SGD
2
Difference of voltage
gain
fo = 4.5MHz
Measure the 400Hz component (SV6: mVrms) of
FM level =
90dBµ,
the FM detection output at pin 2 and calculate as
Adjustment value
fm = 400Hz
follows:
SIF.SYS = "00"
FM = ±15KHz
SNTC = 20*LOG (SV1/SV6) [dB]
DEEM-TC = "1"
fo = 4.5MHz
Measure the 2.12kHz component (SV7: mVrms)
FM level =
90dBµ,
of the FM detection output at pin 2 and calculate
Adjustment value
fm = 2.12kHz
as follows:
SIF.SYS = "00"
FM = ±15kHz
SNTC = 20*LOG (SV6/SV7) [dB]
DEEM-TC = "1"
90dBµ,
Set SW: IF1 = "OFF".
FM level=
CW
Pin9 = 5V
Adjustment value
FM.GAIN = "1"
NT de-emph
SNTC
2
time constant
FM.GAIN = "1"
BPF 3db band width
SBW
2
Measure the 458kHz component (SV8: mVrms)
at pin 2. Set the input frequency to 5.565MHz to
the input frequency and measure the 393kHz
component (SV9: mVrms) at pin 2 to calculate as
follows:
SBW = 20*LOG (SV8/SV9) [dB]
NoA0252-10/40
LA76810A
Audio Block Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. Bus control condition:
AUDIO.MUTE = "0", AUDIO.SW = "1", VOL.FIL = "0", SIF.SYS = "01", IF.AGC.SW = "1"
2. Input 5.5MHz, 90dBµ and CW at pin 54.
3. Enter an input signal from pin 51.
Input signal
Maximum gain
Symbol
AGMAX
Test point
1
Input signal
Test method
1kHz, CW
Measure the 1kHz component (V1: mVrms) at
500mVrms
the pin 1 and calculate as follows:
Bus conditions
VOLUME = "1111111"
AGMAX = 20*LOG (V1/500) [dB]
Variable range
ARANGE
1
1kHz, CW
Measure the 1kHz component (V2: mVrms) at
500mVrms
the pin 1 and calculate as follows:
VOLUME = "0000000"
ARANGE = 20*LOG (V1/V2) [dB]
Frequency
AF
characteristics
1
20kHz, CW
Measure the 20kHz component (V3: mVrms) at
500mVrms
the pin 1 and calculate as follows:
VOLUME = "1111111"
AF = 20*LOG (V3/V1) [dB]
Mute
AMUTE
1
20kHz, CW
Measure the 20kHz component (V4: mVrms) at
VOLUME = "1111111"
500mVrms
the pin 1 and calculate as follows:
AUDIO.MUTE = ”1”
AMUTE = 20*LOG (V3/V4) [dB]
Distortion
S/N
ATHD
ASN
1
1
1kHz, CW
Measure the distortion of the 1kHz component at
500mVrms
the pin 1.
No signal
Measure the noise level (DIN AUDIO, V5:
VOLUME = "1111111"
VOLUME = "1111111"
mVrms) at the pin 1 and calculate as follows:
ASN = 20*LOG (V1/V5) [dB]
Crosstalk
ACT
1
20kHz, CW
Measure the 20kHz component (V6: mVrms) at
VOLUME = "1111111"
500mVrms
the pin 1 and calculate as follows:
AUDIO.SW = "0"
ACT = 20*LOG (V3/V6) [dB]
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NoA0252-11/40
LA76810A
Video Block Input Signals and Test Conditions
C IN Input* chroma burst signal: 40 IRE
Y IN input signal 1001RE: 714mV
Bus control bit conditions: Initial test state
0IRE signal (L-0): NTSC standard sync signal
PEDESTAL LEVEL
H SYNC
4.7µs
(H/V SYNC:40IRE: 286mV)
XIRE signal (L-X)
XIRE (X = 0 to 100)
0IRE
CW signal (L-CW)
20IRE CW signal
50IRE
BLACK STRETCH 0IRE signal (L-BK)
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50µs
100IRE
5µs
(Point A)
R/G/B IN Input signal
RGB Input signal 1 (0-1)
to each 20µs
0.35V
A
B
0.7V
0.0VDC
RGB Input signal 2 (0-2)
20µs
30µs
1.0VDC
0.0VDC
NoA0252-12/40
LA76810A
Video Block Test Conditions
Input signal
Video overall gain
Symbol
CONT127
(Contrast max)
Test point
21
Input signal
L-50
Test method
Bus bit/input signal
Measure the output signal’s 50IRE amplitude
CONTRAST:
(CNTHB Vp-p) and calculate
1111111
CONT127 = 20Log (CNTHB/0.357).
Contrast
CONT63
L-50
21
adjustment
characteristics
Measure the output signal’s 50IRE amplitude
CONTRAST:
(CNTCB Vp-p) and calculate
0111111
CONT63 = 20Log (CNTCB/0.357).
(normal/max)
Contrast
CONT0
L-50
21
adjustment
characteristics
Measure the output signal’s 50IRE amplitude
CONTRAST:
(CNTLB Vp-p) and calculate
0000000
CONT0 = 20Log (CNTLB/0.357).
(min/max)
Video frequency
BW1
L-CW
21
Characteristics 1
(SVHS)
With the input signal’s continuous
FILTER SYS: 0100
wave = 100kHz, measure the output signal’s
SHARPNESS:
continuous wave amplitude (PEAKDC Vp-p).
000000
With the input signal’s continuous
wave = 6MHz, measure the output signal’s
continuous wave amplitude (CW7 Vp-p).
Calculate BW1 = 20Log (CW6/PEAKDC).
Video frequency
BW2
L-CW
21
Characteristics 2
(PAL)
With the input signal’s continuous
FILTER SYS: 0010
wave = 3.2MHz, measure the output signal’s
SHARPNESS:
continuous wave amplitude (CW3.2 Vp-p).
000000
Calculate BW2 = 20Log (CW3.2/PEAKDC).
Video frequency
BW3
L-CW
21
Characteristics 3
(NTSC)
With the input signal’s continuous
FILTER SYS: 0000
wave = 2.6MHz, measure the output signal’s
SHARPNESS:
continuous wave amplitude (CW2.6 Vp-p).
000000
Calculate BW3 = 20Log (CW2.6/PEAKDC).
Video frequency
BW4
L-CW
21
Characteristics 4
(SECAM)
With the input signal’s continuous
FILTER SYS: 1000
wave = 3.1MHz, measure the output signal’s
SHARPNESS:
continuous wave amplitude (CW3.1 Vp-p).
000000
Calculate BW4 = 20Log (CW3.1/PEAKDC).
Chroma trap amount
CtraPP
L-CW
21
PAL
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With the
input signal’s continuous
wave = 4.43MHz, measure the output signal’s
FILTER SYS: 010
Sharpness: 000000
continuous wave amplitude (F0P Vp-p).
Calculate CtraP = 20Log (F0P/PEAKDC).
Chroma trap amount
CtraPN
L-CW
21
NTSC
With the input signal’s continuous
FILTER SYS: 000
wave = 3.58MHz, measure the output signal’s
Sharpness: 000000
continuous wave amplitude (F0N Vp-p).
Calculate CtraN = 20Log (F0N/PEAKDC).
DC transmission
ClampG1
L-0
21
amount
Measure the output signal’s 0IRE DC level
Brightness:
(BRTPL V).
0000000
CONTRAST:
1111111
L-100
Y-DL TIME1(SVHS)
TdY1
L-50
21
Measure the output signal’s 0IRE DC level
Brightness:
(DRVPH V) and 100IRE amplitude (DRVH Vp-p)
0000000
and calculate ClampG = 100 ×
Contrast:
(1+(DRVPH - BRTPL)/DRVH).
1111111
Obtain the time difference (the delay time) from
FILTER SYS:0100
when the rise of the input signal's 50IRE
amplitude to the output signal's 50IRE amplitude.
Y-DL TIME2(PAL)
TdY2
21
L-50
Obtain the time difference (the delay time) from
FILTER SYS:0010
when the rise of the input signal's 50IRE
amplitude to the output signal's 50IRE amplitude.
Y-DL TIME3(NTSC)
TdY3
21
L-50
Obtain the time difference (the delay time) from
FILTER SYS:0000
when the rise of the input signal's 50IRE
amplitude to the output signal's 50IRE amplitude.
Y-DL TIME4(SECAM)
TdY4
21
L-50
Obtain the time difference (the delay time) from
FILTER SYS:1000
when the rise of the input signal's 50IRE
amplitude to the output signal's 50IRE amplitude.
Continued on next page.
NoA0252-13/40
LA76810A
Continued from preceding page.
Input signal
Symbol
Maximum black
Test point
BKSTmax
Input signal
L-BK
21
stretch gain
Test method
Bus bit/input signal
Measure the 0IRE DC level (BKST1 V) at point A
of the output signal in the Black Stretch Defeat
(Black Stretch OFF) mode.
Measure the 0IRE DC level (BKST2 V) at point A
Blk Str DEF: 0
of the output signal in the Black Stretch ON
mode.
Calculate BKSTmax=2×50× (BKST1-BKST2)
/CNTHB.
Black stretch
BKSTTH∆
L-60
Measure the 60IRE DC level (BKST3 V) of the
21
threshold ∆black
Blk Str DEF: 0
output signal in the Black Stretch Defeat ON
(60IRE ∆black)
mode.
Measure the 60IRE DC level (BKST4 V) of the
output signal in the Black Stretch Defeat (Black
Stretch OFF) mode.
Calculate BKSTTH∆ = 50×
(BKST4-BKST3)/CNTHB.
Sharpness
variability
Sharp31
L-CW
21
characteristics
With the input signal’s continuous
FILTER SYS:0000
wave = 2.2MHz, measure the output signal’s
Sharpness: 100000
continuous wave amplitude (F00S31 Vp-p).
(normal)
(max)
Calculate Sharp31 = 20Log (F00S31/PEAKDC).
Sharp63
L-CW
With the input signal’s continuous
FILTER SYS:0000
wave = 2.2MHz, measure the output signal’s
Sharpness: 111111
continuous wave amplitude (F00S63 Vp-p).
Calculate Sharp63=20Log (F00S63/PEAKDC).
(min)
Sharp0
L-CW
With the input signal’s continuous
FILTER SYS:0000
wave=2.2MHz, measure the output signal’s
Sharpness: 000000
continuous wave amplitude (F00S0 Vp-p).
Calculate Sharp0 = 20Log (F00S0/PEAKDC).
Horizontal/vertical
RGBBLK
L-100
21
blanking output
Measure the DC level (RGBBLK V) for the output
signal’s
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blanking period.
level
[OSD block] Bus control bit conditions: Contrast = 63, Brightness = 63
Input signal
OSD
Symbol
Test point
FSTH
21
Fast SW threshold
Input signal
Test method
Bus bit/input signal
L-0
Apply voltage to pin 17 and measure the voltage
Pin 16A: O-2
O-2
at pin 17 at the point where the output signal
applied
switches to the OSD signal.
Red RGB output
ROSDC
L-50
19
level
Measure the output signal’s 50IRE amplitude
(CNTCR Vp-p).
L-0
Measure the OSD output amplitude
Pin 17: 3.5V
O-2
(OSDHR Vp-p).
Pin 14A: O-2
applied
Calculate ROSDC = 50 × (ROSDC /CNTCR)
Green RGB output
level
GOSDC
L-50
20
Measure the output signal’s 50IRE amplitude
(CNTCG Vp-p).
L-0
Measure the OSD output amplitude
Pin 17: 3.5V
O-2
(OSDHG Vp-p).
Pin 15A: O-2
applied
Calculate GOSDC = 50 × (GOSDC/CNTCG)
Continued on next page.
NoA0252-14/40
LA76810A
Continued from preceding page.
Input signal
Symbol
Blue RGB output
BOSDC
Test point
Input signal
L-50
21
level
Test method
Bus bit/input signal
Measure the output signal’s 50IRE amplitude
(CNTCB Vp-p).
L-0
Measure the OSD output amplitude
Pin 17: 3.5V
O-2
(OSDHB Vp-p).
Pin 16A: O-2
applied
Calculate BOSDC = 50 × (OSDHB/CNTCB)
Analog OSD R output
19
level
L-0
Measure the amplitudes at point A (0.35V portion
Pin 17 : 3.5V
O-1
of the input signal 0-1) and point B (0.7V portion
Pin 14A : O-1
of the input signal 0-1) of the output signal.
applied
Assign the measured values to RGBLR Vp-p and
RGBHR Vp-p, respectively.
Gain match
RRGB
linearity
LRRGB
Calculate RRGB = RGBLR/CNTCR.
Calculate LRRGB = 100 × (RGBLR/RGBHR).
Analog OSD G output
20
level
L-0
Measure the amplitudes at point A (0.35V portion
Pin 17: 3.5V
O-1
of the input signal 0-1) and point B (0.7V portion
Pin 15A: O-1
of the input signal 0-1) of the output signal.
applied
Assign the measured values to RGBLG Vp-p and
RGBHG Vp-p, respectively.
Gain match
GRGB
Calculate GRGB = RGBLG/CNTCG.
linearity
LGRGB
Calculate LGRGB = 100 × (RGBLG/RGBHG).
Analog OSD B output
21
level
L-0
Measure the amplitudes at point A (0.35V portion
Pin 17: 3.5V
O-1
of the input signal 0-1) and point B (0.7V portion
Pin 16A: O-1
of the input signal 0-1) of the output signal.
applied
Assign the measured values to RGBLB Vp-p and
RGBHB Vp-p, respectively.
Gain･match
BRGB
Calculate BRGB = RGBLB/CNTCB.
linearity
LBRGB
Calculate LBRGB = 100 × (RGBLB/RGBHB).
.
[RGB output block] (Cutoff, drive block) Bus control bit conditions: Contrast=127
Input signal
Symbol
Brightness control
BRT63
(normal)
Test point
19
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Input signal
Test method
Bus bit/input signal
L-0
Measure the 0IRE DC levels of the respective
Brightness:
output signals of R output (19), G output (20), and
01111111
B output (21). Assign the measured values to
BRTPCR, BRTPCG, and BRTPCB V, respectively.
20
Calculate BRT63 = (BRTPCR+BRTPCG+
BRTPCB)/3.
21
(max)
BRT127
21
Measure the 0IRE DC level of the output signal of
Brightness:
B output (21) and assign the measured value to
1111111
BRTPHB.
Calculate BRT127 = 50 × (BRTPHB-BRTPCB)/
CNTHB.
(min)
BRT0
Measure the 0IRE DC level of the output signal of
Brightness:
B output (21) and assign the measured value to
0000000
BRTPLB.
Calculate BRT0 = 50 × (BRTPLB-BRTPCB)/
CNTHB.
Continued on next page.
NoA0252-15/40
LA76810A
Continued from preceding page.
Input signal
Symbol
Bias (cutoff) control
Test point
Vbias0
(min)
Input signal
L-50
19
Test method
Bus bit/input signal
Measure the 0IRE DC levels (Vbias0* V) of the
Sub-Brightness:
respective output signals of R output (19), G
0000000
output (20), and B output (21).
*: R, G, and B
(max)
Vbias255
20
21
Bias (cutoff) control
Vbiassns
resolution
Measure the 0IRE DC levels (Vbias255* V) of the
Sub-Brightness:
respective output signals of R output (19), G
1111111
output (20), and B output (21).
Red/Green/Blue
*: R, G, and B
Bias: 11111111
Measure the 0IRE DC levels (BAS80* V) of the
Red/Green/Blue
respective output signals of R output (19), G
Bias:01010000
output (20), and B output (21).
*: R, G, and B
Measure the 0IRE DC levels (BAS48* V) of the
Red/Green/Blue
respective output signals of R output (19), G
Bias: 00110000
output (20), and B output (21).
Calculate Vbiassns* = (BAS80*-BAS48*)/32
Sub-bias control
Vsbiassns
L-50
resolution
Measure the 0IRE DC levels (SBTPM* V) of the
Sub-Brightness:
respective output signals of R output (19), G
0101010
output (20), and B output (21).
Contrast: 0111111
Calculate Vsbiassns* = (BRTPC*-SBTPM*)
Drive adjustment
RBout127
L-100
19
maximum output
Measure the 100IRE amplitudes
Brightness:
(DRVH* Vp-p) of the respective output
0000000
signals of R output (19) and B output (21).
Gout15
*: R and B
20
Measure the 100IRE amplitude of the output
signal of G output (20) and assign the measured
value to DRVH* Vp-p.
21
Output attenuation
*: G
RBout0
Measure the 100IRE amplitudes (DRVL* Vp-p) of
Brightness:
the respective output signals of R output (19), G
0000000
output (20),
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and B output (21).
*: R and B
Red/Blue Drive:
0000000
Measure the 100IRE amplitude of the output
signal of G output (20) and assign the measured
value to DRVL* Vp-p.
*: G
Gout0
RBout0* = 20Log (DRVH*/DRVL*)
Gout0* = 20Log (DRVH*/DRVL*)
Gamma correction
Rγ
Gγ
L-100
19
Bγ
20
21
Measure the 100IRE amplitude of the respective
Contrast: 0111111
output signals of R output (28), G output (29),
Brightness:
and B output (30) with Gamma Def being ON and
01111111
OFF. Assign the measured values to *A, *B and
Gamma Def: Off,On
Vp-p, respectively.
B Gamma
* : R, G, B
sel: 11,00
*γ = 100*(*A/*B)
NoA0252-16/40
LA76810A
[VIDEO SW block] Bus control bit conditions: Contrast = 63, Brightness = 63
Input signal
Symbol
Video signal input
VIN1DC
VIN2DC
2DC voltage
SVO terminal DC
SVODC
voltage
SVO terminal AC
voltage
Chroma Block
Input signal
L-100
42
1DC voltage
Video signal input
Test point
44
40
SVOAC
Test method
Bus bit/input signal
Input signals to pin 42 and measure the voltage
VIDEO SW: 1
of the pedestal.
L-100
Input signals to pin 44 and measure the voltage
VIDEO SW: 0
of the pedestal.
L-100
Input signals to pin 42 and measure the voltage
VIDEO SW: 1
of the pedestal at pin 40.
L-100
40
Input signals to pin 42 and measure the voltage
VIDE0 SW: 1
of the pedestal at pin 40.
Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. VIF, SIF blocks: No signal
2. Deflection Block: Horizontal/vertical composite sync signals are input and the deflection block must be locked into
the sync signals (Refer to the Deflection Block Input Signals and the Test Conditions).
3. Bus control conditions: Set the following conditions unless otherwise specified.
Y Input is 42 Pin (EXT-V IN),
C Input is 44 Pin (S-C IN)
(Video SW=1, C.Ext=1)
Other DAC except the above-mentioned conditions is all initial conditions.
4. Y Input condition: No signal unless otherwise specified.
(Sync is necessary to obtain synchronization).
5. How to calculate the demodulation ratio and angle:www.DataSheet4U.com
R-Y axis
B-Y axis angle = tan-1(B(0)/B(270))+270°
R-Y axis angle = tan-1(R(180)/R( 90))+90°
G-Y axis angle = tan-1(G(270)/G(180))+180°
90°
R(90)
R(180)
B(270)
180°
B(0)
0°
B-Y axis
G(180)
G(270)
B-Y axis amplitude Vb = SQRT(B(0)*B(0)+B(270)*B(270))
G-Y axis
R-Y axis amplitude Vr = SQRT(R(180)*R(180)+R(90)*R(90))
G-Y axis amplitude Vg = SQRT(G(180)*G(180)+G(270)*G(270))
270°
NoA0252-17/40
LA76810A
6. Chroma input signal:
As for the PAL signal, the burst swings such as 130° and 225° every one hour.
Chroma describes the phase caused when the burst occurs at 135°.
As for the NTSC signal, the burst occurs constantly at 180°.
The figures below are based on the phase of NTSC. When a PAL signal is generated, adjust the phase and then enter
signals.
The item common to both PAL and NTSC is the PAL signal. For those other than this, the measurement must be
performed for each individual signals.
The condition of fsc: Set the following conditions unless otherwise specified.
PAL = 4.433619MHz
NTSC = 3.579545MHz
C-1
40IRE
Burst
0°
fsc
90°
180°
270°
X IRE signal (L-X)
40IRE
C-2
Burst
62.5IRE
fsc 346°
40IRE
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C-3
Burst
fsc
CW
(Note: fsc±N*fh when the frequency is specified.
N should be a natural number and the nearest value should be used.)
C-4
C-5
Burst
Burst
B-Y only
R-Y only
NoA0252-18/40
LA76810A
[Chroma block]: PAL/NTSC common
Input signal
B-Y/Y amplitude
Symbol
CLRBY
Test point
Bout
ratio
21
Input signal
Test method
YIN:L77
Measure the Y system’s output level.
No signal
V1
C-2
Input a signal to the CIN (only sync signal to the
Bus bit/input signal
Color: 1000000
YIN) and measure the output level to calculate as
follows:
CLRBY = 100 × (V2/V1)+15%
Color control
C-1
CLRMN
21
characteristics 1
Measure the output amplitude V1 at color control
Color: 1111111
MAX mode and output amplitude V2 at color
Color: 1000000
control CEN mode and, calculate as follows:
CLRMN = V1/V2
Color control
C-1
CLRMM
Measure the output amplitude V3 at color control
21
Characteristics 2
Color: 0000000
MIN mode to calculate as follows:
CLRMM = 20log (V1/V3)
Color control
CLRSE
C-1
21
sensitivity
Measure the output amplitude V4 at color control
Color: 1011010
90 mode and output amplitude V5 at color control
Color: 0100110
38 mode to calculate
as follows:
CLRSE = 100 × (V4-V5)/(V2×52)
fsc output level
FSC37
Measure 4.43MHz output amplitude at pin 37.
37
Residual higher
E_CAR_B
21
harmonic level B
Residual higher
E_CAR_R
Rout
C-1
Measure the 8.86MHz component output
Burst only
amplitude at pin 21.
Burst only
Measure the 8.86MHz component output
amplitude at pin 19.
harmonic level R
21
Residual higher
E_CAR_G
Gout
C-1
harmonic level G
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Burst only
Measure the 8.86MHz component output
amplitude at pin 20.
21
[Chroma block]: PAL
Input signal
ACC amplitude
Symbol
ACCM1_P
Test point
Input signal
Test method
Bus bit/input signal
Bout
C-1
Measure the output amplitude when 0dB is
Color: 1000000
0dB
applied to the chroma input and the output
+6dB
amplitude when +6dB is applied to the chroma
characteristics 1
21
input and calculate the ratio between them.
ACCM1 = 20LOG (+6dBdata/0dBdata)
ACC amplitude
ACCM2_P
Bout
characteristics 2
C-1
Measure the output amplitude when –20dB is
-20dB
applied to the chroma input and calculate the
21
Color: 1000000
ratio between them.
ACCM2 = 20LOG (-20dBdata/0dBdata)
Demodulation
RB_P
output ratio
C-1
21
Refer to 5. and measure Bout output amplitude
Color: 1000000
Vb and ROUT output amplitude Vr. And calculate
R-Y/B-Y: PAL
RB = Vr/Vb.
19
Demodulation
output ratio
GB_P
C-4
21
G-Y/B-Y: PAL
Measure Bout output amplitude Vbp and GOUT
Color: 1000000
output amplitude Vgbp. And calculate GB_P =
Vgb-p/Vb-p.
19
Continued on next page.
NoA0252-19/40
LA76810A
Continued from preceding page.
Input signal
Demodulation
Symbol
Test point
GR_P
Input signal
C-5
output ratio
Test method
Measure Rout output amplitude Vrp and GOUT
20
Bus bit/input signal
Color: 1000000
output amplitude Vgbp. And calculate GR_P =
G-Y/R-Y: PAL
Vgrp/Vrp.
19
Demodulation
ANGBR_P
C-1
angle B-Y/R-Y:
Refer to 5. and measure the B-Y and R-Y
21
Color: 1000000
demodulation angle and calculate.
PAL
19
APC pull-in range (+)
PULIN+_P
C-1
Decrease the chroma fsc frequency from
21
4.433619MHz+1000Hz and measure the
frequency at which the VCO locks.
APC pull-in range (-)
PULIN-_P
C-1
Increase the chroma fsc frequency from
21
4.433619MHz-1000Hz and measure the
frequency at which the VCO locks.
[Chroma block]: NTSC
Input signal
ACC amplitude
Symbol
ACCM1_N
Test point
Input signal
Test method
Bout
C-1
Measure the output amplitude when 0dB is
0dB
applied to the chroma input and the output
+6dB
amplitude when +6dB is applied to the chroma
characteristics 1
21
Bus bit/input signal
input and calculate the ratio between them.
ACCM1 = 20LOG (+6dBdata/0dBdata)
ACC amplitude
ACCM2_N
Bout
characteristics 2
C-1
Measure the output amplitude when 20dB is
-20dB
applied to the chroma input and calculate the
21
ratio between them.
ACCM2 = 20LOG (-20dBdata/0dBdata)
R-Y/B-Y: NTSC
RB_N
Demodulation
C-1
21
5. and measure Bout output amplitude
Color: 1000000
Vb and ROUT output amplitude Vr. And calculate
output ratio
RB = Vr/Vb.
R-Y/B-Y: NTSC
G-Y/B-Y: NTSC
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Refer to
19
GB_N
C-1
20
Demodulation
Refer to 5. and measure GOUT output amplitude
Color: 1000000
Vg. And calculate GB_N = Vg/Vb.
output ratio
R-Y/B-Y: NTSC
Demodulation
ANGBR_N
angle B-Y/R-Y:
C-1
21
Refer to 5. and measure the B-Y and R-Y
Color: 1000000
demodulation angle and calculate.
NTSC
Reference: B-Y angle
19
Demodulation
ANGGB_N
angle G-Y/B-Y:
C-1
21
Refer to 5. and measure the B-Y and G-Y
Color: 1000000
demodulation angle and calculate.
NTSC
Reference: B-Y angle
20
Killer operating
KILL_N
C-1
21
point
Reduce the input signal until the output level
becomes 150mVp-p or less. Measure
the input level at that moment.
APC pull-in range (+)
PULIN+_N
C-1
21
Decrease the chroma fsc frequency from
3.579545MHz+1000Hz and measure the
frequency at which the VCO locks.
APC pull-in range (-)
PULIN-_N
C-1
21
Increase the chroma fsc frequency from
3.579545MHz-1000Hz and measure the
frequency at which the VCO locks.
Tint center
TINCEN
C-1
21
Measure each part of the output level and
TINT: 1000000
calculate the B-Y axis angle.
Continued on next page.
NoA0252-20/40
LA76810A
Continued from preceding page.
Input signal
Symbol
Tint variable range (+)
TINT+
Test point
Input signal
C-1
21
Test method
Bus bit/input signal
Measure each part of the output level and
TINT
calculate the B-Y axis angle.
1111111
TINT+ = B-Y axis angle -TINCEN
Tint variable range (-)
TINT-
C-1
21
Measure each part of the output level and
TINT
calculate the B-Y axis angle.
0000000
TINT- = B-Y axis angle -TINCEN
[Filter Block Chroma BPF Characteristic]
Input signal
Symbol
C-BPF1A
CBPF1A
Test point
21
Peaker amplitude
Input signal
Test method
Bus bit/input signal
C-3
Set the chroma frequency (CW) to
FILTER SYS = 0010
PAL signal
4.433619MHz-100kHz and measure V0 output
C.BYPASS = 0
characteristic
amplitude. And then, set the chroma frequency
3.93MHz
(CW) to 3.93MHz and measure V1 output
amplitude to calculate as follows:
CBPF1A = 20LOG (V1/V0)
C-BPF1B
CBPF1B
21
Peaker amplitude
C-3
Measure V2 output amplitude when the chroma
FILTER SYS = 0010
PAL signal
frequency (CW) is 4.13MHz and V3 output
C.BYPASS = 0
characteristic
amplitude when it (CW) is 4.73MHz to calculate
4.73/4.13MHz
as follows:
CBPF1B = 20LOG (V3/V2)
C-BPF1C
CBPF1C
21
Peaker amplitude
C-3
Set the chroma frequency (CW) to 4.93MHz and
FILTER SYS = 0010
PAL signal
measure V4 output amplitude to calculate as
C.BYPASS = 0
characteristic
follows:
4.93/3.93MHz
C-BPF2A
CBPF1C = 20LOG (V4/V1)
CBPF2A
21
BandPass
C-3
Set the chroma frequency (CW) to
FILTER SYS = 0011
PAL signal
4.433619MHz-100MHz and measure V00 output
C.BYPASS = 0
amplitude
amplitude. And then, set the chroma frequency
characteristic
(CW) to 3.93MHz and measure V10 output
3.93MHz
amplitude to calculate as follows:
CBPF2A = 20LOG (V10/V00)
C-BPF2B
CBPF2B
C-3
21
BandPass
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PAL signal
Measure V20 output amplitude when the chroma
FILTER SYS = 0011
frequency (CW) is 4.13MHz and V30 output
C.BYPASS = 0
amplitude
amplitude when it (CW) is 4.73MHz to calculate
characteristic
as follows:
4.73/4.13MHz
C-BPF2C
BandPass
CBPF2B = 20LOG (V30/V20)
CBPF2C
21
C-3
Set the chroma frequency (CW) to 4.93MHz and
FILTER SYS = 0011
PAL signal
measure V40 output amplitude to calculate as
C.BYPASS = 0
amplitude
follows:
characteristic
CBPF2C = 20LOG (V40/V10)
4.93/3.93MHz
NoA0252-21/40
LA76810A
Deflection Block
Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. VIF, SIF blocks: No signal
2. C input: No. signal
3. Sync input: A horizontal/vertical composite sync signal
PAL: 43IRE, horizontal sync signal (15.625kHz) and vertical sync signal (50kHz)
NTSC: 40IRE, horizontal sync signal (15.734264kHz) and vertical sync signal (59.94kHz)
Note: No burst signal, chroma signal shall exist below the pedestal level.
Signal unsuitable
for Y input
Signal suitable
for Y input
Chroma signal
Burst signal
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4. Bus control conditions: Initial conditions unless otherwise
specified.
5. The delay time from the rise of the horizontal output (pin 27 output) to the fall of the FBP IN (pin 28 input) is 9µs.
6. Pin 13 (vertical size correction circuit input terminal) is connected to VCC (5.0V).
NoA0252-22/40
LA76810A
Deflection Block
Test Conditions
Input signal
Symbol
Horizontal free-running
fH
frequency
Test point
27
Input signal
Test method
Bus bit/input signal
Y IN:
Connect a frequency counter to the output of pin
No signal
27 (H out) and measure the horizontal
free-running frequency.
Horizontal pull-in range
fH PULL
42
YIN:
Using an oscilloscope, monitor the horizontal
Horizontal/
sync signal which is input to the Y IN (pin 42) and
vertical sync
the pin 27 output (H out) and vary the horizontal
signal
signal frequency to measure the pull-in range.
PAL
Horizontal output
Hduty
27
pulse length
Y IN:
Measure the voltage for the pin 27 horizontal
Horizontal/
output pulse’s low-level period.
vertical sync
signal
PAL
Horizontal output pulse
V Hsat
27
saturation voltage
Y IN:
Measure the voltage for the pin 27 horizontal
Horizontal/
output pulse’s low-level period.
vertical sync
signal
PAL
Vertical free-running
VFR50
period 50 (PAL)
VFR60
23
Y IN:
Measure the vertical output period T at pin 18
CDMODE: 001
No signal
T×15.625kHz (PAL)
(PAL)
T×15.734kHz (NTSC)
CDMODE: 002
Vertical free-running
period 60 (NTSC)
(NTSC)
Vertical output
2.5V
T
Horizontal output pulse
HPHCEN
(PAL)
Y IN:
27
(NTSC)
42
Measure the delay time from to the rise of the pin
Horizontal/
27 horizontal output pulse to the fall of the Y IN
vertical sync
horizontal sync signal.
www.DataSheet4U.com
signal
PAL
HPHCEN
NTSC
20IRE
2.5V
Horizontal output
Horizontal position
adjustment range
HPHrange
27
42
Y IN:
With H PHASE: 0 and 31, measure the delay time
H PHASE: 00000
Horizontal/
from the rise of the pin 27 horizontal output pulse
H PHASE: 11111
vertical sync
to the fall of the Y IN horizontal sync signal and
signal
calculate the difference from H PHCEN.
PAL
Measuring
HPHCEN
20IRE
2.5V
Horizontal output
Continued on next page.
NoA0252-23/40
LA76810A
Continued from preceding page.
Input signal
Horizontal position
Symbol
Test point
HPHstep
27
adjustment maximum
variable width
42
Input signal
Test method
Bus bit/input signal
Y IN:
With H PHASE: 0 to 31 varied, measure the delay
H PHASE: 00000
Horizontal/
time from to the rise of the pin 27 horizontal
to
vertical sync
output pulse to the fall of the Y IN horizontal sync
H PHASE: 11111
signal
signal and calculate the variation at each step.
PAL
Retrieve data for maximum variation.
Measuring
HPHCEN
20IRE
Horizontal output
POR circuit operating
VPOR
voltage
Horizontal blanking
25
BLKL0
21
left variable range@0
42
Y IN:
Connect a DC power supply in place of the
Horizontal/
current source to pin 25 and gradually decrease
vertical sync
the voltage from 5.0V until the BUS READ
signal
TATUS [POR][STATUS1 (DA01) becomes "1".
PAL
Measure the DC voltage at pin 25 at the moment.
Y IN:
Measure the time T from the left end of Hsync at
Horizontal/
pin 42 Y IN to the left end of blanking at pin 21
vertical sync
BlueOUT with BLKL = 000.
signal
Y IN
PAL
Hsync
BLKL: 000
T
Blue
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Horizontal blanking
left variable range@7
BLKL7
21
Y IN:
Measure the time T from the left end of Hsync at
Horizontal/
pin 42 Y IN to the left end of blanking at pin 21
vertical sync
BlueOUT with BLKL = 111.
signal
42
PAL
Y IN
Hsync
BLKL: 111
T
Blue
Continued on next page.
NoA0252-24/40
LA76810A
Continued from preceding page.
Input signal
Horizontal blanking
Symbol
BLKR0
right variable range@0
Test point
21
42
Input signal
Test method
Bus bit/input signal
Y IN:
Measure the time T from the left end of Hsync at
Horizontal/
pin 42 Y IN to the left end of blanking at pin 21
vertical sync
BlueOUT with BLKR = 000.
Y IN
signal
T
BLKR: 000
Hsync
PAL
Blue
Horizontal blanking
BLKR7
right variable range@7
21
42
Y IN:
Measure the time T from the left end of Hsync at
Horizontal/
pin 42 Y IN to the left end of blanking at pin 21
vertical sync
BlueOUT with BLKR = 111.
signal
Y IN
T
BLKR: 111
Hsync
PAL
Blue
Sand castle pulse crest
SANDH
value H
28
Y IN:
Measure the supply voltage at point H of the pin
Horizontal/
28 FBP IN wave form for Hsync period.
H
vertical sync
signal
PAL
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Sand castle pulse crest
SANDM1
28
value M1
Y IN:
Measure the supply voltage at point M1 of the pin
Horizontal/
28 FBP IN wave form for Hsync period.
vertical sync
M1
signal
PAL
Sand castle pulse crest
SANDL
28
value L
Y IN:
Measure the supply voltage at point L of the pin
Horizontal/
28 FBP IN wave form for Hsync period.
vertical sync
signal
PAL
L
Sand castle pulse crest
SANDM2
28
value M2
Y IN:
Measure the supply voltage at point M2 of the pin
Horizontal/
28 FBP IN wave form for Vsync period.
vertical sync
signal
PAL
Burst gate pulse length
BGPWD
28
L
Y IN:
Measure the BGP width T of the pin 28 FBP IN
Horizontal/
wave form for Hsync period.
vertical sync
signal
T
PAL
Continued on next page.
NoA0252-25/40
LA76810A
Continued from preceding page.
Input signal
Burst gate pulse
Symbol
BGPPH
I phase
Test point
28
42
Input signal
Test method
Bus bit/input signal
Y IN:
Measure the time from the left end of Hsync at
Horizontal/
pin 42 Y IN to the left end of the pin 28 FBP IN
vertical sync
wave form for Hsync period.
signal
PAL
Hsync
Y IN
T
FB PIN
SECAM V pulse length
SECAMV
28
Y IN:
Measure the SECAM V pulse length T of the pin
Horizontal/v
28 FBPIN wave form.
ertical sync
Calculate as:
signal
T(s) ×15.625kHz
PAL
T
<Vertical screen size correction>
Vertical ramp output
Vspal64
Amplitude
Vsnt64
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 24 and line 310.
PAL@64
vertical sync
Calculate as follows:
NTSC@64
signal www.DataSheet4U.com
Vspal64 = Vline310-Vline24
23
PAL
Vsnt64 = Vline262-Vline22
NTSC
Vertical ramp output
Line 310
Line 24
Vertical ramp output
Vspal0
amplitude PAL@0
23
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 24 and line 310
vertical sync
Calculate as follows:
signal
Vspal0 = Vline310-Vline24
VSIZE: 0000000
PAL
Vertical ramp output
Line 310
Line 24
Vertical ramp output
Vspal127
amplitude PAL@127
23
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 24 and line 310
vertical sync
Calculate as follows:
signal
Vspal27 = Vline310-Vline24
VSIZE: 1111111
PAL
Vertical ramp output
Line 310
Line 24
Continued on next page.
NoA0252-26/40
LA76810A
Continued from preceding page.
Input signal
Symbol
Test point
Input signal
Test method
Bus bit/input signal
<High-voltage dependent vertical size correction>
Vertical size
Vsizecomp
correction@0
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at the line 24 and line 310
vertical sync
with VCOMP = 000. Calculate as follows:
signal
Va = Vline310-Vline24
PAL
Apply 4.1V to pin 13 and measure the voltage at
VCOMP: 000
the line 24 and line 310 again. Calculate as
follows:
Va = Vline310-Vline24
Calculate as follows:
Vsizecomp = Vb/Va
Vertical ramp output
Line 310
Line 24
<Vertical screen position adjustment>
Vertical ramp DC
Vdcpal32
voltage
Vdcnt32
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 167. (PAL)
PAL@32
vertical sync
Monitor the pin 23 vertical ramp output and
NTSC@32
signal
measure the voltage at line 142. (NTSC)
23
PAL
Vertical ramp output
NTSC
Line 167
Vertical ramp DC
Vdcpal0
voltage
Y IN:
23
PAL@0
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Horizontal/
Monitor the pin 23 vertical ramp output and
VDC: 000000
measure the voltage at line 167.
vertical sync
signal
Vertical ramp output
PAL
Line 167
Vertical ramp DC
Y IN:
Monitor the pin 23 vertical ramp output and
voltage
Vdcpal63
Horizontal/
measure the voltage at line 167.
PAL@63
vertical sync
signal
23
VDC: 111111
Vertical ramp output
PAL
Line 167
Continued on next page.
NoA0252-27/40
LA76810A
Continued from preceding page.
Input signal
Vertical linearity@16
Symbol
Test point
Vlin16
23
Input signal
Test method
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 24, line 167 and 310.
vertical sync
Assign the respective measured values to Va, Vb
signal
and Vc. Calculate as follows:
PAL
Vlin16 = (Vb-Va)/(Vc-Vb)
Vertical
t t
ramp
Bus bit/input signal
Line 310
Line 167
Line 24
Vertical linearity@0
Vlin0
23
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 24, line 167 and 310.
vertical sync
Assign the respective measured values to Va, Vb
signal
and Vc. Calculate as follows:
PAL
Vlin0 = (Vb-Va)/(Vc-Vb)
Vertical
t t
ramp
VLIN: 00000
Line 310
Line 167
Line 24
Vertical linearity@31
Vlin31
23
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 24, line 167 and 310.
vertical sync
Assign the respective measured values to Va, Vb
signal
and Vc. Calculate as follows:
PAL
VLIN: 11111
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Vlin31 = (Vb-Va)/(Vc-Vb)
Vertical
t t
ramp
Line 310
Line 167
Line 24
Continued on next page.
NoA0252-28/40
LA76810A
Continued from preceding page.
Input signal
Symbol
Vertical S-shaped
VScor16
Test point
15
correction @16
Input signal
Test method
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at line 36, line 60, line 155,
vertical sync
line 179, line 274 and 298. Assign the
signal
respective measured values to Va, Vb, Vc, Vd,
PAL
Ve and Vf. Calculate as follows:
Bus bit/input signal
VS: 10000
VScor16 = 0.5((Vb-Va)+(Vf-Ve))/(Vd-Vc)
Line 298
Vertical ramp output
Line 179
Line 60
Line 274
Line 155
Line 36
Vertical S-shaped
VScor0
correction @0
23
Y IN:
Monitor the pin 23 vertical ramp output and
Horizontal/
measure the voltage at the line 36, line 60, line
vertical sync
155, line 179, line 274 and line 298
signal
with VSC = 00000.
PAL
Assign the respective measured values to Va, Vb,
Vc, Vd, Ve and Vf. Calculate as follows:
VScor0 = 0.5((Vb-Va)+(Vf-Ve))/(Vd-Vc)
Line 298
Vertical ramp output
Line 179
Line 60
Line 274
Line 155
Line 36
Vertical S-shaped
correction @31
VScor31
Y IN:
23
Monitor the pin 23 vertical ramp output and
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Horizontal/
measure the voltage at line 36, line 60, line 155,
vertical sync
line 179, line 274 and 298. Assign the
signal
respective measured values to Va, Vb, Vc, Vd,
PAL
Ve and Vf. Calculate as follows:
VSC: 11111
VScor16 = 0.5((Vb-Va)+(Vf-Ve))/(Vd-Vc)
Line 298
Vertical ramp output
Line 179
Line 60
Line 274
Line 155
Line 36
NoA0252-29/40
LA76810A
Control Register Bit Allocation Map
Control Register Bit Allocations
Sub Address
MSB
DATA BITS
DA0
00000000
T.Disable
DA1
AFC
gain&gate
1
00001
H BLK SW
Sync.Kill
VSEPUP
Gray Mode
H BLK R&L
00110
V.TEST
01000
G.BIAS
01001
B.BIAS
Drive.Test
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
1
V.KILL
0
0
Blank.Def
0
*
*
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
www.DataSheet4U.com
1
1
0
0
0
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Contrast
1
0
1
Blk.Str.Deff
Coring
10010
Tint.Test
10011
Color.Test
10100
Video SW
OSD Contrast
1
Sharpness
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
Tint
0
Color
(Trap.Test)
0
1
AKB B/W
AKB Def
0
0
*
FBPBLK.SW
(0)
1
AKB Test
0
0
G.DRIVE
Bright
10001
10111
1
RG γ Def
Sub.Bright
OSD
Cnt.Test
10110
1
B.DRIVE
10000
10101
COUNT.DOWN.MODE
0
B γ Select
(0)
0
0
R.DRIVE
(0)
01111
V.LIN
0
V.COMP
0
01110
1
V.SC
(0)
01101
H.PAHSE
V.POSI
Cross B/W
0
*
1
0
(0)
01100
1
0
0
01011
1
1
0
*
1
V.SIZE
0
01010
1
H.FREQ
0
0
R.BIAS
DA7
Video.Mute
1
00111
DA6
0
0
00101
DA5
Audio.Mute
0
00100
DA4
1
0
00011
DA3
0
0
00010
DA2
LSB
Filter.Sys
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
C.Temp.R
1
C.TEMP.G
1
C.TEMP.B
0
1
Continued on next page.
NoA0252-30/40
LA76810A
Continued from preceding page.
Sub Address
00011000
11001
MSB
DATA BITS
DA0
DA1
DA2
DA3
DA4
Auto.Flesh
C.Ext
C.Bypass
C_Kill ON
C_Kill OFF
0
0
1
0
0
Cont.Test
Digital OSD
Brt.Abl.Def
Mid.Stp.Def
Emg.Abl.Def
0
0
0
0
11010
R-Y/B-Y Gain Balance
11011
SECAM B-Y DC Level (White-Balance )
1
1
11100
11101
11110
11111
Audio SW
DA6
DA7
0
0
1
0
0
0
0
0
Color.Sys
0
Bright.Abl.Threshold
0
R-Y/B-Y Angle
0
0
0
0
1
SECAM R-Y DC Level (White-Balance )
0
0
1
0
0
0
0
0
0
0
0
0
0
0
Volume
0
0
FM.Test
VOL.FIL
0
0
1
FM.Mute
deem.TC
VIF.Sys.SW
0
0
0
RF.AGC
VIDEO.LEVEL
1
LSB
DA5
0
SIF.Sys.SW
1
0
0
FM.Gain
IF.AGC
0
1
0
0
0
0
0
0
FM.LEVEL
0
0
1
Status Register Bit Allocations
MSB
DATA BITS
LSB
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
Status1
(X.Ray)
POR
IF.Ident
RF.AGC
IF.LOCK
V.TRI
50/60
ST/NONST
*
*
*
*
*
*
*
Status2
H.Lock
*
*
*
*
(AKB)
R
*
G
B
(0)
Color.Sys
*
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NoA0252-31/40
LA76810A
Control Register Truth Table
Register Name
0 HEX
1 HEX
T.Disable
Tset Enable
Test Disable
AFC gain&gate
Auto (Gain)
Gain:Fast
Auto (Gate)
Non-Gate
H BLK SW
Right Control
Left Control
Audio.Mute
Active
Mute
Video.Mute
Active
Mute
Sync.Kill
Sync active
Sync killed
Vsepup
normal
Vsepup
V.KILL
Vrt active
Vrt killed
2 HEX
3 HEX
Gray Mode
Normal
Gray OSD
Cross B/W
Normal
Black
White
Cross
Vertical Test
Normal
Vrt S Corr
Vrt Lin
Vrt Size
Drive.Test
Normal
Test Mode
B Gamma Select
B Gamma on
B Gamma on
B Gamma on
B Gamma off
85% (same as R,G)
90%
95%
R/G Gamma. Def
Gamma
Linear
Blank.Def
Blanking
No Blank
OSD Cnt.Test
Normal
Test Mode
Blk.Str.Deff
Blk Str On
Blk Str Off
Coring
Core Off
Core On
Tint.Test
Normal
Test Mode
Color.Test
Normal
Test Mode
Video.SW
Internal Mode
External Mode
(AKB B/W)
AKB Black
AKB White
(AKB Def)
AKB On
AKB Off
FBPBLK.SW
FBP not or
FBP or
(AKB Test)
Normal
Test Mode1
Auto.Flesh
AF Off
AF On
C.Ext
Internal Mode
External Mode
C.Bypass
Bypass OFF
Bypass ON
C_Kill ON
Auto Mode
Killer ON
C_Kill OFF
Auto Mode
Killer OFF
Cont.Test
Normal
Test Mode
Emg.Abl.Def
Emg On
Emg Off
Brt.Abl.Def
Brt ABL On
Brt ABL Off
Mid.Stp.Def
Mid Stp On
Mid Stp Off
Audio.SW
Internal Mode
External Mode
FM.Test
Normal
Test Mode
VOL.FIL
Normal
Filte OFF
FM.Mute
Active
Mute
de-em TC.
50µs
75µs
VIF.Sys.SW
38.0MHz
SIF.Sys.SW
4.5MHz
FM Gain (@1000mVrms)
50kHz dev.
25kHz dev
IF.AGC
AGC active
AGC defeat
Test Mode2
Test Mode3
38.9MHz
45.75MHz
39.5MHz
5.5MHz
6.0MHz
6.5MHz
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NoA0252-32/40
LA76810A
Control Register Truth Table
COUNT DOWN MODE
50Hz/60Hz MODE
Standard/Non-Standard MODE
0 HEX
Auto
Auto
1 HEX
50Hz
Auto
2 HEX
60Hz
Auto
3 HEX
Auto
Auto
4 HEX
Auto
Non-Standard
5 HEX
50Hz
Non-Standard
6 HEX
60Hz
Non-Standard
7 HEX
Auto
Non-Standard
Color System
0 HEX
Auto Mode1 PAL/NTSC/4.43NTSC(/SECAM)
1 HEX
Auto Mode2 PAL-M/PAL-N/NTSC
2 HEX
PAL
3 HEX
PAL-M
4 HEX
PAL-N
5 HEX
NTSC
6 HEX
4.43NTSC
7 HEX
SECAM
Filter System
Y Filter
Chroma Filter
0 HEX
3.58MHz Trap
Peaked 3.58MHz BPF
1 HEX
3.58MHz Trap
Symmetrical 3.58MHz BPF
2 HEX
4.43MHz Trap
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Peaked 4.43MHz BPF
3 HEX
4.43MHz Trap
4 HEX
No Trap (Wide Band mode)
Symmetrical 4.43MHz BPF
Peaked 3.58MHz BPF
5 HEX
No Trap (Wide Band mode)
Symmetrical 3.58MHz BPF
6 HEX
No Trap (Wide Band mode)
Peaked 4.43MHz BPF
7 HEX
No Trap (Wide Band mode)
Symmetrical 4.43MHz BPF
8-15HEX
4.286MHz Trap
Symmetrical 4.43MHz BPF
NoA0252-33/40
LA76810A
Initial Conditions
Initial Test Conditions
Initial Test Conditions (continued)
Register
Register
ON/OFF(T.Disable)
1 HEX
OSD Cnt.Test
0 HEX
AFC gain&gate
0 HEX
OSD Contrast
0 HEX
H.FREQ
3F HEX
Blk.Str.Deff
1 HEX
H BLK SW
0 HEX
Coring
1 HEX
Audio.Mute
0 HEX
Sharpness
00 HEX
Video.Mute
0 HEX
Tint.Test
0 HEX
H.PHASE
10 HEX
Tint
40 HEX
Sync.Kill
0 HEX
Color.Test
0 HEX
V.SIZE
40 HEX
Color
40 HEX
VSEPUP
0 HEX
Video.SW
0 HEX
V.KILL
0 HEX
(Trap.Test)
4 HEX
V.POSI
20 HEX
Filter.Sys
0 HEX
Gray Mode
0 HEX
AKB B/W
0 HEX
Cross B/W
0 HEX
AKB Def
0 HEX
V.LIN
10 HEX
C.Temp.R
20 HEX
H BLK R&L
4 HEX
FBPBLK.SW
1 HEX
V.SC
00 HEX
C.Temp.G
20 HEX
V.TEST
0 HEX
AKB Test
0 HEX
V.COMP
7 HEX
C.Temp.B
20 HEX
COUNT.DOWN.MODE
0 HEX
Auto.Flesh
0 HEX
R.BIAS
00 HEX
C.Ext
0 HEX
G.BIAS
00 HEX
C.Bypass
1 HEX
B.BIAS
00 HEX
C_Kill ON
0 HEX
R.DRIVE
7F HEX
C_Kill OFF
0 HEX
Drive.Test
0 HEX
Color Sys
0 HEX
B Gamma Select
0 HEX
Cont.Test
0 HEX
R/G Gamma.Def
1 HEX
Digitsl OSD
0 HEX
G.DRIVE
8 HEX
Bright.Abl.Threshold
4 HEX
B.DRIVE
7F HEX
Emg.Abl.Def
0 HEX
Blank.Def
0 HEX
Brt.Abl.Def
0 HEX
Sub.Bright
40 HEX
Mid.Stp.Def
0 HEX
Bright
40 HEX
R-Y/B-Y Gain Balance
8 HEX
Contrast
40 HEX
R-Y/B-Y Angle
8 HEX
SECAM B-Y DC Level
8 HEX
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SECAM R-Y DC Level
8 HEX
Audio.SW
0 HEX
Volume
00 HEX
FM.Test
0 HEX
VOL.FIL
0 HEX
RF.AGC
20 HEX
FM.Mute
0HEX
deem.TC
0HEX
VIF.Sys.SW
1 HEX
SIF.Sys.SW
1 HEX
FM.Gain
0 HEX
IF.AGC
0 HEX
VIDEO.LEVEL
4 HEX
FM.LEVEL
10 HEX
NoA0252-34/40
LA76810A
Control Register Descriptions
Register Name
Bits
General Description
T Disable
1
Disable the Test SW & enable Audio/Video Mute SW
AFC Gain & gate
1
Select horizontal first loop gain & H-sync gating on/off
H Freq.
6
Align ES Sample horizontal frequency
H.BLK.SW
1
Blanking Control
Audio Mute
1
Disable audio outputs
Video Mute
1
Disable video outputs
H PHASE
5
Align sync to flyback phase
Sync Kill
1
Force free-run mode
Vertical Size
7
Align vertical amplitude
Vsep.up
1
Select vertical sync. separation sensitivity
Vertical Kill
1
Disable vertical output
V POSI ( Vertical DC )
6
Align vertical DC bias
Gray Mode
1
OSD Gray Tone Enable
Cross B/W
2
Service Test Mode ( normal/Black/White/Cross)
V LIN ( Vertical Linearity )
5
Align vertical linearity
(Right/Left)
H BLK R&L
3
H-Blanking Control ( Width/Phase )
Vertical S-Correction
5
Align vertical S-correction
Vertical Test
2
Select vertical DAC test modes
Vertical Size Compensation
3
Align vertical size compensation
Count Down Mode
3
Select vertical countdown mode
Red Bias
8
Align Red OUT DC level
Green Bias
8
Align Green OUT DC level
Blue Bias
8
Align Blue OUT DC level
Red Drive
7
Align Red OUT AC level
Drive Test
1
Enable Drive control DAC test modes
B Gamma Select
2 www.DataSheet4U.com
Select Blue Gamma Gain
R/G Gamma Defeat
1
Disable R/G Gamma Correction
Green Drive
4
Align Green OUT AC level
Blue Drive
7
Align Blue OUT AC level
Blank Def
1
Disable RGB output blanking
Sub Brightness
7
Align common RGB DC level
Brightness Control
7
Customer brightness control
Contrast Control
7
Customer contrast control
OSD Contrast Test
1
Enable OSD Contrast DAC test mode
OSD Contrast Control
7
Align OSD AC level
Blk Str Def
1
Disable black stretch
Coring Enable
1
Enable luminance coring
Sharpness Control
6
Customer sharpness control
Tint Test
1
Enable tint DAC test mode
Tint Control
7
Customer tint control
Color Test
1
Enable color DAC test mode
Color Control
7
Customer color control
Video SW
1
Select Video source
Trap.Test
3
Trap Test
Filter System
4
Select Y/C Filter mode
(AKB B/W)
1
Select AKB Black or White
(AKB Def)
1
Disable AKB circuits
Continued on next page.
NoA0252-35/40
LA76810A
Continued from preceding page.
Control Register Descriptions
Register Name
Bits
General Description
C Temp R
6
Align AKB color temperature
FBPBLK.SW
1
Enable RGB Blanking or FBP
C Temp G
6
Align AKB color temperature
(AKB Test)
2
Enable AKB C Temp. DAC test mode
C Temp B
6
Align AKB color temperature
AutoFlesh
1
Enable AutoFlesh function
C Ext
1
Selected-C In SW on
C Bypass
1
Select Chroma BPF bypass
C Kill On
1
C Kill Mode ( 1: Enable Killer circuit )
C Kill Off
1
Disable Killer circuit
Color System
3
Select Color System
Cont Test
1
Enable contrast DAC test mode
Bright ABL Threshold
3
Align brightness ABL threshold
Emergency ABL Defeat
1
Disable emergency brightness ABL
Bright ABL Defeat
1
Disable brightness ABL
Bright Mid Stop Defeat
1
Disable brightness mid stop
R-Y/B-Y Balance
4
R-Y/B-Y Gain Balance
R-Y/B-Y Angle
4
R-Y/B-Y Angle
SECAM B-Y DC Level
4
SECAM B-Y DC Level ( White-Balance )
SECAM R-Y DC Level
4
SECAM R-Y DC Level ( White-Balance )
Audio SW
1
Select Audio source
Volume Control
7
Customer volume control
FM.Test
1
FM.Test
Volume Filter Defeat
1
Disable volume DAC filter
RF AGC Delay
6
Align RF AGC threshold
FM Mute
1
Disable FM outputs
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de-em TC.
1
Select de-emphasis Time Constant
VIF System SW
2
Select 38.0/38.9/39.5/45.75
SIF System SW
2
Select 4.5/5.5/6.0/6.5
FM Gain
1
Select FM Output Level
IF AGC Defeat
1
Disable IF and RF AGC
Video Level
3
Align IF video level
FM Level
5
Align WBA output level
NoA0252-36/40
LA76810A
Pin Assignment
PIN
FUNCTION
PIN
FUNCTION
1
Audio Output
54
SIF Input
2
FM Output
53
SIF APC Filter
3
PIF AGC
52
SIF Output
4
RF AGC Output
51
Ext. Audio Input
5
PIF Input1
50
APC Filter
6
PIF Input2
49
VCO Coil 1
7
IF Ground
48
VCO Coil 2
8
IF VCC
47
VCO Filter
9
FM Filter
46
Video Output
10
AFT Output
45
Black Level Detector
11
Bus Data
44
Internal Video Input (S-C IN)
12
Bus Clock
43
Video/Vertical VCC
13
ABL
42
External Video Input (Y IN)
14
Red Input
41
Video/Vertical/BUS Ground
15
Green Input
40
Selected Video Output
16
Blue Input
39
Chroma APC1 Filter
17
Fast Blanking Input
38
4.43MHz Crystal
fsc (4.43MHz) Output
18
RGB VCC
37
19
Red Output
36
ACC Filter
20
Green Output
35
SECAM R-Y Input
21
Blue Output
34
SECAM B-Y Input
22
Sync Sep Output
33
CCD/Horizontal Ground
23
Vertical Output
32
CCD Filter
24
Ramp ALC Filter
31
CCD VCC
25
Horizontal/BUS VCC
30
Clock (4MHz) Output
26
Horizontal AFC Filter
www.DataSheet4U.com
29
VCO IREF
27
Horizontal Output
28
Flyback Pulse Input
NoA0252-37/40
LA76810A
BUS DATA
TR
BIT
INTIAL
MAX
T.Disable
Register
0
1
1
1
MIN
0
AFC gain&gate
0
1
0
1
0
H.FREQ
0
6
63
63
0
H BLK SW
1
1
0
1
0
Audio.Mute
1
1
0
1
0
Video.Mute
1
1
0
1
0
H.PHASE
1
5
16
31
0
Sync.Kill
2
1
0
1
0
V.SIZE
2
7
64
127
0
VSEPUP
3
1
0
1
0
V.KILL
3
1
0
1
0
V.POSI
3
6
32
63
0
Gray.Mode
4
1
0
1
0
Cross B/W
4
2
0
3
0
V.LIN
4
5
16
31
0
H BLK R&L
5
3
4
7
0
V.SC
5
5
0
31
0
V.TEST
6
2
0
3
0
V.COMP
6
3
7
7
0
COUNT.DOWN.MODE
6
3
0
7
0
R.BIAS
7
8
0
255
0
G.BIAS
8
8
0
255
0
B.BIAS
9
8
0
255
0
R.DRIVE
10
7
127
127
0
Drive.Test
11
1
0
1
0
B Gammma.Sel
11
0
3
0
RG.Gamma.Def
11
1
1
1
0
G.DRIVE
11
4
8
15
0
B.DRIVE
12
7
127
127
0
Blank.Def
13
1
0
1
0
Sub.Bright
13
7
64
127
0
Bright
14
7
64
127
0
Contrast
15
7
64
127
0
OSD Cnt.Test
16
1
0
1
0
2
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OSD Contrast
16
7
64
127
0
Blk.Str.Deff
17
1
1
1
0
Coring
17
1
1
1
0
Sharpness
17
6
0
63
0
Tint.Test
18
1
0
1
0
Tint
18
7
64
127
0
Color.Test
19
1
0
1
0
Color
19
7
64
127
0
Video.SW
20
1
0
1
0
Trap.Test
20
3
4
7
0
Filter.Sys
20
4
2
15
0
(AKB B/W)
21
1
0
1
0
(AKB Def)
21
1
0
1
0
C.Temp.R
21
6
32
63
0
FBPBLK.SW
22
1
1
1
0
C.Temp.G
22
6
32
63
0
(AKB Test)
23
2
0
3
0
C.Temp.B
23
6
32
63
0
Continued on next page.
NoA0252-38/40
LA76810A
Continued from preceding page.
Register
Auto.Flesh
TR
BIT
INTIAL
MAX
MIN
24
1
0
1
0
C.Ext
24
1
0
1
0
C.Bypass
24
1
1
1
0
C_Kill ON
24
1
0
1
0
C_Kill OFF
24
1
0
1
0
Color.Sys
24
3
0
7
0
Cont.Test
25
1
0
1
0
Bright.Abl.Threshold
25
3
4
7
0
Emg.Abl.Def
25
1
0
1
0
Brt.Abl.Def
25
1
0
1
0
Mid.Stp.Def
25
1
0
1
0
R-Y/B-Y Gain Balance
26
4
8
15
0
R-Y/B-Y Angle
26
4
8
15
0
SECAM B-Y DC Level
27
4
8
15
0
SECAM R-Y DC Level
27
4
8
15
0
Audio.SW
28
1
0
1
0
Volume
28
7
0
127
0
FM.TEST
29
1
0
1
0
VOL.FIL
29
1
0
1
0
RF.AGC
29
6
32
63
0
FM.Mute
30
1
0
1
0
deem.TC
30
1
0
1
0
VIF.Sys.SW
30
2
1
3
0
SIF.Sys.SW
30
2
1
3
0
FM.Gain
30
1
0
1
0
IF.AGC
30
1
0
1
0
VIDEO.LEVEL
31
FM.LEVEL
31
www.DataSheet4U.com
3
4
7
0
5
16
31
0
NoA0252-39/40
LA76810A
Status Byte Truth Table
Status Byte Truth Table
Register
0 HEX
POR
1 HEX
Undetected
Detected
IF.IDENT
Sync Undetected
Sync Detected
RF.AGC
RF.AGC.OUT = "L"
RF.AGC.OUT = "H"
IF.LOCK
Lock
Unlock
V.TRI
V.Triger Undetected
V.Triger Detected
50/60
50
60
Non-Standard
Standard
ST/NONST
H.LOCK
Horiz Unlocked
Horiz Locked
(AKB R)
R Beam Current Low
R Beam Current High
(AKB G)
G Beam Current Low
G Beam Current High
(AKB B)
B Beam Current Low
B Beam Current High
Color System
0 HEX
B/W
1 HEX
PAL
2 HEX
PAL-M
3 HEX
PAL-N
4 HEX
NTSC
5 HEX
4.43NTSC
6 HEX
SECAM
7 HEX
Do not care
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„ Specifications of any and all SANYO Semiconductor products described or contained herein stipulate
the performance, characteristics, and functions of the described products
and are not guarantees of the performance, characteristics, and functions
as mounted in the customer's products or equipment. To verify symptoms
evaluated in an independent device, the customer should always evaluate
in the customer's products or equipment.
in the independent state,
of the described products
and states that cannot be
and test devices mounted
„ SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any
and all semiconductor products fail with some probability. It is possible that these probabilistic failures
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so that these kinds of accidents or events cannot occur. Such measures include but are not limited to
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„ In the event that any or all SANYO Semiconductor products (including technical data, services) described
or contained herein are controlled under any of applicable local export control laws and regulations, such
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„ Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO Semiconductor product that you intend to use.
„ Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO Semiconductor believes information herein is accurate
and reliable, but no guarantees are made or implied regarding its use or any infringements of
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This catalog provides information as of November, 2006. Specifications and information herein are subject
to change without notice.
PS NoA0252-40/40