M52042FP NTSC Video Chroma Signal Processor REJ03F0180-0200 Rev.2.00 Sep 14, 2006 Description The M52042FP is a semiconductor integrated circuit (IC) for picture signal processing that has been developed for NTSC system LCD color TV. This IC has a built-in luminance signal processing circuit and color signal processing circuit, which is employed to convert a composite video signal to an RGB signal. Features • • • • • • • • Low voltage and low power dissipation design Built-in Y/C separation circuit and external chroma trap switchable (fc is nearly equal to 1.5 MHz.) Built-in sync separation circuit Provided with Y-signal blanking function by HD pulse R.G.B. signal output Tint, contrast, picture quality and color control linearly adjustable 24-pin, shrink pitch, flat package employed Same package as in PAL system video chroma IC M52045FP, pin perfectly compatible Application LCD color TV and LCD color view finder Recommended Operating Condition Supply voltage range: 3.7 to 4.5 V Rated supply voltage: 4.0 V Rev.2.00 Sep 14, 2006 page 1 of 13 M52042FP Block Diagram VCC +4 V 24 VCXO VCXO VCXO OUT MONITOR IN 23 22 21 TINT KILLER COLOR CONT. FILTER 20 19 PHASE SHIFTER VCXO 18 APC FILTER S.W. KILLER OUT 17 16 15 KILLER DET HD BLK ACC DET 13 PIX CONT. 0 dB COLOR CONT. CHROMA BPF 14 TINT APC DET 0 dB PIX CONT. GND ACC AMP CONTRAST SYNC SEP Y LPF R-Y DET Y AMP PED CLAMP SW R Mtx B-Y DET G Mtx B Mtx CP GEN 1 2 3 4 5 VIDEO IN SYNC SEP IN ACC FILTER SYNC OUT HD IN 6 7 PED CHROMA CLAMP TRAP C 8 9 10 Y CONTRAST R OUT G OUT OUT CONT. Pin Arrangement M52042FP Video input 1 SYNC separation input 2 ACC FILTER 3 SYNC separation output 4 HD pulse input 5 Pedestal-clamped capacitance 6 CHROMA TRAP 7 Y output 8 Contrast control 9 R output 10 G output 11 B output 12 24 VCC (+4 V) 23 VCXO output VCXO MONITOR VCXO input Color control Tint control KILLER FILTER APC FILTER S.W. Killer output PIX CONT. GND 22 21 20 19 18 17 16 15 14 13 (Top view) Outline: PRSP0024GA-A (24P2Q-A) Rev.2.00 Sep 14, 2006 page 2 of 13 11 12 B OUT M52042FP Pin Description Pin No. 1 Name Peripheral Circuit of Pins VIDEO IN (Video input) 1 VCC Bias GND 2 SYNC SEP IN (SYNC separation input) 2 VCC Bias GND 3 ACC FILTER 47 k GND 4 SYNC OUT (SYNC separation output) 3 VCC 4 100 k 10 k GND 5 HD IN (HD pulse input) 5 VCC 100 k 50 k 100 k GND Rev.2.00 Sep 14, 2006 page 3 of 13 M52042FP Pin No. 6 Name Peripheral Circuit of Pins PED CLAMP C (Pedestal-clamped capacitance) 6 VCC 9 k2 Bias 5k GND 7 CHROMA TRAP 7 VCC 1k GND 8 Y OUT (Y output) VCC 150 k 40 k 8 10 k 150 k GND 9 CONTRAST CONT. (Contrast control) VCC 5k 5k 9 36 k 30 k GND 10 11 R OUT (R output) VCC 20 k 20 k G OUT (G output) 10 ( 11 ) ( 12 ) 12 B OUT (B output) Bias 360 GND 13 GND (Grounding) — 24 VCC +4 V (Power supply) — Rev.2.00 Sep 14, 2006 page 4 of 13 M52042FP Pin No. Name Peripheral Circuit of Pins S.W. (Selector switch) VCC 16 53 k 16 175 k 10 k 15 k 10 k GND 22 VCC 15 k VCXO MONITOR 15 k 22 2k 2k 2k 2k 10 k GND 14 PIX CONT. (Picture quality control) 14 VCC 100 k 100 k 36 k 15 36 k KILLER OUT (Killer output) VCC 100 k 15 100 k 17 150 k APC FILTER VCC 10 k 17 Rev.2.00 Sep 14, 2006 page 5 of 13 GND M52042FP Pin No. 18 Name Peripheral Circuit of Pins KILLER FILTER 41 k 18 19 GND TINT CONT. (Tint control) VCC 15 k 2 k4 15 k 160 k Bias 19 GND 20 COLOR (Color control) VCC 20 GND 21 VCXO IN (VCXO input) 21 VCC 30 k 22 k Bias 2k 2k GND 23 VCXO OUT (VCXO output) VCC 500 1k 15 k 23 Bias 180 GND Rev.2.00 Sep 14, 2006 page 6 of 13 M52042FP Absolute Maximum Ratings Ratings Unit Supply voltage Power dissipation Item VCC Pd Symbol 4.8 680 V mW Operating temperature Storage temperature Topr Tstg –10 to 70 –45 to 120 °C °C Thermal derating Electrostatic capacity Kθ Vmax 5.4 ±200* mW/°C V Note: Charging capacity: 200 pF Thermal Derating (Maximum Rating) 0.6 Power Dissipation Pd (W) 0.54 0.5 0.4 0.3 0.2 0.1 0 0 25 50 70 Ambient Temperature Ta (°C) Rev.2.00 Sep 14, 2006 page 7 of 13 75 M52042FP Electrical Characteristics (Ta = 25°C, unless otherwise noted) Item Circuit current Min — Typ 17 Max 21 Unit mA Test No 1 2.20 2.30 2.40 V 2 1.25 1.40 1.50 Measure each output signal SYNC tip voltage at pins (1), (7) when standard color bar signal of 0.7 Vp-p is input. Vsync H 2.7 3.1 3.4 Vp-p 3 Vsync L 2.7 3.1 3.4 Input only SYNC pulse of pulse width 4.7 µs to pin (1). Measure the output amplitude at pin (4) when the input SYNC pulse amplitudes are 0.2 and 0.05 Vp-p. Tsync H 3.7 4.7 5.7 µs 4 Tsync L 3.7 4.7 5.7 Input only SYNC pulse of pulse width 4.7µs to pin (1). Measure the output amplitude at pin (4) when the input SYNC pulse amplitudes are 0.2 and 0.05 Vp-p. Dsync H 3.7 4.7 6.0 µs 5 Dsync L 3.7 4.7 6.0 Input only SYNC pulse of pulse width 4.7µs to pin (1). Measure the pulse width + delay time when the input SYNC pulse amplitudes are 0.2 and 0.05 Vp-p. YLPF (L) 1.45 1.55 — MHz 6 Measure the frequency at which the sine wave output amplitude is –3 dB when the YLPF (H) –30 –24 –21 dB Symbol ICC SYNC SEP section SYNC tip Vsync 1 voltage Vsync 7 SYNC output amplitude SYNC output pulse width SYNC output pulse delay Video section YLPF frequency characteristics (Pin (7) ) Test Conditions Input standard color bar signal of VCC = 4 V. input signal ( 0.2 Vp-p ) 0.2 Vp-p is input. Also measure the output gain at input sine wave 3.58 MHz. YLPF frequency characteristics (through mode) YLPF through Maximum output Ymax 1.1 1.7 1.7 Vp-p 7 Video amplifier gain GYmax 4.0 6.0 8.0 dB 8 Contrast control characteristics Yctrast (1) 1.20 2.45 4.50 dB 9 Yctrast (2, 5) –7.3 –5.0 –2.7 Yctrast (3, 5) — –30 –17 XPIX (4) –3.5 –2.0 –0.5 dB 10 XPIX (0) 10.0 12.0 14.0 dB Input 1.5 MHz sine wave of 0.2 Vp-p to the input. Measure each output amplitude at pin (12) when V9 is 1.7 V, and V14 is changed to 2, 4 and 0 V and calculate the ratio between the input amplitude and the output amplitude when V14 = 2 V. Y AMP gain GYmap 9.1 11.0 12.6 dB 11 Input standard staircase wave of 0.7 Vp-p and calculate the ratio between the output amplitude at pin (8) and input amplitude. PED offset level Vped 0.00 0.05 0.06 — 12 With input SYNC pulse at 0.2 Vp-p, measure pin (12) output pedestal offset, and calculate ratio of the offset to that when 0.7 Vp-p standard staircase is input. PIX control characteristics 5.0 7.0 10.0 MHz 7' Measure the frequency at which the sine wave output amplitude is –3 dB when the input signal ( Rev.2.00 Sep 14, 2006 page 8 of 13 0.2 Vp-p ) 0.2 Vp-p is input, and V16 is 4.0 VPC input. Input standard staircase wave of 0.7 Vp-p. Measure the output amplitude at pin (12) when V9 is 0 V. Input standard staircase wave of 0.7 Vp-p. Calculate the ratio between the output amplitude at pin (12) and input amplitude when V9 is 1.7 V. Input standard staircase wave of 0.7 Vp-p, and calculate the ratio of the input amplitude to the output amplitude in Test No.8 above when V9 is changed 1 V, 2.5 V and 3.5 V. M52042FP Electrical Characteristics (cont.) Min Typ Max Unit Test No Cacc (+4) 0 0.7 1.5 dB 14 Cacc (–20) –6.0 –2.0 0 Input burst 0.2 Vp-p + CW 4.33 MHz shall be 0 dB. Measure the output at pin (12) when the input is changed to +4 dB and –20 dB, and calculate the ratio of the measured amplitude to the output amplitude at 0 dB. Killer operation Ckilr –53 –49 –43 dB 15 Color control characteristics Cast (4) 2 2.2 4.5 dB 16 Cast (3) 1.5 2.0 4.0 Cast (1) –8.5 –6 –4 Cast (0, 5) –17 –13 –10 Input a chroma signal of 0.2 Vp-p to the input. Reduce the amplitude and measure the amplitude ratio when the voltage at pin (15) exceeds 2.5 V. Input burst 0.2 Vp-p + CW 4.33 MHz, change V20 to 2 V, 4 V, 3 V, 1 V and 0.5 V to measure each output (100 kHz beat) amplitude at pin (12), and calculate the ratio between the measured amplitude and the output amplitude at V20 = 1 V. ∆fapc +400 +600 — Hz 17 Item Chroma section Acc control characteristics APC pull-in range Symbol Test Conditions Input only SYNC, and after adjusting free run, input 0.2 Vp-p CW ( — –300 –200 0.2 Vp-p 0.2 Vp-p ), then change the frequency. Measure the frequency when VCXO oscillator is placed in a locked condition from the free-run condition. B demodulator sensitivity DB 0.8 1.2 1.6 Vp-p 18 Demodulated output voltage ratio R (R/B) 0.46 0.52 0.60 — 19 R (G/B) 0.20 0.30 0.40 Killer output voltage H Killer output voltage L Vkiller H 2.5 3.2 — V 21 Measure DC voltage at pin (15) when 0 V and 4 V are applied to pin (18). Vkiller L — 0.20 0.40 TINT control variance T 75 85 100 deg 22 TINT control characteristics Topen –5 +5 +15 deg 23 Input a chroma signal of 0.4 Vp-p to the input, and measure the phase variance at pin (12) when 0 V and 4 V are applied to V19. Apply B monochromatic wave, (variable phase) 0.4 Vp-p and burst 0.2 Vp-p to the input. Measure the input phase in which the output at pin (12) becomes maximum with V19 open as burst phase –180 degrees. Tmin –55 40 –25 deg Tmax +30 –40 +60 — 2.0 2.2 HD for chroma delay Dhd Rev.2.00 Sep 14, 2006 page 9 of 13 µs Input CW 4.33 MHz of 0.2 Vp-p to the input, and measure the output amplitude at pin (12) when V20 = 1 V. Input CW 4.33 MHz of 0.2 Vp-p to the input, measure the output amplitude at pins (10), (11) when V20 = 1 V, and calculate the ratio of the measured amplitude to the output amplitude in Test No.18 above. Apply B monochromatic wave (variable phase) 0.4 Vp-p and burst 0.2 Vp-p to the input. Measure the input phase in which the output at pin (12) becomes "maximum" when V19 is 0 V and 4 V as burst phase –180 degrees. 24 Apply B monochromatic wave 0.4 Vp-p and burst 0.2 Vp-p to the input. Measure the delay time from HD pulse rise to the chroma rise of pin (12) output. M52042FP Input Signal Standard color bar PAL (Standard staircase wave has no chroma signal) 0.7 Vp-p 0.2 Vp-p 0.2 Vp-p Burst + CW (B monochromatic wave, etc.) PAL 0.2 Vp-p Sine wave 0.2 Vp-p Continuous sine wave (CW) 0.2 Vp-p SYNC pulse 4.7 µs 1H Standard HD signal 5.4 µs 2.35 µs Rev.2.00 Sep 14, 2006 page 10 of 13 Rev.2.00 Sep 14, 2006 page 11 of 13 Sig IN 18 Ω VCC VCC 100 kΩ 200 pF 680 Ω 5.6 kΩ 2SC763 20 kΩ 510 Ω VIDEO SYNC ACC SYNC IN SEP IN FILTER OUT 3 4 1 2 17 16 15 14 VCC + SYNC OUT GND 13 HD IN VCC R 1.0 Vp-p (Typ.) G B HD PED CHROMA CONTIN CLAMP.C TRAP Y OUT RAST R OUT G OUT B OUT 5 6 7 8 9 10 11 12 M52042FP 10 kΩ 150 kΩ 18 470 pF 4.7 µF 19 + 15 kΩ 0.1 µF 10 µF + 20 VCC KILLER OUT 20 kΩ S.W. KILLER PIX VCC VCXO VCXO VCXO COLOR TINT KILLER APC (+4 V) OUT MONITOR IN CONT. CONT. FILTER FILTER OUT CONT. 21 3 kΩ 22 VCC 3.3 M 23 50 pF 510 Ω (0 to 50 pF) X'tal (3.579545 MHz) 0.01 µF 24 VCC +4 V M52042FP Test Circuit 100 kΩ + 4.7 µF 10000 pF 10 µF 510 kΩ 470 pF 10 kΩ 56 Ω Note : The evaluation of the above application circuit should be performed with great care, because APC characteristics, etc. differ considerably according to crystal characteristics and board pattern. Rev.2.00 Sep 14, 2006 page 12 of 13 18 Ω 680 Ω 5.6 kΩ 2SC763 200 pF 510 Ω = 0.8 VDC VIDEO SYNC ACC SYNC IN SEP IN FILTER OUT 3 4 1 2 0.7 Vp-p (Typ.) 150 kΩ 100 kΩ 4.7 µF 120 kΩ 10 µF + 19 18 470 pF 510 kΩ 470 pF 0.7 Vp-p (Typ.) 17 = 2.6 VDC 16 15 Open 14 VCC 13 GND 0 V Vth = 2.0 VDC = 3.3 VDC 1000 pF VCC R B 1.0 Vp-p (Typ.) G HD PED CHROMA CONTIN CLAMP.C TRAP Y OUT RAST R OUT G OUT B OUT 5 6 7 8 9 10 11 12 M52042FP HD IN 3.1 V SYNC OUT + 10 µF 0.7 Vp-p (Typ.) Sig IN VCC VCC 20 VCC 20 kΩ VCC VCXO VCXO VCXO COLOR TINT KILLER APC S.W. KILLER PIX OUT CONT. (+4 V) OUT MONITOR IN CONT. CONT. FILTER FILTER 21 3 kΩ 22 VCC 0.01 µF 23 510 Ω (0 to 50 pF) (3.579545 MHz) X'tal ≈ 0.4 = Vp-p amplitude + 15 kΩ 0.1 µF 24 VCC +4 V Filter pin: "H" in normal condition "L" with the killer ON Killer output pin: "L" in normal condition "H" with the killer ON KILLER OUT VCC S.W. pin: "H" external TRAP "Open" internal LPF M52042FP Application Example 100 kΩ 10 kΩ 56 Ω Note : The evaluation of the above application circuit should be performed with great care, because APC characteristics, etc. differ considerably according to crystal characteristics and board pattern. M52042FP Package Dimensions JEITA Package Code P-SSOP24-5.3x10.1-0.80 RENESAS Code PRSP0024GA-A Previous Code 24P2Q-A MASS[Typ.] 0.2g E 13 *1 HE 24 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. F 1 12 Index mark c A2 A1 D L A *2 *3 e y bp Detail F Rev.2.00 Sep 14, 2006 page 13 of 13 Reference Symbol D E A2 A A1 bp c HE e y L Dimension in Millimeters Min Nom Max 10.0 10.1 10.2 5.2 5.3 5.4 1.8 2.1 0.1 0.2 0 0.3 0.35 0.45 0.18 0.2 0.25 0° 8° 7.5 7.8 8.1 0.65 0.8 0.95 0.10 0.4 0.6 0.8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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