SANYO LA76832N

Ordering number : ENA0069
Monolithic Linear IC
LA76832N
I2C Bus Control IC
Overview
The LA76832N is I2C bus controller ICs that support the NTSC and aim for rationalization of color TV set design, improved
manufacturability, and lower total costs.
Functions
• I2C Bus Control VIF/SIF/Y/C/Deflection Implemented in a Single Chip
Specitications
Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
Maximum supply current
Symbol
Conditions
Ratings
V8 max
7.0
V
V31 max
7.0
V
V43 max
7.0
V
I18 max
25
mA
35
mA
I25 max
Allowable power dissipation
Unit
Pd max
Ta≤65°C *
1.6
W
Operating temperature
Topr
-10 to +65
°C
Storage temperature
Tstg
-55 to +150
°C
*Provided with a glass epoxy board (114.3×76.1×1.6mm)
Operating Conditions at Ta = 25°C
Parameter
Recommended supply voltage
Recommended supply current
Operating supply voltage range
Operating supply current range
Symbol
Conditions
Ratings
Unit
V8
5.0
V
V31
5.0
V
V43
5.0
V
I18
19
mA
I25
27
mA
V8 op
4.7 to 5.3
V
V31 op
4.7 to 5.3
V
V43 op
4.7 to 5.3
V
I25 op
24 to 30
mA
I18 op
17 to 21
mA
Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft's control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before using any SANYO Semiconductor products described or contained herein in such
applications.
SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
92706 / O3005 MS PC B8-5799 No.0069-1/39
LA76832N
Electrical Characteristics at Ta = 25°C, VCCL = V8 = V31 = V43 = 5.0V, ICC = I18 = 19mA, ICC = I25 = 27mA
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
[Circuit voltage, current]
IF supply current
I8
V8 = 5V V3 = 2.5V
55.0
65.0
75.0
mA
RGB supply current
V18
I18 = 19mA
8.0
Horizontal supply voltage
V25
I25 = 27mA
5.0
V
CCD supply current
I31
I31 = 5V
5.6
mA
Video supply current
I43
I43 = 5V
150
mA
V
[CCD block]
Voltage gain
GV_R
-2
0
+2
dB
Voltage gain B
GV_B
-2
0
+2
dB
Difference of voltage gain
DGV
0
0.1
0.3
dB
Delay time
Td
µs
63.8
[OSD block]
OSD Fast SW threshold
FSTH
2.3
2.5
2.7
V
Red RGB output level
ROSDH
120
165
200
IRE
Green RGB output level
GOSDH
70
120
140
IRE
Blue RGB output level
BOSDH
Analog OSD R output level
Analog OSD G output level
Analog OSD B output level
85
120
155
IRE
1.12
1.4
1.68
Ratio
LRRGB
45
50
60
%
Gain match
GRGB
0.8
1.0
1.2
Ratio
Linearity
LGRGB
45
50
60
%
Gain Match
BRGB
0.8
1.0
1.2
Ratio
Linearity
LBRGB
45
50
60
%
BRT63
1.9
2.2
2.5
V
Gain match
RRGB
Linearity
[RGB output (cutoff drive) block]
Brightness control
(Normal)
Hi brightness (max)
BRT127
40
Low brightness (Min)
BRT0
40
IRE
IRE
Cutoff control (min)
Vbias0
1.6
2.0
2.4
V
(Bias control) (max)
Vbias255
2.8
3.2
3.6
V
Resolution
Vbiassns
4
mV/Bit
Sub-bias control Resolution
Vsbiassns
8
mV/Bit
RB Drive adjustment Maximum output
RBout127
2.7
G Drive adjustment Maximum output
Gout15
RB Output attenuation
RBout0
G Output attenuation
Gout0
Vp-p
1.8
Vp-p
7
9
11
dB
1.5
3.5
5.5
dB
0.7
Vdc
[VIF block]
Maximum RFAGC voltage
VRFH
CW = 80dBµ, DAC = 0
Minimum RFAGC voltage
VRFL
CW = 80dBµ, DAC = 63
8.5
9
0
0.3
Vdc
RF AGC Delay Pt (@DAC = 0)
RFAGC0
DAC = 0
RF AGC Delay Pt (@DAC = 63)
RFAGC63
DAC = 63
75
dBµ
Input sensitivity
Vi
Output -3dB
46
dBµ
85
dBµ
No-signal video output voltage
VOn
No signal
3.3
3.7
4.1
Vdc
Sync signal tip level
VOtip
CW = 80dBµ
1.1
1.4
1.7
Vdc
Video output amplitude
VO
80dBµ, AM = 78%, fm = 15kHz
1.9
2.0
2.1
Vp-p
Video S/N
S/N
CW = 80dBµ
45
C-S beat level
IC-S
V3.58MHz/V920MHz
30
dB
Differential gain
DG
80dBµ, 87.5% Video MOD
5.0
10.0
%
Differential phase
DP
80dBµ, 87.5% Video MOD
2.0
10.0
deg
Maximum AFT output voltage
VAFTH
CW = 80dBµ, frequency variations
4.3
4.7
5.0
Vdc
Minimum AFT output voltage
VAFTL
CW = 80dBµ, frequency variations
0.0
0.2
0.7
Vdc
AFT detection sensitivity
VAFTS
CW = 80dBµ, frequency variations
12.0
20.0
28.0
mV/kHz
dB
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No.0069-2/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
APC pull-in range (U)
fPU
1.0
MHz
APC pull-in range (L)
fPL
1.0
MHz
[SIF block]
FM detection output voltage
SOADJ
FM limiting sensitivity
SLS
Output -3dB
500
FM detection output f characteristics
SF
fm = 100kHz
FM detection output distortion
STHD
FM = ±25kHz
AM rejection ratio
SAMR
AM = 30%
40
dB
SIF S/N
SSN
DIN. Andio
50
dB
de-emph time constant
SNTC
-0.5
6.0
mVrms
61
dBµ
9.0
dB
1.0
3.0
%
dB
[AUDIO block]
Maximum gain
AGMAX
1kHz
-2.5
Variable range
ARANGE
Frequency characteristics
0.0
60
65
AF
20kHz
-3.0
0.0
Mute
AMUTE
20kHz
70
Distortion
ATHD
1kHz, 500mVrms, Vol : MAX
S/N
ASN
DIN. Audio
65
Crosstalk
ACT
1kHz
70
+2.5
dB
dB
+3.0
dB
dB
0.5
70
%
dB
dB
[Video SW block]
Video signal input 1DC voltage
VIN1DC
Video signal input 1AC voltage
VIN1AC
Video signal input 2DC voltage
VIN2DC
Video signal input 2AC voltage
VIN2AC
SVO terminal DC voltage
SVO terminal AC voltage
2.2
2.5
2.8
1
V
Vp-p
2.2
2.5
2.8
SVODC
1.7
2.0
2.3
V
SVOAC
1.7
2.0
2.3
Vp-p
1
V
Vp-p
[Filter block]
Chroma trap amount NTSC
CtrapN
-36.0
-26.0
-22.0
dB
Chroma trap amount PAL
CtrapP
-36.0
-26.0
-22.0
dB
C-BPF1A (3.93MHz)
CBPF1A
-6.0
-3.0
0.0
dB
-0.5
1.5
3.5
dB
6.0
4.0
1.0
dB
-4.0
-1.0
0.0
dB
-2.0
0.0
2.0
dB
-2.5
0.0
2.5
dB
Reference : 4.43MHz
FILTER SYS = 0010
C-BPF1B (4.73/4.13MHz)
CBPF1B
Reference : 4.13MHz
FILTER SYS = 0010
C-BPF1C (4.93/3.93MHz)
CBPF1C
Reference : 3.93MHz
FILTER SYS = 0010
C-BPF2A (3.93MHz)
CBPF2A
Reference : 4.43MHz
FILTER SYS = 0011
C-BPF2B (4.73/4.13MHz)
CBPF2B
Reference : 4.13MHz
FILTER SYS = 0011
C-BPF2C (4.93/3.93MHz)
CBPF2C
Reference : 3.93MHz
FILTER SYS = 0011
Y-DL TIME1 6MHz Trap
TdY1
FILTER SYS = 0100
300.0
350.0
400.0
ns
Y-DL TIME2 PAL
TdY2
FILTER SYS = 0010
490.0
540.0
590.0
ns
Y-DL TIME3 NTSC
TdY3
FILTER SYS = 0001
530.0
580.0
630.0
ns
[Video block]
Video overall gain (Contrast max)
CONT127
9.0
11.0
13.0
dB
Contrast adjustment characteristics
CONT63
-7.5
-6.0
-4.5
dB
CONT0
-15.0
-12.0
-9.0
dB
(Normal/max)
Contrast adjustment characteristics
(Min/max)
Sharpness variability range
(Normal)
Sharp31
FILTER SYS = 0000
6.0
9.0
12.0
dB
(max)
Sharp63
FILTER SYS = 0000
9.0
12.0
15.0
dB
(min)
Sharp0
FILTER SYS = 0000
-4.0
-1.0
2.0
dB
Continued on next page.
No.0069-3/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
Sharpness variability range
typ
Unit
max
(trap 1 mid)
Sharp32T1
F = 2.2MHz, FILTER SYS = 000
5.0
8.0
11.0
dB
(trap 1 max)
Sharp63T1
F = 2.2MHz, FILTER SYS = 000
8.5
11.5
13.5
dB
(trap 1 min)
Sharp0T1
F = 2.2MHz, FILTER SYS = 000
-6.5
-3.5
-0.5
dB
(trap 2 mid)
Sharp32T1
F = 2.7MHz, FILTER SYS = 010
5.0
8.0
11.0
dB
(trap 2 max)
Sharp63T1
F = 2.7MHz, FILTER SYS = 010
8.5
11.5
13.5
dB
(trap 2 min)
Sharp0T1
F = 2.7MHz, FILTER SYS = 010
-6.5
-3.5
-0.5
dB
(trap 3 mid)
Sharp32T1
F = 3.0MHz, FILTER SYS = 100
5.0
8.0
11.0
dB
(trap 3 max)
Sharp63T1
F = 3.0MHz, FILTER SYS = 100
8.5
11.5
13.5
dB
(trap 3 min)
Sharp0T1
F = 3.0MHz, FILTER SYS = 100
-6.5
-3.5
-0.5
dB
Black stretch gain max
BKSTmax
Gain = 10, Start = 01
23.0
28.0
33.0
IRE
Black stretch gain mid
BKSTmid
Gain = 01, Start = 01
16.0
21.0
26.0
IRE
Black stretch gain min
BKSTmin
Gain = 00, Start = 01
9.0
14.0
19.0
IRE
Black stretch start point max (60IRE ∆V)
BKSTTHmax
Bain = 01, Start = 10
-5.0
0.0
+5.0
IRE
Black stretch start point mid (50IRE ∆V)
BKSTTHmid
Bain = 01, Start = 01
-5.0
0.0
+5.0
IRE
Black stretch start point min (40IRE ∆V)
BKSTTHmin
Bain = 01, Start = 00
-5.0
0.0
+5.0
IRE
DC transmission amount 1
ClampG1
DCREST = 00
95.0
100.0
105.0
%
DC transmission amount 2
ClampG2
DCREST = 01
102.0
107.0
112.0
%
DC transmission amount 3
ClampG3
DCREST = 10
107.0
112.0
117.0
%
DC transmission amount 4
ClampG4
DCREST = 11
113.0
118.0
123.0
%
Horizontal/vertical blanking output level
RGBBLK
0.1
0.4
0.7
V
Video frequency characteristics 1
BW1
3.4MHz/100kHz, Filter sys = 0100
-6.0
-3.0
0.0
dB
Video frequency characteristics 2 PAL
BW2
1.8MHz/100kHz, Filter sys = 0010
-6.0
-3.0
0.0
dB
Video frequency characteristics 3 NTSC
BW3
1.4MHz/100kHz, Filter sys = 0000
-6.0
-3.0
0.0
dB
White peak limiter effective point 1
WPL1
APL = 10% WPL = 01
90.0
95.0
100.0
IRE
White peak limiter effective point 2
WPL2
APL = 100% WPL = 01
150.0
160.0
170.0
IRE
Y gamma effective point 1
YG1
YGAMMA = 01
89.0
93.0
97.0
%
Y gamma effective point 2
YG2
YGAMMA = 10
81.0
85.0
89.0
%
Y gamma effective point 3
YG3
YGAMMA = 11
76.0
80.0
84.0
%
Pre-shoot adjust 1
PreShoot1
Pre-shoot adj. = 00
0.92
0.97
1.02
Pre-shoot adjust 2
PreShoot2
Pre-shoot adj. = 11
1.08
1.13
1.18
Sharpness variability range
Sharpness variability range
6MHz Trap
[Chroma block] : PAL/NTSC common
B-Y/Y amplitude ratio
CLRBY
75
100
150
%
Color control characteristics 1
CLRMN
Color MAX/CEN
1.6
2.0
2.4
times
Color control characteristics 2
CLRMM
Color MAX/MIN
33
40
50
dB
Color control sensitivity
CLRSE
1
2
Residual higher harmonic level B
E_CAR_B
300
mVp-p
Residual higher harmonic level R
E_CAR_R
300
mVp-p
Residual higher harmonic level G
E_CAR_G
300
mVp-p
1.2
times
4
%/bit
[Chroma block] : PAL
ACC amplitude characteristics 1
ACCM1_P
Input : +6dB/0dB 0dB = 40IRE
ACC amplitude characteristics 2
ACCM2_P
Input : -20dB/0dB
Demodulation output ratio R-Y/B-Y : PAL
RB_P
R-Y/B-Y_GainBalance_DAC,
0.8
1.0
0.7
1.0
1.1
times
0.50
0.56
0.67
times
-0.21
-0.19
-0.17
times
-0.56
-0.51
-0.46
times
85
90
95
deg
-39
-33
-26
dB
R-Y/B-Y_Angle_DAC = Center
Demodulation output ratio G-Y/B-Y : PAL
GB_P
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center,
R-Y = no-signal
Demodulation output ratio G-Y/R-Y : PAL
GR_P
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center,
B-Y = no-signal
Demodulation angle R-Y/B-Y : PAL
ANGRB_P
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
Killer operating point
KILL_P
0dB = 40IRE
Continued on next page.
No.0069-4/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
APC pull-in range (+)
PULIN+_P
APC pull-in range (-)
PULIN-_P
typ
Unit
max
350
Hz
-350
Hz
[Chroma block] : NTSC
ACC amplitude characteristics 1
ACCM1_N
Input : +6dB/0dB 0dB = 40IRE
0.8
1.0
1.2
times
ACC amplitude characteristics 2
ACCM2_N
Input :-20dB/0dB
0.7
1.0
1.1
times
Demodulation output ratio R-Y/B-Y : NTSC
RB_N
0.80
0.90
1.00
times
0.24
0.30
0.38
times
99
104
109
deg
227
240
250
deg
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
Demodulation output ratio G-Y/B-Y : NTSC
GB_N
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
Demodulation angle B-Y/R-Y : NTSC
ANGBR_N
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
Demodulation angle G-Y/B-Y : NTSC
ANGGB_N
R-Y/B-Y_GainBalance_DAC,
R-Y/B-Y_Angle_DAC = Center
Demodulation angle switch G-Y/B-Y : NTSC
ANGGC_N
G-Y Angle_DAC = 1
243
253
263
deg
Killer operating point
KILL_N
0dB = 40IRE
-40
-35
-28
dB
APC pull-in range (+)
PULIN+_N
APC pull-in range (-)
PULIN-_N
Tint center
TINCEN
Tint variable range (+)
TINT+
Tint variable range (-)
TINT-
350
-10
Hz
0
-350
Hz
+10
deg
35
deg
-35
deg
680
830
Hz
[Deflection block]
Horizontal free-running frequency
fH
530
Horizontal pull-in range
fH PULL
±400
Horizontal output pulse width
Hduty
36.1
37.6
39.1
µs
Horizontal output pulse saturation voltage
V Hsat
0
0.2
0.4
V
Vertical free-running cycle 50
VFR50
312.0
312.5
313.0
H
Vertical free-running cycle 60
VFR60
262.0
262.5
263.0
H
Horizontal output pulse phase
HPHCENpal
9.5
10.5
11.5
µs
Horizontal output pulse phase
HPHCENnt
9.5
10.5
11.5
µs
Horizontal position adjustment range
HPHrange
Horizontal position adjustment
HPHstep
Hz
±2.2
5bit
µs
200.0
ns
maximum variability width
Horizontal blanking left @0
BLKL0
BLKL : 000
7500
8300
9100
ns
Horizontal blanking left @7
BLKL7
BLKL : 111
10800
11600
12400
ns
Horizontal blanking right @0
BLKR0
BLKR : 000
1800
2600
3400
ns
Horizontal blanking right @7
BLKR7
BLKR : 111
-1100
-300
500
ns
Sand castle pulse crest value H
SANDH
5.3
5.6
5.9
V
Sand castle pulse crest value M1
SANDM1
3.7
4.0
4.3
V
Sand castle pulse crest value L
SANDL
0.1
0.4
0.7
V
Sand castle pulse crest value M2
SANDM2
1.7
2.0
2.3
V
Burst gate pulse width
BGPWD
3.5
4.0
4.5
µs
µs
Burst gate pulse phase
BGPPH
4.9
5.4
5.9
Horizontal output stop voltage
Hstop
3.30
3.60
3.90
V
X-ray protection circuit operating voltage
VXRAY
0.59
0.69
0.79
V
[Vertical screen size adjustment]
Vertical ramp output amplitude PAL@64
Vspal64
VSIZE : 1000000
0.75
0.85
0.95
Vp-p
Vertical ramp output amplitude NTSC@64
Vsnt64
VSIZE : 1000000
0.75
0.85
0.95
Vp-p
Vertical ramp output amplitude PAL@0
Vspal0
VSIZE : 0000000
0.40
0.50
0.60
Vp-p
Vertical ramp output amplitude PAL@127
Vspal127
VSIZE : 1111111
1.05
1.20
1.35
Vp-p
VCOMP : 000
0.83
0.88
0.93
ratio
[High-voltage dependent vertical size correction]
Vertical size correction @0
Vsizecomp
Continued on next page.
No.0069-5/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
[Vertical screen position adjustment]
Vertical ramp DC voltage PAL@32
Vdcpal32
VDC : 100000
2.25
2.40
2.55
Vdc
Vertical ramp DC voltage NTSC@32
Vdcnt32
VDC : 100000
2.25
2.40
2.55
Vdc
Vertical ramp DC voltage PAL@0
Vdcpal0
VDC : 000000
1.85
2.00
2.15
Vdc
Vertical ramp DC voltage PAL@63
Vdcpal63
VDC : 111111
2.65
2.80
2.95
Vdc
Vertical linearity @16
Vlin16
VLIN : 10000
0.85
1.00
1.15
ratio
Vertical linearity @0
Vlin0
VLIN : 00000
1.17
1.32
1.47
ratio
Vertical linearity @31
Vlin31
VLIN : 11111
0.57
0.72
0.87
ratio
Vertical S-shaped correction @16
VScor16
VSC : 10000
0.55
0.70
0.85
ratio
Vertical S-shaped correction @0
VScor0
VSC : 00000
0.85
1.00
1.15
ratio
Vertical S-shaped correction @31
VScor31
VSC : 11111
0.36
0.51
0.66
ratio
East/West DC Voltage@32
EWdc32
EWDC : 100000
1.90
2.30
2.70
Vdc
East/West DC Voltage@0
EWdc0
EWDC : 000000
0.90
1.30
1.70
Vdc
East/West DC Voltage@63
EWdc63
EWDC : 111111
2.90
3.30
3.70
Vdc
0.1
0.3
0.50
V
[Horizontal screen size adjustment]
[High-voltage dependent horizontal size compensation]
Horizontal size compensation@0
Hsizecomp
HCOMP : 000
EWamp32
EWAMP : 100000
0.90
1.30
1.70
Vp-p
[Pincushion correction]
East/West amplitude@32
East/West amplitude@0
EWamp0
EWAMP : 000000
-0.40
0.00
+0.40
Vp-p
East/West amplitude@63
EWamp63
EWAMP : 111111
2.20
2.60
3.00
Vp-p
[Correction of trapezoidal distortion]
East/West parabolic tilt@32
EWtilt32
EWTILT : 100000
-0.40
0.00
+0.40
V
East/West parabolic tilt@0
EWtilt0
EWTILT : 000000
-1.40
-1.00
-0.6
V
East/West parabolic tilt@63
EWtilt63
EWTILT : 111111
0.60
1.00
1.40
V
[Correction of corner distortion]
East/West parabolic corner top
EWcorTOP
CORTOP : 1111-0000
0.30
0.70
1.10
V
East/West parabolic corner bottom
EWcorBOT
CORBOTTOM : 1111-0000
0.30
0.70
1.10
V
Test Conditions at Ta = 25°C, VCC = V8 = V31 = V43 = 5.0V, I18 = 19mA, ICC = I25 = 27mA
Parameter
Symbol
Test
Input
point
signal
Test method
Bus conditions
[Circuit voltage, current]
Horizontal supply voltage (pin 25)
RGB supply voltage (pin 18)
IF supply current (pin 8)
V25
V18
I8
(CDDICC)
25
18
8
No signal
Apply a current of 27mA to pin 25 and measure
Initial
the voltage at pin 25.
No signal
Apply a current of 19mA to pin 18 and measure
Initial
the voltage at pin 18.
No signal
Apply a voltage of 5.0V to pin 8 and measure the
Initial
incoming DC current (mA).
(IF AGC 2.5V applied)
CCD supply current (pin 31)
I8
(CDDICC)
Video/vertical supply current
(pin 43)
I43
(DEFICC)
31
43
No signal
Apply a voltage of 5.0V to pin 31 and measure
Initial
the incoming DC current (mA).
No signal
Apply a voltage of 5.0V to pin 43 and measure
Initial
the incoming DC current (mA).
No.0069-6/39
LA76832N
VIF Block Input Signals and Test Conditions
1.
2.
3.
4.
Input signals must all be input to the PIF IN (pin 6) in the Test Circuit.
All input signal voltage values are the levels at the VIF IN (pin 6) in the Test Circuit.
Signal contents and signal levels
Bus control condition : VIF SYS = ”10”
Input signal
Waveform
Conditions
SG1
45.75MHz
SG2
42.17MHz
SG3
41.25MHz
SG4
Frequency variable
SG5
45.75MHz
87.5% Video Mod.
10-stairstep wave
(Subcarrier : 3.58MHz)
SG6
45.75MHz
fm = 15kHz, AM = 78%
5. Before measurement, adjust the DAC as follows.
Parameter
Video
Level DAC
Test
point
46
Input signal
SG6, 80dBµ
Test method
Set the output level at pin 46 as close to 2.0Vp-p as possible.
No.0069-7/39
LA76832N
Parameter
Symbol
Test
Input
point
signal
Test method
Bus conditions
[VIF block]
Maximum RF AGC voltage
Minimum RF AGC voltage
RF AGC Delay Pt
VRFH
VRFL
RFAGC0
(@DAC = 0)
RF AGC Delay Pt
RFAGC63
(@DAC = 63)
Input sensitivity
Vi
4
4
4
4
46
SG1
Measure the DC voltage at pin 4.
RF. AGC = ”000000”
Measure the DC voltage at pin 4.
RF. AGC = ”111111”
Obtain the input level at which the DC voltage at
RF. AGC = ”000000”
80dBµ
SG1
80dBµ
SG1
pin 4 becomes 4.5V.
SG1
Obtain the input level at which the DC voltage at
RF. AGC = ”111111”
pin 4 becomes 4.5V.
SG6
Using an oscilloscope, observe the level at pin
46 and obtain the input level at which the
waveform's p-p value becomes 1.4Vp-p.
No-signal video output
VOn
voltage
Sync signal tip level
Video output amplitude
Video S/N
VOtip
VO
S/N
46
46
46
46
No signal
Set IF AGC = “1” and measure the DC voltage at
pin 46.
SG1
Measure the DC voltage at pin 46.
80dBµ
SG6
Using an oscilloscope, observe the level at pin
80dBµ
46 and measure the waveform’s p-p value.
SG1
Measure the noise voltage (Vsn) at pin 46 with
80dBµ
an RMS voltmeter through a 10kHz to 4.2MHz
band-pass filter and calculate 20Log (1.43/Vsn).
C-S beat level
IC-S
46
SG1
Input a 80dBµ SG1 signal and measure the
SG2
DC voltage (V3) at pin 3. Mix SG1 = 74dBµ,
SG3
SG2 = 64dBµ, and SG3 = 64dBµ to enter the
mixture in the VIF IN. Apply V3 to pin 3 from an
external DC power supply. Using a spectrum
analyzer, measure the difference between pin
46’s 3.58MHz component and 920MHz
component.
Differential gain
Differential phase
Maximun AFT
DG
DP
VAFTH
output voltage
46
46
10
SG5
Using a vector scope, measure the level at
80dBµ
Pin 46.
SG5
Using a vector scope, measure the level at
80dBµ
Pin 46.
SG4
Set and input the SG4 frequency to 44.75MHz to
80dBµ
be input. Measure the DC voltage at pin 10 at
that moment.
Minimun AFT
VAFTL
output voltage
10
SG4
Set and input the SG4 frequency to 46.75MHz to
80dBµz
be input. Measure the DC voltage at pin 10 at
that moment.
AFT detection sensitivity
VAFTS
10
SG4
Adjust the SG4 frequency and measure
80dBµz
frequency deviation ∆f when the DC voltage at
pin 10 changes from 1.5V to 3.5V.
VAFTS = 2000/∆f [mV/kHz]
APC pull-in range (U), (L)
fPU, fPL
46
SG4
Connect an oscilloscope to pin 46 and adjust the
80dBµ
SG4 frequency to a frequency higher than
45.75MHz to bring the PLL into unlocked mode.
(A beat signal appears.) Lower the SG4
frequency and measure the frequency at which
the PLL locks again. In the same manner, adjust
the SG4 frequency to a lower frequency to bring
the PLL into unlocked mode. Lower the SG4
frequency and measure the frequency at which
the PLL locks again.
No.0069-8/39
LA76832N
SIF Block (FM block) Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. Bus control condition : IF. AGC. SW = “1”, SIF.SYS = ”00”, DEEM-TC = ”1”, FM.GAIN = ”1”
2. SW : IF1 = “ON”
3. Input signals are input to pin 54 and the carrier frequency is 4.5MHz.
Parameter
FM detection
Symbol
SOADJ
output voltage
Test
Input
point
signal
2
Test method
90dBµ,
Adjust the DAC (FM. LEVEL) such that the 400
fm = 400Hz,
Hz component of the FM detection output at pin
FM = ±25kHz
2 become as close to 500 mVrms as possible
Bus conditions
and measure (SV1 : mVrms) the output at that
moment.
FM limiting sensitivity
SLS
2
fm = 400Hz,
Measure the input level (dBµ) at which the
FM level =
FM = ±25kHz
400Hz component of the FM detection output at
Adjustment value
pin 2 becomes -3dB relative to SV1.
FM detection output f
SF
characteristics
2
(fm=100kHz)
90dBµ,
Set SW : IF1 = "OFF".
FM level =
fm = 100kHz,
Measure (SV2 : mVrms) the FM detection output
Adjustment value
FM = ±25kHz
of pin 2. Calculate as follows :
SF = 20Log (SV1/SV2) [dB]
FM detection output
STHD
distortion
2
90dBµ,
Measure the distortion factor of the 400Hz
FM level =
fm = 400Hz,
component of the FM detection output at pin 2.
Adjustment value
90dBµ,
Measure the 1kHz component (SV3 : mVrms) of
FM level =
fm = 400Hz,
the FM detection output at pin 2.
Adjustment value
AM = 30%
Assign the measured value to SV3 and
FM = ±25kHz
AM rejection ratio
SAMR
2
calculate as follows :
SAMR = 20Log (SV1/SV3) [dB]
SIF. S/N
SSN
2
90dBµ,
Measure the noise level (DIN AUDIO, SV4 :
FM level =
CW
mVrms) at pin 2. Calculate as follows :
Adjustment value
SSN = 20Log (SV1/SV4) [dB]
NT de-emph time constant
SNTC
2
90dBµ,
Measure the 2.12kHz component (SV5 : mVrms)
FM level =
fm = 2.12kHz,
of the FM detection output at pin 2 and calculate
Adjustment value
FM = ±25kHz
as follows :
SNTC = 20Log (SV1/SV5) [dB]
No.0069-9/39
LA76832N
Audio Block Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. Bus control condition : AUDIO. MUTE = ”0”, AUDIO. SW = ”1”, VOL. FIL = ”0” , SIF. SYS = ”00”,
IF. AGC. SW = ”1”
2. Input 4.5MHz, 90dBµ and CW at pin 54.
3. Enter an input signal from pin 51.
Parameter
Maximum gain
Symbol
AGMAX
Test
Input
point
signal
1
Test method
Bus conditions
1kHz, CW
Measure the 1kHz component (V1 : mVrms)
VOLUME =
500mVrms
at the pin 1 and calculate as follows :
"1111111"
AGMAX = 20Log (V1/500) [dB]
Variable range
ARANGE
1
1kHz, CW
Measure the 1kHz component (V2 : mVrms)
VOLUME =
500mVrms
at the pin 1 and calculate as follows :
"0000000"
ARANGE = 20Log (V1/V2) [dB]
Frequency characteristics
AF
1
20kHz, CW
Measure the 20kHz component (V3 : mVrms)
VOLUME =
500mVrms
at the pin 1 and calculate as follows :
"1111111"
AF = 20Log (V3/V1) [dB]
Mute
Distortion
S/N
AMUTE
ATHD
ASN
1
1
1
20kHz, CW
Measure the 20kHz component (V4 : mVrms)
VOLUME =
500mVrms
at the pin 1 and calculate as follows :
"1111111"
AMUTE = 20Log (V3/V4) [dB]
AUDIO.MUTE = ”1”
1kHz, CW
Measure the distortion of the 1kHz component at
VOLUME =
500mVrms
the pin 1.
"1111111"
No signal
Measure the noise level (DIN AUDIO, V5 :
VOLUME =
mVrms) at the pin 1 and calculate as follows :
"1111111"
ASN = 20Log (V1/V5) [dB]
Crosstalk
ACT
1
1kHz, CW
Measure the 1kHz component (V6 : mVrms) at
VOLUME =
500mVrms
the pin 1 and calculate as follows :
"1111111"
ACT = 20Log (V1/V6) [dB]
AUDIO. SW = "0"
No.0069-10/39
LA76832N
Video Block Input Signals and Test Conditions
1. C IN Input∗chroma burst signal : 40 IRE
2. Y IN input signal 100IRE : 714mV
3. Bus control bit conditions : Initial test state
∗OIRE signal (L-O) : NTSC standard sync signal
∗XIRE signal (L-X)
∗CW signal (L-CW)
∗BLACK STRETCH OIRE signal (L-BK)
No.0069-11/39
LA76832N
4. R/G/B IN Input signal
RGB Input signal 1 (O-1)
RGB Input signal 2 (O-2)
Parameter
Symbol
Test
Input
point
signal
Test method
Bus bit/input signal
[Video block]
Video overall gain
CONT127
(Contrast max)
21
L-50
Measure the output signal’s 50IRE amplitude
CONTRAST : 1111111
(CNTHB Vp-p) and calculate
CONT127 = 20Log (CNTHB/0.357).
Contrast adjustment
CONT63
characteristics
21
L-50
(normal/max)
Contrast adjustment
CONTRAST : 0111111
CONT63 = 20Log (CNTCB/0.357).
CONT0
characteristics
21
L-50
Measure the output signal’s 50IRE amplitude
CONTRAST : 0000000
(CNTLB Vp-p) and calculate
(min/max)
Video frequency
Measure the output signal’s 50IRE amplitude
(CNTCB Vp-p) and calculate
CONT0 = 20Log (CNTLB/0.357).
BW1
Characteristics 1
21
L-CW
(SVHS)
With the input signal’s continuous wave = 100kHz,
FILTER SYS : 000
measure the output signal’s continuous wave
SHARPNESS : 000000
amplitude (PEAKDC Vp-p).
With the input signal’s continuous wave = 6MHz,
measure the output signal’s continuous wave
amplitude (CW1.4 Vp-p).
Calculate BW1 = 20Log (CW1.4/PEAKDC).
Video frequency
BW2
Characteristics 2
21
L-CW
(PAL)
With the input signal’s continuous wave = 1.8MHz,
FILTER SYS : 010
measure the output signal’s continuous wave
SHARPNESS : 000000
amplitude (CW1.8 Vp-p).
Calculate BW2 = 20Log (CW1.8/PEAKDC).
Video frequency
BW3
Characteristics 3
21
L-CW
(NTSC)
With the input signal’s continuous wave = 3.4MHz,
FILTER SYS : 100
measure the output signal’s continuous wave
SHARPNESS : 000000
amplitude (CW3.4 Vp-p).
Calculate BW3 = 20Log (CW3.4/PEAKDC).
Chroma trap amount PAL
CtraPP
21
L-CW
With the input signal’s continuous
FILTER SYS : 010
wave = 4.43MHz, measure the output signal’s
SHARPNESS : 000000
continuous wave amplitude (F0P Vp-p).
Calculate CtraP = 20Log (F0P/PEAKDC).
Chroma trap amount NTSC
CtraPN
21
L-CW
With the input signal’s continuous
FILTER SYS : 000
wave = 3.58MHz, measure the output signal’s
SHARPNESS : 000000
continuous wave amplitude (F0N Vp-p).
Calculate CtraN = 20Log (F0N/PEAKDC).
Continued on next page.
No.0069-12/39
LA76832N
Continued from preceding page.
Parameter
DC transmission amount
Symbol
ClampG
Test
Input
point
signal
21
L-0
L-100
Test method
Bus bit/input signal
Measure the output signal’s 0IRE DC level
Brightness : 0000000
(BRTPL V).
CONTRAST : 1111111
Measure the output signal’s 0IRE DC level
Brightness : 0000000
(DRVPH V) and 100IRE amplitude (DRVH Vp-p)
CONTRAST : 1111111
and calculate ClampG = 100× (1+ (DRVPHBRTPL)/DRVH).
Y-DL TIME1 (SVHS)
TdY1
21
L-50
Obtain the time difference (the delay time) from
FILTER SYS : 0100
when the rise of the input signal's 50IRE amplitude
to the output signal's 50IRE amplitude.
Y-DL TIME2 (PAL)
TdY2
21
L-50
Obtain the time difference (the delay time) from
FILTER SYS : 0010
when the rise of the input signal's 50IRE amplitude
to the output signal's 50IRE amplitude.
Y-DL TIME3 (NTSC)
TdY3
21
L-50
Obtain the time difference (the delay time) from
FILTER SYS : 0000
when the rise of the input signal's 50IRE amplitude
to the output signal's 50IRE amplitude.
Y-DL TIME4 (SECAM)
TdY4
21
L-50
Obtain the time difference (the delay time) from
FILTER SYS : 1000
when the rise of the input signal's 50IRE amplitude
to the output signal's 50IRE amplitude.
Maximum black
BKSTmax
stretch gain
21
L-BK
Measure the 0IRE DC level (BKST1 V) at point A of
the output signal in the Black Stretch Defeat (Black
Stretch OFF) mode.
Measure the 0IRE DC level (BKST2 V) at point A of
Blk Str DEF : 0
the output signal in the Black Stretch ON mode.
Calculate BKSTmax = 2×50× (BKST1-BKST2)
/CNTHB.
Black stretch
BKSTTH∆
threshold ∆black
21
L-60
Measure the 60IRE DC level (BKST3 V) of the
Blk Str DEF : 0
output signal in the Black Stretch Defeat ON mode.
(60IRE ∆black)
Measure the 60IRE DC level (BKST4 V) of the
output signal in the Black Stretch Defeat (Black
Stretch OFF) mode.
Calculate BKSTTH∆ =
50× (BKST4-BKST3)/CNTHB.
Sharpness
(normal)
Sharp31
variability
21
L-CW
characteristics
With the input signal’s continuous wave = 2.2MHz,
FILTER SYS : 0000
measure the output signal’s continuous wave
Sharpness : 100000
amplitude (F00S31 Vp-p).
Calculate Sharp31 = 20Log (F00S31/PEAKDC).
(max)
Sharp63
L-CW
With the input signal’s continuous wave = 2.2MHz,
FILTER SYS : 0000
measure the output signal’s continuous wave
Sharpness : 111111
amplitude (F00S63 Vp-p).
Calculate Sharp63 = 20Log (F00S63/PEAKDC).
(min)
Sharp0
L-CW
With the input signal’s continuous wave = 2.2MHz,
FILTER SYS : 0000
measure the output signal’s continuous wave
Sharpness : 000000
amplitude (F00S0 Vp-p).
Calculate Sharp0 = 20Log (F00S0/PEAKDC).
Horizontal/vertical blanking
RGBBLK
output level
21
L-100
[OSD block]
OSD Fast SW threshold
Measure the DC level (RGBBLK V) for the output
signal’s blanking period.
Bus control bit conditions :
FSTH
21
Contrast : 0111111
Contrast=63, Brightness=63
Brightness : 0111111
L-0
Apply voltage to pin 17 and measure the voltage at
Pin 16A : O-2 applied
O-2
pin 17 at the point where the output signal switches
to the OSD signal.
Red RGB output level
ROSDC
19
L-50
Measure the output signal’s 50IRE amplitude
(CNTCR Vp-p).
L-0
Measure the OSD output amplitude
Pin 17 : 3.5V
O-2
(OSDHR Vp-p).
Pin 14A : O-2 applied
Calculate ROSDH = 50× (OSDHR/CNTCR).
Continued on next page.
No.0069-13/39
LA76832N
Continued from preceding page.
Parameter
Green RGB output level
Symbol
GOSDC
Test
Input
point
signal
20
L-50
Test method
Bus bit/input signal
Measure the output signal’s 50IRE amplitude
(CNTCG Vp-p).
L-0
Measure the OSD output amplitude
Pin 17 : 3.5V
O-2
(OSDHG Vp-p).
Pin 15A : O-2 applied
Calculate GOSDC = 50× (OSDHG/CNTCG).
Blue RGB output level
BOSDC
21
L-50
Measure the output signal’s 50IRE amplitude
(CNTCB Vp-p).
L-0
Measure the OSD output amplitude
Pin 17 : 3.5V
O-2
(OSDHB Vp-p).
Pin 16A : O-2 applied
L-0
Measure the amplitudes at point A (0.35V portion
Pin 17 : 3.5V
O-1
of the input signal 0-1) and point B (0.7V portion of
Pin 14A : O-1 applied
Calculate BOSDC = 50× (OSDHB/CNTCB)
Analog
19
OSD R
output
the input signal 0-1) of the output signal. Assign the
level
measured values to RGBLR Vp-p and RGBHR
Vp-p, respectively.
Gain match
RRGB
linearity
LRRGB
Analog
Calculate RRGB = RGBLR/CNTCR.
Calculate LRRGB = 100× (RGBLR/RGBHR).
20
OSD G
L-0
Measure the amplitudes at point A (0.35V portion
Pin 17 : 3.5V
O-1
of the input signal 0-1) and point B (0.7V portion of
Pin 15A : O-1 applied
output
the input signal 0-1) of the output signal. Assign the
level
measured values to RGBLG Vp-p and RGBHG
Vp-p, respectively.
Gain match
GRGB
linearity
LGRGB
Analog
Calculate GRGB = RGBLG/CNTCG.
Calculate LGRGB = 100× (RGBLG/RGBHG).
21
OSD B
L-0
Measure the amplitudes at point A (0.35V portion
Pin 17 : 3.5V
O-1
of the input signal 0-1) and point B (0.7V portion of
Pin 16A : O-1 applied
output
the input signal 0-1) of the output signal. Assign the
level
measured values to RGBLB Vp-p and RGBHB
Vp-p, respectively.
Gain match
BRGB
linearity
LBRGB
Calculate BRGB = RGBLB/CNTCB.
Calculate LBRGB = 100× (RGBLB/RGBHB).
[RGB output block]
Bus control bit conditions : Contrast = 127
Contrast : 1111111
Measure the 0IRE DC levels of the respective
Brightness : 01111111
(Cutoff, drive block)
Brightness
(normal)
BRT63
control
19
20
21
L-0
output signals of R output (19), G output (20), and
B output (21). Assign the measured values to
BRTPCR, BRTPCG, and BRTPCB V, respectively.
Calculate
BRT63 = (BRTPCR+BRTPCG+BRTPCB) /3.
(max)
BRT127
21
Measure the 0IRE DC level of the output signal of
Brightness : 1111111
B output (21) and assign the measured value to
BRTPHB.
Calculate BRT127 = 50×
(BRTPHB-BRTPCB)/CNTHB.
(min)
BRT0
Measure the 0IRE DC level of the output signal of
Brightness : 0000000
B output (21) and assign the measured value to
BRTPLB.
Calculate BRT0 = 50×
(BRTPLB-BRTPCB)/CNTHB.
Continued on next page.
No.0069-14/39
LA76832N
Continued from preceding page.
Parameter
Bias
(min)
Symbol
Vbias0
(cutoff)
Test
Input
point
signal
19
L-50
20
control
(max)
Bias (cutoff) control
Vbias255
Test method
Bus bit/input signal
Measure the 0IRE DC levels (Vbias0* V) of the
Sub-Brightness :
respective output signals of R output (19),
0000000
G output (20), and B output (21).
* : R, G, and B
21
Vbiassns
resolution
Measure the 0IRE DC levels (Vbias255* V) of the
Sub-Brightness :
respective output signals of R output (19),
1111111
G output (20), and B output (21).
Red/Green/Blue Bias :
* : R, G, and B
11111111
Measure the 0IRE DC levels (BAS80* V) of the
Red/Green/Blue Bias :
respective output signals of R output (19),
01010000
G output (20), and B output (21).
* : R, G, and B
Measure the 0IRE DC levels (BAS48* V) of the
Red/Green/Blue Bias :
respective output signals of R output (19),
00110000
G output (20), and B output (21).
Calculate Vbiassns* = (BAS80*-BAS48*) /32
Sub-bias control resolution
Vsbiassns
L-50
Measure the 0IRE DC levels (SBTPM* V) of the
Sub-Brightness :
respective output signals of R output (19),
0101010
G output (20), and B output (21).
Contrast : 0111111
Calculate Vsbiassns* = (BRTPC*-SBTPM*)
Drive adjustment
RBout127
maximum output
Gout15
19
L-100
Measure the 100IRE amplitudes (DRVH* Vp-p) of
Brightness : 0000000
the respective output signals of R output (19) and B
20
output (21).
* : R and B
21
Measure the 100IRE amplitude of the output signal
of G output (20) and assign the measured value to
DRVH* Vp-p.
*:G
Output attenuation
RBout0
Measure the 100IRE amplitudes (DRVL* Vp-p) of
Brightness : 0000000
the respective output signals of R output (19),
Red/Blue Drive :
G output (20), and B output (21).
0000000
* : R and B
Measure the 100IRE amplitude of the output signal
of G output (20) and assign the measured value to
DRVL* Vp-p.
*:G
Gout0
RBout0* = 20Log (DRVH*/DRVL*)
Gout0* = 20Log (DRVH*/DRVL*)
Bus control bit conditions :
Contrast: 0111111
Contrast = 63, Brightness = 63
Brightness : 01111111
Input signals to pin 42 and measure the voltage of
VIDEO SW : 1
[VIDEO SW block]
Video signal input
VIN1DC
1DC voltage
Video signal input
VIN2DC
2DC voltage
SVO terminal DC voltage
SVO terminal AC voltage
SVODC
SVOAC
42
44
40
40
L-100
the pedestal.
L-100
Input signals to pin 44 and measure the voltage of
VIDEO SW : 0
the pedestal.
L-100
Input signals to pin 42 and measure the voltage of
VIDEO SW : 1
the pedestal at pin 40.
L-100
Input signals to pin 42 and measure the voltage of
VIDEO SW : 1
the pedestal at pin 40.
No.0069-15/39
LA76832N
Chroma Block Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. VIF, SIF blocks : No signal
2. Deflection Block : Horizontal/vertical composite sync signals are input and the deflection block must be locked into
the sync signals (Refer to the Deflection Block Input Signals and the Test Conditions).
3. Bus control conditions : Set the following conditions unless otherwise specified.
Y Input is 42 Pin (EXT-V IN),
C Input is 44 Pin (S-C IN)
(Video SW = 1, C. Ext = 1)
Other DAC except the above-mentioned conditions is all initial conditions.
4. Y Input condition: No signal unless otherwise specified.
(Sync is necessary to obtain synchronization).
5. How to calculate the demodulation ratio and angle :
B-Y axis angle = tan-1 (B ( 0) /B (270) ) +270°
R-Y axis angle = tan-1 (R (180) /R ( 90) ) +90°
G-Y axis angle = tan-1 (G (270) /G (180) ) +180°
B-Y axis amplitude Vb = SQRT (B ( 0) ∗ B ( 0) +B (270) ∗B (270) )
R-Y axis amplitude Vr = SQRT (R (180) ∗R (180) +R (90) ∗R (90) )
G-Y axis amplitude Vg = SQRT (G (180) ∗G (180) +G (270) ∗G (270) )
No.0069-16/39
LA76832N
6. Chroma input signal :
As for the PAL signal, the burst swings such as 130° and 225° every one hour.
Chroma describes the phase caused when the burst occurs at 135°.
As for the NTSC signal, the burst occurs constantly at 180°.
The figures below are based on the phase of NTSC. When a PAL signal is generated, adjust the phase and then
enter signals.
The item common to both PAL and NTSC is the PAL signal. For those other than this, the measurement must be
performed for each individual signals.
The condition of fsc: Set the following conditions unless otherwise specified.
PAL = 4.433619MHz
NTSC = 3.579545MHz
C-1
X IRE signal (L-X)
C-2
C-3
(Note : fsc±N*fh when the frequency is specified. N should be a natural number and the
nearest value should be used.)
C-4
C-5
No.0069-17/39
LA76832N
Parameter
Symbol
Test
Input
point
signal
Test method
Bus conditions
[Chroma block] : PAL/NTSC common
B-Y/Y amplitude ratio
CLRBY
Bout
21
YIN : L77
Measure the Y system’s output level.
CIN : No signal
V1
C-2
Input a signal to the CIN (only sync signal to
Color : 1000000
the YIN) and measure the output level to
calculate as follows :
CLRBY = 100× (V2/V1)+15%
Color control
CLRMN
characteristics 1
21
C-1
Measure the output amplitude V1 at color
Color : 1111111
control MAX mode and output amplitude V2 at
Color : 1000000
color control CEN mode and, calculate as
follows :
CLRMN = V1/V2
Color control
CLRMM
characteristics 2
21
C-1
Measure the output amplitude V3 at color
Color : 0000000
control MIN mode to calculate as follows :
CLRMM = 20Log (V1/V3)
Color control sensitivity
CLRSE
21
C-1
Measure the output amplitude V4 at color
Color : 1011010
control 90 mode and output amplitude V5 at
Color : 0100110
color control 38 mode to calculate as follows :
CLRSE = 100× (V4-V5) / (V2×52)
Residual higher
E_CAR_B
harmonic level B
Residual higher harmonic
E_CAR_R
level R
Residual higher harmonic
21
Rout
C-1
Measure the 8.86MHz component output
Burst only
amplitude at pin 21.
Burst only
19
E_CAR_G
level G
Gout
20
Measure the 8.86MHz component output
amplitude at pin 19.
C-1
Measure the 8.86MHz component output
Burst only
amplitude at pin 20.
C-1
Measure the output amplitude when 0dB is
0dB
applied to the chroma input and the output
+6dB
amplitude when +6dB is applied to the chroma
[Chroma block] : PAL
ACC amplitude
ACCM1_P
characteristics 1
Bout
21
Color : 1000000
input and calculate the ratio between them.
ACCM1 = 20Log (+6dBdata/0dBdata)
ACC amplitude
ACCM2_P
characteristics 2
Bout
21
C-1
Measure the output amplitude when -20dB is
-20dB
applied to the chroma input and calculate the
Color : 1000000
ratio between them.
ACCM2 = 20Log (-20dBdata/0dBdata)
Demodulation output ratio
RB_P
R-Y/B-Y : PAL
21
C-1
19
Demodulation output ratio
GB_P
G-Y/B-Y : PAL
21
GB_P
G-Y/R-Y : PAL
20
C-4
ANGBR_P
R-Y/B-Y : PAL
21
Measure Bout output amplitude Vbp and
Color : 1000000
GOUT output amplitude Vgbp. And calculate
GB_P = Vgbp/Vbp.
C-5
19
Demodulation angle
Color : 1000000
And calculate RB = Vr/Vb.
20
Demodulation output ratio
Refer to 5. and measure Bout output
amplitude Vb and ROUT output amplitude Vr.
Measure ROUT output amplitude Vrp and
GOUT output amplitude Vgbp. And calculate
Color : 1000000
GR_P = Vgrp/Vrp.
C-1
Refer to 5. and measure the B-Y and R-Y
Color : 1000000
demodulation angle and calculate.
19
APC pull-in range (+)
PULIN+_P
21
C-1
Decrease the chroma fsc frequency from
4.433619MHz+1000Hz and measure the
frequency at which the VCO locks.
APC pull-in range (-)
PULIN-_P
21
C-1
Increase the chroma fsc frequency from
4.433619MHz-1000Hz and measure the
frequency at which the VCO locks.
Continued on next page.
No.0069-18/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Test
Input
point
signal
Test method
Bus conditions
[Chroma block] : NTSC
ACC amplitude
ACCM1_N
characteristics 1
Bout
21
C-1
Measure the output amplitude when 0dB is
0dB
applied to the chroma input and the output
+6dB
amplitude when +6dB is applied to the chroma
input and calculate the ratio between them.
ACCM1 = 20Log (+6dBdata/0dBdata)
ACC amplitude
ACCM2_N
characteristics 2
Bout
21
C-1
Measure the output amplitude when 20dB is
-20dB
applied to the chroma input and calculate the
ratio between them.
ACCM2 = 20Log(-20dBdata/0dBdata)
Demodulation output ratio
RB_N
R-Y/B-Y : NTSC
21
C-1
19
Demodulation output ratio
GB_N
R-Y/B-Y : NTSC
Demodulation angle
ANGBR_N
B-Y/R-Y : NTSC
20
21
ANGGB_N
G-Y/B-Y : NTSC
21
C-1
C-1
KILL_N
21
Refer to 5. and measure GOUT output
amplitude Vg. And calculate GB_N = Vg/Vb.
Color : 1000000
Refer to 5. and measure the B-Y and R-Y
Color : 1000000
demodulation angle and calculate.
Reference : B-Y angle
C-1
Refer to 5. and measure the B-Y and G-Y
Color : 1000000
demodulation angle and calculate.
20
Killer operating point
Color : 1000000
And calculate RB = Vr/Vb.
19
Demodulation angle
Refer to 5. and measure Bout output
amplitude Vb and ROUT output amplitude Vr.
Reference : B-Y angle
C-1
Reduce the input signal until the output level
becomes 150mVp-p or less. Measure the
input level at that moment.
APC pull-in range (+)
PULIN+_N
21
C-1
Decrease the chroma fsc frequency from
3.579545MHz+1000Hz and measure the
frequency at which the VCO locks.
APC pull-in range (-)
PULIN-_N
21
C-1
Increase the chroma fsc frequency from
3.579545MHz-1000Hz and measure the
frequency at which the VCO locks.
Tint center
Tint variable range (+)
TINCEN
TINT+
21
21
C-1
Measure each part of the output level and
TINT : 1000000
calculate the B-Y axis angle.
C-1
Measure each part of the output level and
TINT : 1111111
calculate the B-Y axis angle.
TINT+ = B-Y axis angle -TINCEN
Tint variable range (-)
TINT-
21
C-1
Measure each part of the output level and
TINT : 0000000
calculate the B-Y axis angle.
TINT- = B-Y axis angle -TINCEN
[Filter Block Chroma BPF Characteristic]
C-BPF1A
CBPF1A
Peaker amplitude
21
C-3
Set the chroma frequency (CW) to
FILTER SYS = 0010
PAL signal
4.433619MHz-100kHz and measure V0
C. BYPASS = 0
characteristic
output amplitude. And then, set the chroma
3.93MHz
frequency (CW) to 3.93MHz and measure V1
output amplitude to calculate as follows :
CBPF1A = 20Log (V1/V0)
C-BPF1B
CBPF1B
Peaker amplitude
21
C-3
Measure V2 output amplitude when the
FILTER SYS = 0010
PAL signal
chroma frequency (CW) is 4.13MHz and V3
C. BYPASS = 0
characteristic
output amplitude when it (CW) is 4.73MHz to
4.73/4.13MHz
calculate as follows :
CBPF1B = 20Log (V3/V2)
C-BPF1C
Peaker amplitude
CBPF1B
21
C-3
Set the chroma frequency (CW) to 4.93MHz
FILTER SYS = 0010
PAL signal
and measure V4 output amplitude to calculate
C. BYPASS = 0
characteristic
as follows :
4.93/3.93MHz
CBPF1C = 20Log (V4/V1)
Continued on next page.
No.0069-19/39
LA76832N
Continued from preceding page.
Parameter
C-BPF2A
Symbol
CBPF2A
BandPass amplitude
Test
Input
point
signal
21
Test method
Bus conditions
C-3
Set the chroma frequency (CW) to
FILTER SYS = 0011
PAL signal
4.433619MHz-100MHz and measure V00
C. BYPASS = 0
characteristic
output amplitude. And then, set the chroma
3.93MHz
frequency (CW) to 3.93MHz and measure V10
output amplitude to calculate as follows :
CBPF2A = 20Log (V10/V00)
C-BPF2B
CBPF2B
BandPass amplitude
21
C-3
Measure V20 output amplitude when the
FILTER SYS = 0011
PAL signal
chroma frequency (CW) is 4.13MHz and V30
C. BYPASS = 0
characteristic
output amplitude when it (CW) is 4.73MHz to
4.73/4.13MHz
calculate as follows :
CBPF2B = 20Log (V30/V20)
C-BPF2C
BandPass amplitude
CBPF2C
21
C-3
Set the chroma frequency (CW) to 4.93MHz
FILTER SYS = 0011
PAL signal
and measure V40 output amplitude to
C. BYPASS = 0
characteristic
calculate as follows :
4.93/3.93MHz
CBPF2C = 20Log (V40/V10)
No.0069-20/39
LA76832N
Deflection Block Input Signals and Test Conditions
Unless otherwise specified, the following conditions apply when each measurement is made.
1. VIF, SIF blocks : No signal
2. C input : No signal
3. Sync input : A horizontal/vertical composite sync signal
PAL : 43IRE, horizontal sync signal (15.625kHz) and vertical sync signal (50kHz)
NTSC : 40IRE, horizontal sync signal (15.734264kHz) and vertical sync signal (59.94kHz)
Note : No burst signal, chroma signal shall exist below the pedestal level.
4. Bus control conditions : Initial conditions unless otherwise specified.
5. The delay time from the rise of the horizontal output (pin 27 output) to the fall of the FBP IN (pin 28 input) is 9µs.
6. Pin 13 (vertical size correction circuit input terminal) is connected to VCC (5.0V).
Parameter
Symbol
Test
Input
point
signal
Test method
Bus conditions
[Deflection block]
Horizontal free-running
fH
frequency
27
Y IN :
Connect a frequency counter to the output of
No signal
pin 27 (H out) and measure the horizontal
free-running frequency.
Horizontal pull-in range
Horizontal output pulse
fH PULL
Hduty
length
42
27
Y IN :
Using an oscilloscope, monitor the horizontal
Horizontal
sync signal which is input to the Y IN (pin 42)
/vertical sync
and the pin 27 output (H out) and vary the
signal
horizontal signal frequency to measure the
PAL
pull-in range.
Y IN :
Measure the voltage for the pin 27 horizontal
Horizontal
output pulse’s low-level period.
/vertical sync
signal
PAL
Horizontal output pulse
saturation voltage
V Hsat
27
Y IN :
Measure the voltage for the pin 27 horizontal
Horizontal
output pulse’s low-level period.
/vertical sync
signal
PAL
Continued on next page.
No.0069-21/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Vertical free-running period
VFR50
50 (PAL)
Vertical free-running period
Test
Input
point
signal
23
Test method
Bus conditions
Y IN :
Measure the vertical output period T at pin 23.
CDMODE : 001
No signal
T×15.625kHz (PAL)
(PAL)
T×15.734kHz (NTSC)
CDMODE : 002
VFR60
(NTSC)
60 (NTSC)
Vertical output
2.5V
T
Horizontal output pulse
(PAL) (NTSC)
HPHCEN
(PAL)
(NTSC)
27
42
Y IN :
Measure the delay time from to the rise of the
Horizontal
pin 27 horizontal output pulse to the fall of the
/vertical sync
Y IN horizontal sync signal.
signal
HPHCEN
PAL
NTSC
20IRE
2.5V
Horizontal output
Horizontal position
HPHrange
adjustment range
27
42
Y IN :
With H PHASE : 0 and 31, measure the delay
Horizontal
time from the rise of the pin 27 horizontal
/vertical sync
output pulse to the fall of the Y IN horizontal
signal
sync signal and calculate the difference from
PAL
H PHCEN.
H PHASE : 00000
H PHASE : 11111
Measuring
HPHCEN
20IRE
2.5V
Horizontal output
Horizontal position
HPHstep
adjustment maximum
27
42
variable width
Y IN :
With H PHASE : 0 to 31 varied, measure the
Horizontal
delay time from to the rise of the pin 27
/vertical sync
horizontal output pulse to the fall of the Y IN
signal
horizontal sync signal and calculate the
PAL
variation at each step. Retrieve data for
H PHASE : 00000
to
H PHASE : 11111
maximum variation.
Measuring
HPHCEN
20IRE
Horizontal output
POR circuit operating
voltage
VPOR
25
Y IN :
Connect a DC power supply in place of the
Horizontal
current source to pin 25 and gradually
/vertical sync
decrease the voltage from 5.0V until the BUS
signal
READ TATUS [POR] [STATUS1 (DA01)
PAL
becomes "1". Measure the DC voltage at pin
25 at the moment.
Continued on next page.
No.0069-22/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Horizontal blanking
BLKL0
left variable range@0
Test
Input
point
signal
21
42
Test method
Bus conditions
Y IN :
Measure the time T from the left end of Hsync
Horizontal
at pin 42 Y IN to the left end of blanking at pin
/vertical sync
21 BlueOUT with BLKL = 000.
signal
PAL
Y IN
Hsync
BLKL : 000
T
Blue
Horizontal blanking
BLKL7
left variable range@7
21
42
Y IN :
Measure the time T from the left end of Hsync
Horizontal
at pin 42 Y IN to the left end of blanking at pin
/vertical sync
21 BlueOUT with BLKL = 111.
signal
PAL
Y IN
Hsync
BLKL : 111
T
Blue
Horizontal blanking
BLKR0
right variable range@0
21
42
Y IN :
Measure the time T from the left end of Hsync
Horizontal
at pin 42 Y IN to the left end of blanking at pin
/vertical sync
21 BlueOUT with BLKR = 000.
signal
PAL
Y IN
T
BLKR : 000
Hsync
Blue
Horizontal blanking
BLKR7
right variable range@7
21
42
Y IN :
Measure the time T from the left end of Hsync
Horizontal
at pin 42 Y IN to the left end of blanking at pin
/vertical sync
21 BlueOUT with BLKR = 111.
signal
PAL
Y IN
T
BLKR : 111
Hsync
Blue
Sand castle pulse crest
SANDH
value H
28
Y IN :
Measure the supply voltage at point H of the
Horizontal
pin 28 FBP IN wave form for Hsync period.
/vertical sync
signal
H
PAL
Sand castle pulse crest
value M1
SANDM1
28
Y IN :
Measure the supply voltage at point M1 of the
Horizontal
pin 28 FBP IN wave form for Hsync period.
/vertical sync
signal
PAL
M1
Continued on next page.
No.0069-23/39
LA76832N
Continued from preceding page.
Parameter
Sand castle pulse crest
Symbol
SANDL
value L
Test
Input
point
signal
28
Test method
Bus conditions
Y IN :
Measure the supply voltage at point L of the
Horizontal
pin 28 FBP IN wave form for Hsync period.
/vertical sync
signal
PAL
Sand castle pulse crest
SANDM2
value M2
28
L
Y IN :
Measure the supply voltage at point M2 of the
Horizontal
pin 28 FBP IN wave form for Vsync period.
/vertical sync
signal
PAL
Burst gate pulse length
BGPWD
28
L
Y IN :
Measure the BGP width T of the pin 28 FBP IN
Horizontal
wave form for Hsync period.
/vertical sync
T
signal
PAL
Burst gate pulse I phase
BGPPH
28
42
Y IN :
Measure the time from the left end of Hsync at
Horizontal
pin 42 Y IN to the left end of the pin 28 FBP IN
/vertical sync
wave form for Hsync period.
signal
PAL
Hsync
Y IN
T
FBP IN
Horizontal output stop
Hstop
voltage
25
27
Y IN :
Decrease the current from a source
Horizontal
connected to pin 25 and measure the pin 25
/vertical sync
voltage at which HOUT stops.
signal
X-ray protection circuit
VXRAY
operating voltage
27
34
Y IN :
Connect a DC power supply to pin 34 and
Horizontal
gradually increase the voltage from 0V until
/vertical sync
the pin 27 horizontal output pulse ceases.
signal
Measure the DC voltage at pin 34 at that
moment.
[Vertical screen size correction]
Vertical ramp output
Vspal64
amplitude
Vsnt64
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 24 and line 310.
PAL@64
/vertical sync
Calculate as follows :
NTSC@64
signal
Vspal64 = Vline310-Vline24
PAL
Vsnt64 = Vline262-Vline22
23
NTSC
Vertical ramp output
Line 310
Line 24
Continued on next page.
No.0069-24/39
LA76832N
Continued from preceding page.
Parameter
Vertical ramp output
Symbol
Vspal0
amplitude PAL@0
Test
Input
point
signal
23
Test method
Bus conditions
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 24 and line 310.
/vertical sync
Calculate as follows :
signal
Vspal0 = Vline310-Vline24
VSIZE : 0000000
PAL
Vertical ramp output
Line 310
Line 24
Vertical ramp output
Vspal127
amplitude PAL@127
23
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 24 and line 310.
/vertical sync
Calculate as follows :
signal
Vspal27 = Vline310-Vline24
PAL
VSIZE : 1111111
Vertical ramp output
Line 310
Line 24
[High-voltage dependent vertical size correction]
Vertical size correction@0
Vsizecomp
23
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at the line 24 and line
/vertical sync
310 with VCOMP = 000. Calculate as follows :
signal
Va = Vline310-Vline24
PAL
Apply 4.1V to pin 13 and measure the voltage
VCOMP : 000
at the line 24 and line 310 again. Calculate as
follows : Va = Vline310-Vline24
Calculate as follows : Vsizecomp = Vb/Va
Vertical ramp output
Line 310
Line 24
[Vertical screen position adjustment]
Vertical ramp DC voltage
Vdcpal32
PAL@32
Vdcnt32
23
NTSC@32
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 167. (PAL)
/vertical sync
Monitor the pin 23 vertical ramp output and
signal
measure the voltage at line 142. (NTSC)
PAL
NTSC
Vertical ramp output
Line 167
Vertical ramp DC voltage
PAL@0
Vdcpal0
23
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 167.
/vertical sync
signal
VDC : 000000
Vertical ramp output
PAL
Line 167
Continued on next page.
No.0069-25/39
LA76832N
Continued from preceding page.
Parameter
Vertical ramp DC voltage
Symbol
Vdcpal63
PAL@63
Test
Input
point
signal
23
Test method
Bus conditions
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 167.
/vertical sync
signal
VDC : 111111
Vertical ramp output
PAL
Line 167
Vertical linearity@16
Vlin16
23
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 24, line 167 and
/vertical sync
310. Assign the respective measured values
signal
to Va, Vb and Vc. Calculate as follows :
PAL
Vlin16 = (Vb-Va) / (Vc-Vb)
Line 310
Vertical ramp output
Line 167
Line 24
Vertical linearity@0
Vlin0
23
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 24, line 167 and
/vertical sync
310. Assign the respective measured values
signal
to Va, Vb and Vc. Calculate as follows :
PAL
Vlin0 = (Vb-Va) / (Vc-Vb)
VLIN : 00000
Line 310
Vertical ramp output
Line 167
Line 24
Vertical linearity@31
Vlin31
23
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 24, line 167 and
/vertical sync
310. Assign the respective measured values
signal
to Va, Vb and Vc. Calculate as follows :
PAL
Vlin31 = (Vb-Va) / (Vc-Vb)
VLIN : 11111
Line 310
Vertical ramp output
Line 167
Line 24
Vertical S-shaped
correction @16
VScor16
15
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at line 36, line 60, line
/vertical sync
155, line 179, line 274 and 298. Assign the
signal
respective measured values to Va, Vb, Vc, Vd,
PAL
Ve and Vf. Calculate as follows :
VS : 10000
VScor16 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc)
Vertical ramp output
Line 298
Line 274
Line 179
Line 155
Line 60
Line 36
Continued on next page.
No.0069-26/39
LA76832N
Continued from preceding page.
Parameter
Vertical S-shaped
Symbol
VScor0
correction @0
Test
Input
point
signal
23
Test method
Bus conditions
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at the line 36, line 60, line
/vertical sync
155, line 179, line 274 and line 298
signal
with VSC = 00000.
PAL
Assign the respective measured values to Va,
Vb, Vc, Vd, Ve and Vf. Calculate as follows :
VScor0 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc)
Vertical ramp output
Line 298
Line 274
Line 179
Line 155
Line 60
Line 36
Vertical S-shaped
VScor31
correction @31
23
Y IN :
Monitor the pin 23 vertical ramp output and
Horizontal
measure the voltage at the line 36, line 60, line
/vertical sync
155, line 179, line 274 and line 298
signal
with VSC = 11111.
PAL
Assign the respective measured values to Va,
VSC : 11111
Vb, Vc, Vd, Ve and Vf. Calculate as follows :
VScor31 = 0.5 ( (Vb-Va) + (Vf-Ve) ) / (Vd-Vc)
Vertical ramp output
Line 298
Line 274
Line 179
Line 155
Line 60
Line 36
[Horizontal size adjustment]
East/Wst DC voltage@32
EWdc32
22
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 167.
signal
East/West DC voltage @0
EWdc0
22
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 167.
EWDC : 000000
signal
East/West DC voltage @63
EWdc63
22
Y IN :
Monitor the East/West output (parabolic wave
No signal
output) of pin 22 and measure the voltage at
EWDC : 111111
line 167.
Continued on next page.
No.0069-27/39
LA76832N
Continued from preceding page.
Parameter
Symbol
Test
Input
point
signal
Test method
Bus conditions
[High-voltage dependent horizontal size compensation]
Horizontal size
Hsizecomp
compensation @0
22
Y IN :
Monitor the West/East output of pin 22 and
Horizontal
measure the voltage (Va) at line 167. Apply
/vertical sync
4.0V to pin 13 and measure again the voltage
signal
(Vb) at line 167. Calculate as follows :
HCOMP : 000
Hsizecomp = Va-Vb
[Pincushion distortion compensation]
East/West parabolic
EWamp32
amplitude @32
22
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 24 (Va) and line 167 (Vb). Calculate as
signal
follows :
EWamp32 = Vb-Va
East/West parabolic
EWamp0
amplitude @0
22
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 24 (Va) and line 167 (Vb). Calculate as
signal
follows :
EWAMP : 000000
EWamp32 = Vb-Va
East/West parabolic
EWamp63
amplitude @63
22
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 24 (Va) and line 167 (Vb). Calculate as
signal
follows :
EWAMP : 111111
EWamp63 = Vb-Va
[Trapezoidal distortion compensation]
East/West parabolic tilt
@32
EWtilt32
22
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 24 (Va) and line 310 (Vb). Calculate as
signal
follows :
EWtilt32 = Va-Vb
Continued on next page.
No.0069-28/39
LA76832N
Continued from preceding page.
Parameter
Symbol
East/West parabolic tilt @0
EWtilt0
Test
Input
point
signal
22
Test method
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 24 (Va) and line 310 (Vb). Calculate as
signal
follows :
Bus conditions
EWTILT : 000000
EWtilt32 = Va-Vb
East/West parabolic tilt
EWtilt63
@63
22
Y IN :
Monitor the East/West output (parabolic wave
Horizontal
output) of pin 22 and measure the voltage at
/vertical sync
line 24 (Va) and line 310 (Vb). Calculate as
signal
follows :
EWTILT : 111111
EWtilt32 = Va-Vb
[Corner distortion compensation]
East/West parabolic corner
EWcortop
TOP
22
Y IN :
Monitor the East/West output (parabolic wave
CORTOP :
Horizontal
output) of pin 22 and measure the voltage at
1111-0000
/vertical sync
line 24 under conditions of CORTOP : 1111
signal
(Va) and CORTOP : 0000 (Vb). Calculate as
follows :
Ewcortop = Va-Vb
East/West parabolic corner
BOTTOM
EWcorbot
22
Y IN :
Monitor the East/West output (parabolic wave
CORBOTTOM :
Horizontal
output) of pin 22 and measure the voltage at
1111-0000
/vertical sync
line 310 under conditions of CORBOT : 1111
signal
(Va) and CORBOT : 0000 (Vb). Calculate as
follows :
Ewcorbot = Va-Vb
No.0069-29/39
LA76832N
LA76832N Pin Assignment
PIN
FUNCTION
PIN
1
Audio Output
54
FUNCTION
SIF Input
2
FM Output
53
SIF APC Filter
3
PIF AGC
52
SIF Output
4
RF AGC Output
51
Ext. Audio Input
5
PIF Input1
50
APC Filter
6
PIF Input2
49
VCO Coil 1
7
IF Ground
48
VCO Coil 2
8
IF VCC
47
VCO Filter
9
FM Filter
46
Video Output
10
AFT Output
45
Black Level Detector
11
Bus Data
44
Internal Video Input (S-C IN)
12
Bus Clock
43
Video/Vertical VCC
13
ABL
42
External Video Input (Y IN)
14
Red Input
41
Video/Vertical/BUS Ground
15
Green Input
40
Selected Video Output
16
Blue Input
39
Chroma APC1 Filter
17
Fast Blanking Input
38
4.43MHz Crystal
18
RGB VCC
37
Clamp Filter
19
Red Output
36
Chroma APC2 Filter
20
Green Output
35
Fsc or Csync Output
21
Blue Output
34
XRAY
22
E/W Output
33
CCD/Horizontal Ground
CCD Filter
23
Vertical Output
32
24
Ramp ALC Filter
31
CCD VCC
25
Horizontal/BUS VCC
30
Clock (4MHz) Output
26
Horizontal AFC Filter
29
VCO IREF
27
Horizontal Output
28
Flyback Pulse Input
No.0069-30/39
LA76832N
LA76832N BUS Control Register Bit Allocation Map
Sub Address
DATA BITS
DA0
DA1
ON/OFF
AFC gain & gate
1
0
1
00001
Vreset Timing
Audio. Mute
Video. Mute
0
0
00010
Sync. Kill
0
00000000
0
00011
00100
0
1
VSEPUP
V. KILL
0
0
V. TEST
00111
R. BIAS
01001
B. BIAS
0
Drive. Test
*
0
0
0
Blank. Def
IF Test1
01111
IF Test2
0
0
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
1
0
1
1
COUNT. DOWN. MODE
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
Half tone Def
G. DRIVE
1
1
1
0
0
0
1
1
1
1
1
1
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
B. DRIVE
1
Sub. Bias
0
01110
1
0
Half tone
(0)
01101
1
1
0
1
0
01100
1
H. PAHSE
R. DRIVE
(0)
01011
DA7
V. COMP
0
*
DA6
V. SC
0
G. BIAS
DA5
V. LIN
0
01000
DA4
V. POSI
H BLK R
00110
LSB
DA3
H.FREQ
H BLK L
1
01010
DA2
V. SIZE
1
00101
IC Address (WRITE) : 10111010
MSB
Bright
Contrast
1
(Bits are transmitted in this order.)
Continued on next page.
No.0069-31/39
LA76832N
Continued from preceding page.
Sub Address
00010000
MSB
DATA BITS
DA0
DA1
OSD Cnt. Test
OSD Contrast
0
1
10001
Blk. Str. Def
Coring
10010
Tint. Test
1
Color. Test
Video SW
10110
10111
11000
11001
11010
Gray Mode
11110
11111
0
0
0
0
0
0
Sharpness
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
1
0
0
0
1
Filter. Sys
0
0
0
*
G-Y Angle
0
(0)
(0)
VBLK SW
FBPBLK.
Fsc or Csync
WPL
Pre-shoot adj.
Cross B/W
0
1
0
0
Y Gamma Start
DC. Rest
0
0
0
0
0
Auto. Flesh
C. Ext
C. Bypass
C_Kill ON
C_Kill OFF
0
0
1
0
0
Cont. Test
Digital OSD
Brt. Abl. Def
Mid. Stp. Def
RGB Temp
0
0
0
0
R-Y/B-Y Gain Balance
IF Test
0
Coring Gain
0
0
0
0
Blk. Str. Gain
0
0
0
0
0
1
0
0
0
0
0
Color. Sys
0
Bright. Abl. Threshold
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
R-Y DC Level(White-Balance)
Volume
0
VOL. FIL
RF. AGC
0
0
1
FM. Mute
deem. TC
VIF. Sys. SW
0
1
1
VIDEO. LEVEL
1
0
R-Y/B-Y Angle
B-Y DC Level (White-Balance)
Audio SW
Color killer ope.
Blk. Str. start
0
0
11101
DA7
0
1
11100
DA6
0
1
11011
DA5
Trap Test
0
10101
DA4
Color
0
10100
DA3
Tint
0
10011
LSB
DA2
0
SIF. Sys. SW
0
0
FM. Gain
0
IF. AGC
0
0
1
0
0
0
0
0
FM. LEVEL
0
0
1
(Bits are transmitted in this order.)
No.0069-32/39
LA76832N
LA76832N BUS:Control Register Truth Table
Register Name
0 HEX
1 HEX
ON/OFF (T. Disable)
OFF (Tset Enable)
AFC gain & gate
Auto (Gain)
Gain : Fast
Auto (Gate)
Non-Gate
2 HEX
3 HEX
ON (Test Disable)
V Reset Timing
Normal
1/4H Shift
Audio. Mute
Active
Mute
Video. Mute
Active
Mute
Sync. Kill
Sync active
Sync killed
Vsepup
normal
Vsepup
V. KILL
Vrt active
Vrt killed
Gray Mode
Normal
Gray OSD
Cross B/W
Normal
Black
White
Cross
Vertical Test
Normal
Vrt S Corr
Vrt Lin
Vrt Size
Half Tone Def
Half Tone on
Half Tone off
Drive. Test
Normal
Test Mode
Blank. Def
Blanking
No Blank
OSD Cnt. Test
Normal
Test Mode
Blk. Str. Def
Blk Str On
Blk Str Off
Coring
Core Off
Core On
Tint. Test
Normal
Test Mode
Color. Test
Normal
Test Mode
Video. SW
Internal Mode
External Mode
G-Y Angle
240deg
253deg
VBLK SW
24H to 262H (NTSC)
29H to 256H (NTSC)
25H to 309H (PAL)
30H to 304H (PAL)
Fsc or Csync
35pin : Fsc out
35pin : Csync out
FBPBLK. SW
FBP not or
FBP or
WPL
WPL OFF
WPL ON
Pre-shoot adj.
Normal
+10ns
+20ns
+30ns
Coring Gain
Min
->
->
Max
Y Gamma Start
Y Gamma off
Min
->
Max
DC Rest.
100%
106%
113%
128%
Blk. Str. start
Low
->
High
Blk. Str. Gain
Min
->
Max
Auto Flesh
OFF
ON
C. Ext
Internal Mode
External Mode
C. Bypass
Bypass OFF
Bypass ON
C_Kill ON
Auto Mode
Killer ON
C_Kill OFF
Auto Mode
Killer OFF
Cont. Test
Normal
Test Mode
Digital OSD
Analogue
Digital
Brt. ABL. Def
Brt ABL On
Brt ABL Off
Mid. Stp. Def
Mid Stp On
Mid Stp Off
Audio. SW
Internal Mode
External Mode
VOL. FIL
Normal
Filte OFF
FM. Mute
Active
Mute
de-em TC.
50µs
75µs
VIF. Sys. SW
38.0MHz
38.9MHz
45.75MHz
39.5MHz
SIF. Sys. SW
4.5MHz
5.5MHz
6.0MHz
6.5MHz
FM Gain
50kHz dev.
25kHz dev
IF. AGC
AGC active
AGC defeat
No.0069-33/39
LA76832N
LA76832N BUS : Control Register Truth Table
COUNT DOWN MODE
50Hz/60Hz MODE
Standard/Non-Standard MODE
0 HEX
Auto
Auto
1 HEX
50Hz
Auto
2 HEX
60Hz
Auto
3 HEX
Auto
Auto
4 HEX
Auto
Non-Standard
5 HEX
50Hz
Non-Standard
6 HEX
60Hz
Non-Standard
7 HEX
Auto
Non-Standard
Color System
0 HEX
Auto Mode1 PAL/NTSC/4.43NTSC (/SECAM)
1 HEX
Auto Mode2 PAL-M/PAL-N/NTSC
2 HEX
PAL
3 HEX
PAL-M
4 HEX
PAL-N
5 HEX
NTSC
6 HEX
4.43NTSC
7 HEX
SECAM
Filter System
Y Filter
Chroma Filter
0 HEX
3.58MHz Trap
Peaked 3.58MHz BPF
1 HEX
3.58MHz Trap
Symmetrical 3.58MHz BPF
2 HEX
4.43MHz Trap
Peaked 4.43MHz BPF
3 HEX
4.43MHz Trap
Symmetrical 4.43MHz BPF
4 HEX
6.0MHz Trap
Peaked 3.58MHz BPF
5 HEX
6.0MHz Trap
Symmetrical 3.58MHz BPF
6 HEX
6.0MHz Trap
Peaked 4.43MHz BPF
7 HEX
6.0MHz Trap
Symmetrical 4.43MHz BPF
8-15HEX
4.286MHz Trap
Symmetrical 4.43MHz BPF
LA76832N BUS : Status Byte Truth Table
Register
0 HEX
1 HEX
XRAY
Undetected
Detected
(POR)
(Undetected)
(Detected)
IF. IDENT
Sync Undetected
Sync Detected
RF. AGC
RF. AGC. OUT = ”L”
RF. AGC. OUT = ”H”
IF. LOCK
Lock
Unlock
V. TRI
V. Triger Undetected
V. Triger Detected
50/60
50
60
ST/NONST
Non-Standard
Standard
H. LOCK
Horiz Unlocked
Horiz Locked
KILLER
KILLER OFF
KILLER ON
Color System
0 HEX
B/W
1 HEX
PAL
2 HEX
PAL-M
3 HEX
PAL-N
4 HEX
NTSC
5 HEX
4.43NTSC
6 HEX
SECAM
7 HEX
Do not care
No.0069-34/39
LA76832N
LA76832N BUS Initial Conditions
Register
ON/OFF (T. Disable)
AFC gain & gate
H. FREQ
Register
1 HEX
0 HEX
3F HEX
OSD Cnt. Test
0 HEX
OSD Contrast
0 HEX
Blk. Str. Def
1 HEX
V Reset Timing
0 HEX
Coring
1 HEX
Audio. Mute
0 HEX
Sharpness
00 HEX
Video. Mute
0 HEX
Tint. Test
0 HEX
H. PHASE
10 HEX
Tint
40 HEX
Sync. Kill
0 HEX
Color. Test
0 HEX
V. SIZE
40 HEX
Color
40 HEX
VSEPUP
0 HEX
Video. SW
0 HEX
V. KILL
0 HEX
Trap. Test
4 HEX
V. POSI
20 HEX
Filter. Sys
2 HEX
V. LIN
10 HEX
Gray Mode
0 HEX
V. SC
0B HEX
Cross B/W
0 HEX
H BLK L
4 HEX
G-Y Angle
0 HEX
H BLK R
4 HEX
Color Killer Ope.
4 HEX
V. TEST
0 HEX
VBLK SW
0 HEX
V. COMP
7 HEX
FBPBLK. SW
1 HEX
COUNT. DOWN. MODE
0 HEX
Fsc or Csync
0 HEX
R. BIAS
00 HEX
WPL
1 HEX
G. BIAS
00 HEX
Pre-shoot Adj.
0 HEX
B. BIAS
00 HEX
Coring Gain
3 HEX
R. DRIVE
7F HEX
Y Gamma
0 HEX
Drive Test
0 HEX
DC. Rest.
2 HEX
Half Tone
1 HEX
Blk. Str. start
1 HEX
Half Tone Def
1 HEX
Blk. Str. Gain
1 HEX
G. DRIVE
8 HEX
Auto Flesh
0 HEX
B. DRIVE
7F HEX
C. Ext
0 HEX
1 HEX
Blank. Def
0 HEX
C. Bypass
Sub. Bias
40 HEX
C_Kill ON
0 HEX
Bright
40 HEX
C_Kill OFF
0 HEX
Contrast
40 HEX
Color System
0 HEX
Cont. Test
0 HEX
0 HEX
East/West DC
20 HEX
Digitsl OSD
East/West Amp
20 HEX
Brt. Abl. Def
0 HEX
East/West Tilt
20 HEX
Mid. Stp. Def
0 HEX
East/West Corner TOP
0 HEX
Bright. Abl. Threshold
4 HEX
East/West Corner Bottom
0 HEX
R-Y/B-Y Gain Balance
8 HEX
East/West Test
0 HEX
R-Y/B-Y Angle
8 HEX
H. Size. Comp
7 HEX
B-Y DC Level
8 HEX
R-Y DC Level
8 HEX
Audio. SW
0 HEX
RGB Temp SW
0 HEX
Volume
00 HEX
IF Test
0 HEX
VOL. FIL
0 HEX
IF Test1
0 HEX
RF. AGC
20 HEX
IF Test2
0 HEX
FM. Mute
0HEX
IF Test3
48 HEX
deem. TC
1HEX
VIF. Sys. SW
2 HEX
SIF. Sys. SW
0 HEX
FM. Gain
1 HEX
IF. AGC
0 HEX
VIDEO. LEVEL
4 HEX
FM. LEVEL
10 HEX
No.0069-35/39
LA76832N
LA76832N Bus Control Register Descriptions
Register Name
ON/OFF (T Disable)
Bits
1
General Description
Enable the horizontal output & Disable the Test SW & enable Audio / Video
AFC Gain & gate
1
Select horizontal first loop gain & H-sync gating on/off
H Freq.
6
Align ES Sample horizontal frequency
V Reset Timing
1
Select Vertical Reset Timing
Audio Mute
1
Disable audio outputs
Video Mute
1
Disable video outputs
H PHASE
5
Align sync to flyback phase
Sync Kill
1
Force free-run mode
Vertical Size
7
Align vertical amplitude
Vsep. up
1
Select vertical sync. separation sensitivity
Vertical Kill
1
Disable vertical output
V POSI (Vertical DC)
6
Align vertical DC bias
H BLK L
3
H-Blanking Control (Left side of the screen)
H BLK R
3
H-Blanking Control (Right side of the screen)
V LIN (Vertical Linearity)
5
Align vertical linearity
Vertical S-Correction
5
Align vertical S-correction
Vertical Test
2
Select vertical DAC test modes
Vertical Size Compensation
3
Align vertical size compensation
Count Down Mode
1
Select vertical countdown mode
Red Bias
8
Align Red OUT DC level
Green Bias
8
Align Green OUT DC level
Blue Bias
8
Align Blue OUT DC level
Red Drive
7
Align Red OUT AC level
Drive Test
1
Enable Drive control DAC test modes
Half Tone
2
Adjust half tone level
Half Tone Defeat
1
Half tone defeat SW
Green Drive
4
Align Green OUT AC level
Blue Drive
7
Align Blue OUT AC level
Blank Def
1
Disable RGB output blanking
Sub Bias
7
Align common RGB DC level
Brightness Control
7
Customer brightness control
Contrast Control
7
Customer contrast control
OSD Contrast Test
1
Enable OSD Contrast DAC test mode
OSD Contrast Control
2
Align OSD AC level
Blk Str Def
1
Disable Black stretch
Coring Enable
1
Enable luminance coring
Sharpness Control
6
Customer sharpness control
Tint Test
1
Enable tint DAC test mode
Tint Control
7
Customer tint control
Color Test
1
Enable color DAC test mode
Color Control
7
Customer color control
Video SW
1
Select Video source
Trap. Test
3
Trap Test
Filter System
3
Select Y/C Filter mode
Gray Mode
1
OSD Gray Tone Enable
Cross B/W
2
Service Test Mode (normal/Black/White/Cross)
G-Y Angle Select
1
Select G-Y Angle
Color Killer Operational Point Select
3
Select Color Killer Operational Point
Vertical Blanking SW
1
Select VBLK Period
FBPBLK. SW
1
Enable RGB Blanking or FBP
Fsc or Csync Output
1
Select 35pin Output (0 : Fsc 1 : Csync)
White Peak Limitter SW
1
Enable WPL
Pre-shoot Adjustmant
2
Select Pre-shoot Width
Coring Gain Select
2
Select Coring Gain
Continued on next page.
No.0069-36/39
LA76832N
Continued from preceding page.
Register Name
Bits
General Description
Y Gamma Start
2
Select Y Gamma Start Point
DC Restoration Select
2
Select Luma DC Restoration
Blk. Str. Start Point Select
2
Select Black stretch Start Point
Blk. Str. Gain Select
2
Select Black stretch Gain
AutoFlesh
1
Enable AutoFlesh function
C Ext
1
Selected-C In SW on
C Bypass
1
Select Chroma BPF bypass
C Kill On
1
C Kill Mode (1 : Enable Killer circuit)
C Kill Off
1
Disable Killer circuit
Color System
3
Select Color System
Cont Test
1
Enable contrast DAC test mode
Bright ABL Defeat
1
Disable brightness ABL
Bright Mid Stop Defeat
1
Disable brightness mid stop
Bright ABL Threshold
3
Align brightness ABL threshold
Digital OSD SW
1
Select Digital/Analogue OSD
R-Y/B-Y Balance
4
R-Y/B-Y Gain Balance
R-Y/B-Y Angle
4
R-Y/B-Y Angle
B-Y DC Level
4
B-Y DC Level (White-Balance)
R-Y DC Level
4
R-Y DC Level (White-Balance)
Audio SW
1
Select Audio source
Volume Control
7
Customer volume control
Volume Filter Defeat
1
Disable volume DAC filter
RF AGC Delay
6
Align RF AGC threshold
FM Mute
1
Disable FM outputs
de-em TC.
1
Select de-emphasis Time Constant
VIF System SW
2
Select 38.0/38.9/39.5/45.75
SIF System SW
2
Select 4.5/5.5/6.0/6.5
FM Gain
1
Select FM Output Level
IF AGC Defeat
1
Disable IF and RF AGC
Video Level
3
Align IF video level
FM Level
5
Align WBA output level
East/West DC
6
Align East/West DC
East/West Amp
6
Align East/West amplitude
East/West Tilt
6
Align East/West tilt
East/West Corner TOP
4
Align bottom corner correction
East/West Corner Bottom
4
Align top corner correction
East/West Test
3
Select East/West DAC test modes
H. Size. Comp
3
Align horizontal size compensation
RGB TEST
1
Select test modes
IF TEST
1
Select test modes
IF TEST1
1
Select test modes
IF TEST2
1
Select test modes
IF TEST3
8
Select test modes
No.0069-37/39
LA76832N
Description of Read Status
X-RAY
X-ray detection circuit is activated with thyristor by means of the threshold voltage from Gnd to 1Vbe.
Simultaneously with activation of thyristor, the H drive pulse is stopped and the thyristor output is sent to BUS.
BUS Read enables reading of the real-time state of thyristor. To cancel thyristor operation, it is necessary to lower VCC once.
1HEX : Detected
POR
The POR detection circuit cannot be used in LA76832 and should be ignored.
The circuit is operating and performs detection with HVCC = <3.6V. At the same time, the memory for Bus Read is set. (Memory is
set at power ON.) To reset the memory, it is necessary to set the ON/OFF control bit to zero once.
Since the BUS Read Status and ACK are not returned simultaneously with detection, BUS cannot be read at detection.
Failure of ACK return may be useful at detection. For example, the BUS communication start may be timed with ACK at power ON.
RF. AGC
0 : RFAGC OUT = "L", 1 : RFAGC OUT = "H"
For details, refer to the Application Note.
IF. LOCK
Ignore because this does not function fully at present.
V. TRI
Returns the output of V trigger detection circuit in VCD. The internal memory status is renewed at every A.
1HEX : Detected
ST/NONST
Returns the output of V trigger detection circuit output in VCD standard (262.5 H) and NON standard.
Returns in real time the FF output whose mode is determined in VCD.
1HEX : Standard
For details, contact us after referring to the Application Note.
H. Lock
Detects the phase of FBP and Hsync, integrates the output, and detects in about 40H after HVCO LOCK.
1Hex : Locked
KILLER
Returns the color killer condition.
However, the time constant is long, so that about 1V cycle (16 ms) is necessary for detection.
Pay attention to the wait for change in the device status.
Returns the real-time status for BUS Read.
1HEX : Killer ON
Color sys
Returns the color system status.
Refer to the color system table in the register truth table.
The read status is the same as for BUS Write.
Package Dimensions
unit : mm
3273
No.0069-38/39
LA76832N
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the
performance, characteristics, and functions of the described products in the independent state, and are
not guarantees of the performance, characteristics, and functions of the described products as mounted
in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an
independent device, the customer should always evaluate and test devices mounted in the customer's
products or equipment.
SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any
and all semiconductor products fail with some probability. It is possible that these probabilistic failures
could give rise to accidents or events that could endanger human lives, that could give rise to smoke or
fire, or that could cause damage to other property. When designing equipment, adopt safety measures
so that these kinds of accidents or events cannot occur. Such measures include but are not limited to
protective circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO Semiconductor products (including technical data,services) described
or contained herein are controlled under any of applicable local export control laws and regulations, such
products must not be exported without obtaining the export license from the authorities concerned in
accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or
otherwise, without the prior written permission of SANYO Semiconductor Co., Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO Semiconductor product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and
reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual
property rights or other rights of third parties.
This catalog provides information as of October, 2005. Specifications and information herein are subject
to change without notice.
PS No.0069-39/39