EMIF10-COM01C2 IPAD™ EMI Filter including ESD protection Main product characteristics EMI filtering and ESD protection for: ■ Computers and printers ■ Communication systems ■ Mobile phones Description The EMIF10-COM01C2 is a highly integrated device designed to suppress EMI / RFI noise in all systems subjected to electromagnetic interferences. The EMIF10 Flip-Chip packaging means the package size is equal to the die size. Additionally, this filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up to 15 kV. Lead free coated Flip-Chip (25 Bumps) Order code Part Number Marking EMIF10-COM01C2 FE Figure 1. Benefits ■ EMI symmetrical (I/O) low-pass filter ■ Coating resin on flat side Pin configuration (Bump side) 5 4 3 2 1 I5 I4 I3 I2 I1 A I10 I9 I8 I7 I6 B GND GND GND GND GND C 010 09 08 07 06 D 05 04 03 02 01 E mm2 ■ Very low PCB space consuming: < 6 ■ Very thin package: 0.65 mm ■ High efficiency in ESD suppression on both input and output pins ■ High reliability offered by monolithic integration ■ Lead free package Complies with the following standards: Figure 2. Basic cell configuration Low-pass Filter IEC 61000-4-2 level 4 Input 15 kV (air discharge) Output 8 kV (contact discharge) RI/O = 200Ω Cline = 45 pF TM: IPAD is a trademark of STMicroelctronics April 2006 Rev4 1/7 www.st.com 7 Characteristics 1 EMIF10-COM01C2 Characteristics Table 1. Symbol VPP Tj Absolute Ratings (Tamb = 25 °C) Parameter and test conditions Value Unit ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge 15 8 kV Junction temperature 125 °C Top Operating temperature range - 40 to + 85 °C Tstg Storage temperature range - 55 to + 150 °C Table 2. Electrical Characteristics (Tamb = 25 °C) Symbol Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Resistance between Input and Output Cline Input capacitance per line Symbol VCL VBR VRM Test conditions VBR IR = 1 mA IRM VRM = 3 V per line Rd IPP = 10 A, tp = 2.5 µs RI/O Cline tLH 2/7 I slope : 1 / R d Vinput = 2.8 V Rload = 100 kΩ IPP Min. Typ. Max. Unit 6 8 10 V 500 nA Ω 1 180 At 0 V bias V IRM IR 200 220 Ω 45 50 pF 25 ns EMIF10-COM01C2 Figure 3. Characteristics Figure 4. S21(db) attenuation measurement(1) Analog crosstalk 0.00 0.00 dB dB -10.00 -20.00 -10.00 -30.00 -20.00 -40.00 -50.00 -30.00 -60.00 -70.00 -40.00 -80.00 -90.00 -50.00 100.0k 1.0M 10.0M 100.0M f/Hz -100.00 1.0G 100.0k 1.0M 10.0M Xtalk 1/2 448 f/Hz 100.0M 1.0G Xtalk 1/2 342 1. Spikes at high frequencies are induced by the PCB layout Figure 5. ESD response to IEC 61000-4-2 Figure 6. (+15 kV air discharge) on one input (Vin) and on one output (Vout) ESD response to IEC 61000-4-2 (-15 kV air discharge) on one input (Vin) and on one output (Vout) V(in1) V(in1) V(out1) V(out1) Figure 7. Rise time measurement EMIF10-COM01C2 In Out Vout Square signal Generator Vc = 2.8V Vin 100k Vout Vin 3/7 Characteristics EMIF10-COM01C2 Figure 8. Capacitance versus reverse applied voltage C(pF) 50 F=1MHz Vosc=30mV 40 30 20 10 0 1 2 3 4 5 VR(V) Figure 9. Aplac model 200R out in MODEL = demif10 MODEL = demif10 Demif10 model BV = 7 IBV = 1m CJO = 25p M = 0.3333 RS = 1 VJ = 0.6 TT = 100n sub 1.1 PCB grounding recommendations In order to ensure a good efficiency in terms of ESD protection and filtering behavior, we recommend to implement microvias (100 µm dia.) between the GND bumps and the GND layer. GND bumps can be connected together in PCB layer 1, and in addition, if possible, use through hole vias (200 µm dia.) in both sides of filter to improve contact to GND (layer). This layout will minimize the distance to the ground and thus parasitic inductances. In addition, we recommend to have GND plane wherever possible. 4/7 EMIF10-COM01C2 2 Ordering Information Scheme Ordering Information Scheme EMIF yy - xxx zz Cx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package C = coated flip-chip x = 1: 500µm, Bump = 315µm = 2: Leadfree Pitch = 500µm, Bump = 315µm Package information Figure 10. Flip-Chip package dimensions 500 µm ± 50 695 µm ± 70 315 µm ± 50 2.42 mm ± 50 µm 500 µm ± 50 3 2.42 mm ± 50 µm Figure 11. Foot print recommendations Figure 12. Marking Copper pad Diameter: 250 µm recommended, 300 µm max Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) E Solder stencil opening: 330 µm Solder mask opening recommendation: 340 µm min for 300 µm copper pad diameter x x z y ww 5/7 Ordering information EMIF10-COM01C2 Figure 13. Flip-Chip tape and reel specification Dot identifying Pin A1 location 1.75 +/- 0.1 Ø 1.5 +/- 0.1 4 +/- 0.1 3.5 +/- 0.1 xxz yww ST E ST E xxz yww xxz yww ST E 8 +/- 0.3 0.73 +/- 0.05 4 +/- 0.1 User direction of unreeling All dimensions in mm In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Note: More informations are available in the application notes: AN1235: “Flip-Chip: Package description and recommendations for use” AN1751: "EMI Filters: Recommendations and measurements" 4 5 6/7 Ordering information Ordering code Marking Package Weight Base qty Delivery mode EMIF10-COM01C2 FE Flip-Chip 8.3 mg 5000 Tape and reel Revision history Date Revision Description of Changes 12-Jul-2005 1 First issue. 12-Aug-2005 2 Lead free added in Benefits on page 1. ECOPACK statement added on page 6. 27-Jan-2006 3 Improved graphics to show coating. Updated attenuation measurement graphic (Figure 3). Weight corrected. 04-Apr-2006 4 Reformatted to current standard. Pin identification in Figure 1 updated. EMIF10-COM01C2 Please Read Carefully: Information in this document is provided solely in connection with ST products. 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