EMIF02-MIC02F3 2-line IPAD™, EMI filter including ESD protection Features ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency EMI filtering ■ Lead-free package ■ Very low PCB space consumption: 0.9 mm2 ■ Very thin package: 0.60 mm ■ High efficiency ESD suppression ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging Flip Chip (6 bumps) Figure 1. Complies with the following standards ■ ■ IEC61000-4-2 level 4 on external pins: – 15 kV (air discharge) – 8 kV (contact discharge) Pin layout (bump side) 3 2 1 E2 GND E1 A I2 GND I1 B IEC61000-4-2 level 1 on internal pins: – 2 kV (air discharge) – 2 kV (contact discharge) Applications Figure 2. Where EMI filtering in ESD sensitive equipment is required: ■ Mobile phones and communication systems ■ Computers, printers and MCU Boards Basic cell configuration Low-pass Filter I1 I2 E1 E2 Ri/o = 470 Ω Cline = 16 pF Description GND GND GND The EMIF02-MIC02F3 is a highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. This filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up 15 kV. TM: IPAD is a trademark of STMicroelectronics. April 2008 Rev 2 1/8 www.st.com Characteristics 1 EMIF02-MIC02F3 Characteristics Table 1. Absolute ratings (limiting values) Symbol VPP Tj Parameter External pins (A1, A3): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Internal pins (B1, B3): ESD discharge IEC61000-4-2, air discharge ESD discharge IEC61000-4-2, contact discharge Unit 15 8 kV 2 2 Junction temperature 125 °C Top Operating temperature range -40 to + 85 °C Tstg Storage temperature range -55 to 150 °C Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Parameters VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between Input & Output Cline Input capacitance per line Symbol 2/8 Value I IPP VCL VBR VRM Test conditions IR IRM IRM IR VRM VBR VCL V IPP Min Typ 14 16 VBR IR = 1 mA IRM VRM = 12 V per line RI/O Tolerance ± 10 % 470 Cline Vline = 0V, VOSC = 30 mV, F = 1 MHz, (measured under zero light conditions) 16 Max Unit V 200 nA Ω 20 pF EMIF02-MIC02F3 Figure 3. Characteristics S21 (dB) attenuation measurement Figure 4. (Line 1) dB 0.00 0.00 -10.00 -10.00 -20.00 -20.00 -30.00 -30.00 -40.00 -40.00 -50.00 S21 (dB) attenuation measurement (Line 2) dB -50.00 f (Hz) f (Hz) -60.00 -60.00 100.0k 1.0M 10.0M 100.0M 1.0G 100.0k Line 1 Figure 5. 0.00 1.0M 10.0M 100.0M 1.0G Line 2 Analog crosstalk measurement Figure 6. Digital crosstalk measurement dB -10.00 -20.00 Output Line 2 10mV/d -30.00 -40.00 -50.00 -60.00 Input Line 1 -70.00 1V/d -80.00 10ns/d 5Gs/s f (Hz) -90.00 -100.00 100.0k 1.0M 10.0M 100.0M 1.0G Xtalk 1/2 Figure 7. ESD response to IEC 61000-4-2 Figure 8. (+15 kV air discharge) on one input and on one output ESD response to IEC 61000-4-2 (-15 kV air discharge) on one input and on one output Input Input 20V/d 20V/d Output Output 10V/d 100ns/d 10V/d 100ns/d 3/8 Application information Figure 9. EMIF02-MIC02F3 Line capacitance versus applied voltage 18 CLINE (pF) 16 14 12 10 8 6 4 2 VLINE (V) 0 0 2 1 2 3 4 5 6 7 8 9 10 11 12 Application information Figure 10. Aplac model E1 Rbump Lbump Rline Lbump Rbump I1 MODEL = D2 MODEL = D1 MODEL = D3 MODEL = D1 MODEL = D2 E2 I2 Rbump Ls Rs Lbump E1 I1 Rline Rs Lbump Ls Port1 Port2 50 50 Lbump Lbump Rbump Rbump Lgnd Lgnd Rgnd Rgnd Rbump Figure 11. Aplac parameters Variables aplacvar Rline 490 aplacvar C_d1 11p aplacvar C_d2 5p aplacvar C_d3 240p aplacvar L 2pH aplacvar Ls 950pH aplacvar Rs 150m aplacvar Lbump 50pH aplacvar Rbump 20m aplacvar Lgnd 80pH aplacvar Rgnd 100m 4/8 Diode D1 BV=7 CJO=c_d1 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.85 VJ=0.6 TT=50n Diode D2 BV=7 CJO=c_d2 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.85 VJ=0.6 TT=50n Diode D3 BV=7 CJO=c_d3 IBV=1u IKF=1000 IS=10f ISR=100p N=1 M=0.3333 RS=0.47 VJ=0.6 TT=50n EMIF02-MIC02F3 3 Ordering information scheme Ordering information scheme Figure 12. Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip Chip x = 3: Lead-free, pitch = 400 µm, bump = 255 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 13. Package dimensions 185 µm ± 10 605 µm ± 55 1.17 mm ± 30µm 400 µm ± 40 400 µm ± 40 185 µm ± 10 4 0.77 mm ± 30 µm 255 µm ± 40 5/8 Ordering information EMIF02-MIC02F3 Figure 14. Footprint Figure 15. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 220 µm recommended 260 µm maximum Solder mask opening: 300 µm minimum E x x z y ww Solder stencil opening : 220 µm recommended Figure 16. Flip Chip tape and reel specifications Dot identifying Pin A1 location 3.5 ± 0.1 0.87 ST E xxz yww 4 ± 0.1 User direction of unreeling All dimensions in mm Note: 1.27 ST E xxz yww ST E xxz yww 8 ± 0.3 0.71 ± 0.05 1.75 ± 0.1 Ø 1.5 ± 0.1 4 ± 0.1 More information is available in the application notes: AN2348: “STMicroelectronics 400 micro-metre Flip Chip: Package description and recommendation for use” AN1751: EMI Filters: Recommendations and measurements 5 Ordering information Table 3. 6/8 Ordering information Order code Marking Package Base qty Delivery mode EMIF02-MIC02F3 HB Flip Chip 5000 Tape and reel (7”) EMIF02-MIC02F3 6 Revision history Revision history Table 4. Document revision history Date Revision Changes 17-Jan-2006 1 Initial release. 28-Apr-2008 2 Updated ECOPACK statement. Updated Figure 12, Figure 13 and Figure 16. Reformatted to current standards. 7/8 EMIF02-MIC02F3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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