EMIF10-LCD02F3 10-line IPAD™, EMI filter and ESD protection for LCD and cameras Features ■ Lead-free package ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering ■ 400 µm pitch ■ Compatible with high speed data rate ■ Very low PCB space occupation: < 4mm2 ■ Very thin package: 0.60 mm ■ High efficiency in ESD suppression ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging Flip Chip 24 bumps Figure 1. Complies with the following standards ■ ■ IEC61000-4-2 level 4 on inputs and outputs – 15 kV (air discharge) – 8 kV (contact discharge) Pin layout (bump side) 5 4 3 2 1 O1 O2 GND I1 I2 A O3 O4 I3 I4 B O5 O6 GND I5 I6 C O7 O8 GND I7 I8 D O9 O10 GND I9 I10 E MIL STD 883E - Method 3015-6 Class 3 Applications Where EMI filtering in ESD sensitive equipment is required : ■ LCD for mobile phones ■ Computers and printers ■ Communication systems ■ MCU boards Figure 2. Device configuration Low-pass Filter Output Input Description GND GND GND Ri/o = 70Ω Cline = 30pF The EMIF10-LCD02F3 is a 10-line highly integrated device designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interference. The EMIF10 Flip Chip packaging means the package size is equal to the die size. This filter includes ESD protection circuitry, which prevents damage to the protected device when subjected to ESD surges up 15kV. April 2008 TM: IPAD is a trademark of STMicroelectronics. Rev 2 1/8 www.st.com 8 Characteristics 1 EMIF10-LCD02F3 Characteristics Table 1. Symbol Tj Absolute maximum ratings (Tamb = 25 °C) Parameter and test conditions Maximum junction temperature Unit 125 °C Top Operating temperature range -40 to +85 °C Tstg Storage temperature range -55 to 150 °C Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Parameters VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage IPP Peak pulse current RI/O Series resistance between Input & Output Cline Input capacitance per line Symbol I IF VF VCL VBR VRM V IRM IR Test conditions IPP Min Typ Max Unit 6 8 10 V 200 nA VBR IR = 1 mA IRM VRM = 3 V 50 R2 Tolerance ± 20% 70 Cline 2/8 Value Vline = 0 V, VOSC = 30 mV, F =1 MHz Ω 30 pF EMIF10-LCD02F3 Figure 3. Characteristics S21(dB) all lines attenuation Figure 4. measurement and Aplac simulation Analog cross talk measurement 0.00 dB -10.00 -20.00 -30.00 -40.00 -50.00 -60.00 -70.00 -80.00 -90.00 -100.00 100.0k 1.0M 10.0M 100.0M 1.0G f/Hz Xtalk 1/2 Figure 5. ESD response to IEC 61000-4-2 Figure 6. (+15 kV air discharge) on one input and on one output ESD response to IEC 61000-4-2 (-15 kV air discharge) on one input and on one output Input 10V/d Input 10V/d Output 10V/d Output 10V/d 100ns/d 100ns/d Figure 7. Line capacitance versus applied voltage Cline (pF) 30 25 20 15 10 5 Vline (V) 0 0 1 2 3 4 5 6 3/8 Application information 2 EMIF10-LCD02F3 Application information Figure 8. Device structure (one cell) Lbump Rbump Rline Rbump Lbump O1 I1 MODEL = D1 MODEL = D2 bulk bulk MODEL = D3 Cbump Figure 9. Rbump Rbump Rbump Cbump Lbump Cbump Lbump Cbump Lbump Lbump Rgnd Rgnd Rgnd Rgnd Lgnd Lgnd Lgnd Lgnd Aplac model variables aplacvar Rline 70 aplacvar C_d1 15p aplacvar C_d2 15p aplacvar C_d3 600p aplacvar Ls 950pH aplacvar Rs 150m aplacvar Lbump 50pH aplacvar Rbump 20m aplacvar Cbump 150f aplacvar Lgnd 50pH aplacvar Rgnd 100m aplacvar Rsub 10m 4/8 Rbump Diode D1 BV=7 IBV=1m CJO=C_d1 M=0.28 RS=0.1 VJ=0.6 TT=100n Diode D2 BV=7 IBV=1m CJO=C_d2 M=0.28 RS=0.1 VJ=0.6 TT=100n Diode D3 BV=7 IBV=1m CJO=C_d3 M=0.28 RS=0.01 VJ=0.6 TT=100n EMIF10-LCD02F3 3 Ordering information scheme Ordering information scheme Figure 10. Ordering information scheme EMIF yy - xxx zz F3 EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10 (pF) or 3 letters = application 2 digits = version Package F = Flip Chip 3 = Lead-free, pitch = 400 µm, bump = 255 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 11. Package dimensions 255µm± 40 605µm ± 55 185µm ± 10 1.97mm ± 30µm 400µm ± 40 400µm ± 40 185µm ± 10 4 1.97mm ± 30µm 5/8 Ordering information EMIF10-LCD02F3 Figure 12. Footprint Figure 13. Marking Copper pad Diameter: 220 µm recommended 260 µm maximum Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Solder mask opening: 300 µm minimum E x x z y ww Solder stencil opening: 220 µm recommended Figure 14. Flip Chip tape and reel specification Dot identifying Pin A1 location 1.75 ± 0.1 Ø 1.5 ± 0.1 4 ± 0.1 3.5 ± 0.1 2.11 ST E xxz yww 4 ± 0.1 User direction of unreeling All dimensions in mm Note: 2.11 ST E xxz yww ST E xxz yww 8 ± 0.3 0.69 ± 0.05 More information is available in the application notes: N2348: “STMicroelectronics 400 micro-metre Flip Chip: Package description and recommendation for use” AN1751: "EMI Filters: Recommendations and measurements" 5 Ordering information Table 3. 6/8 Ordering information Order code Marking Package Weight Base qty Delivery mode EMIF10-LCD02F3 GY Flip Chip 5.0 mg 5000 Tape and reel 7” EMIF10-LCD02F3 6 Revision history Revision history Table 4. Document revision history Date Revision Changes 11-Jul-2005 1 First issue. 28-Apr-2008 2 Updated ECOPACK statement. Updated Figure 10, Figure 11, Figure 12 and Figure 14. Reformatted to current standards. 7/8 EMIF10-LCD02F3 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. 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