STMICROELECTRONICS EMIF02

EMIF02-SPK01F2
2-line IPAD™, EMI filter and ESD protection
Features
■
EMI symmetrical (I/O) low-pass filter
■
High efficiency in EMI filtering
■
Very low PCB space consuming:
1.07 mm x 1.47 mm
■
Very thin package: 0.65 mm
■
High efficiency in ESD suppression
■
High reliability offered by monolithic integration
■
High reducing of parasitic elements through
integration and wafer level packaging
Flip-Chip package
(5 bumps)
Figure 1.
3 2 1
Complies with the following standards:
■
Pin configuration (bump side)
IEC 61000-4-2 level 4, on output pins:
– 15 kV (air discharge)
– 8 kV (contact discharge)
I2
■
IEC 61000-4-2 Level 1, on input pins:
– 2 kV (air discharge)
– 2 kV (contact discharge)
O2
■
MIL STD 883E - Method 3015-6 Class 3
I1
B
GND
Figure 2.
A
O1
C
Basic cell configuration
Low-pass Filter
Applications
Input
Output
Where EMI filtering in ESD sensitive equipment is
required:
■
Mobile phones and communication systems
■
Computers, printers and MCU Boards
Ri/o = 10 Ω
Cline = 200 pF
GND
GND
GND
Description
The EMIF02-SPK01 is a highly integrated device
designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interferences. The EMIF02 Flip-Chip packaging
means the package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents damage to the application when
subjected to ESD surges up 15 kV.
TM: IPAD is a trademark of STMicroelectronics.
September 2011
Doc ID 11740 Rev 2
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www.st.com
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Electrical characteristics
1
EMIF02-SPK01F2
Electrical characteristics
Table 1.
Absolute maximum ratings (Tamb = 25 °C)
Symbol
Tj
Parameter
Maximum junction temperature
Value
Unit
125
°C
Top
Operating temperature range
-40 to +85
°C
Tstg
Storage temperature range
-55 to +150
°C
Figure 3.
Electrical characteristics (definitions)
I
Symbol
VBR
IRM
VRM
VCL
RD
IPP
IR
VF
Cline
=
=
=
=
=
=
=
=
=
Parameter
Breakdown voltage
Leakage current @ VRM
Stand-off voltage
Clamping voltage
Dynamic impedance
Peak pulse current
Breakdown current
Forward voltage drop
Line capacitance
IPP
VCL VBR
IR
IRM
VRM
IRM
V
VRM VBR VCL
IR
IPP
Table 2.
Electrical characteristics (Tamb = 25 °C)
Symbol
2/7
Test condition
Min.
Typ.
6
8
Max.
Unit
VBR
IR = 1 mA
IRM
VRM = 3 V per line
RI/O
Tolerance ± 20%
10
Ω
Cline
VR = 0 V
200
pF
V
500
Doc ID 11740 Rev 2
nA
EMIF02-SPK01F2
Figure 4.
Electrical characteristics
S21 (dB) attenuation measurements Figure 5.
and Aplac simulation
0.00
Analog crosstalk measurements
0.00
dB
dB
--5.00
--10.00
--10.00
--20.00
--15.00
--20.00
--30.00
--25.00
--40.00
--30.00
--50.00
-35.00
-40.00
100.0k
1.0M
10.0M
f/Hz
100.0M
--60.00
100.0k
1.0G
Figure 6.
ESD response to IEC 61000-4-2
(+15kV air discharge) on one input
V(in) and one output V(out)
Figure 7.
Figure 8.
Line capacitance versus applied voltage
1.0M
10.0M
f/Hz
100.0M
1.0G
ESD response to IEC 61000-4-2
(–15kV air discharge) on one input
V(in) and one output V(out)
C(pF)
250
F=1MHz
Vosc=30mVRMS
Tj=25°C
200
150
100
50
VR(V)
0
0
1
2
3
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5
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Electrical characteristics
Figure 9.
IN1
EMIF02-SPK01F2
Aplac mode
Rbump Lbump
Rspk
Lspk
Lbump Rbump
GND
OUT1
Lsub
model = D1
model = D2
Rsub
Rbump
GND
model = D3
Lbump
model = D1
model = D2
Lgnd
Cgnd
IN2
Rgnd
OUT2
Rbump Lbump
Rspk
Lspk
Lbump Rbump
Ground return
EMIF02-SPK01F1 model
Figure 10. Aplac parameters
Model D1
Model D3
Model D2
aplacvar Ls 1nH
CJO=Cdiode1
CJO=Cdiode3
CJO=Cdiode2
aplacvar Rs 150m
BV=7
BV=7
BV=7
aplacvar Rspk 10
IBV=1u
IBV=1u
IBV=1u
aplacvar Lspk 10p
IKF=1000
IKF=1000
IKF=1000
aplacvar Cdiode1 234pF
IS=10f
IS=10f
IS=10f
aplacvar Cdiode2 3.5ppF
ISR=100p
ISR=100p
ISR=100p
aplacvar Cdiode3 1nF
N=1
N=1
N=1
aplacvar Lbump 50pH
M=0.3333
M=0.3333
M=0.3333
aplacvar Rbump 10m
RS=0.7
RS=0.12
RS=0.3
aplacvar Rsub 0.5m
VJ=0.6
VJ=0.6
VJ=0.6
aplacvar Lsub 10pH
TT=50n
TT=50n
TT=50n
aplacvar Rgnd 1m
aplacvar Lgnd 50pH
aplacvar Cgnd 0.15pF
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EMIF02-SPK01F2
2
Ordering information
Ordering information
Figure 11. Ordering information scheme
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip-Chip
x = 1: 500µm, Bump = 315µm
= 2: Leadfree Pitch = 500µm, Bump = 315µm
Packaging information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 12. Flip-Chip dimensions
500 µm ± 10
315 µm ± 50
650 µm ± 50
1.47 mm ± 50µm
0
µm
±
15
435 µm
250 µm ± 10
50
3
1.07 mm ± 50µm
Figure 13. Footprint
Figure 14. Marking
Dot, ST logo
xx = marking
z = manufacturing location
yww = datecode
(y = year ww = week)
Copper pad Diameter :
250 µm recommended, 300 µm max
Solder stencil opening: 330µm
E
x x z
y ww
Solder mask opening recommendation:
340 µm min for 315 µm copper pad diameter
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Ordering information
EMIF02-SPK01F2
Figure 15. Packing
Dot identifying Pin A1 location
Ø 1.5 ± 0.1
ST E
ST E
xxz
yww
xxz
yww
xxz
yww
0.73 ± 0.05
4 ± 0.1
User direction of unreeling
All dimensions in mm
4
1.75 ± 0.1
ST E
3.5 ± 0.1
8 ± 0.3
4 ± 0.1
Ordering information
Table 3.
Ordering information
Order code
EMIF02-SPK01F2
Marking
Package
Weight
Base qty
Delivery mode
FX
Flip Chip
2.1 mg
5000
Tape and reel (7”)
Note:
More packing information is available in the applications note:
AN1235: “Flip-Chip: package description and recommendations for use”
AN 1751: “EMI filters: Recomendations and measurements”
5
Revision history
Table 4.
6/7
Document revision history
Date
Revision
Changes
14-Oct-2006
1
Initial release.
08-Sep-2011
2
Updated Figure 12 and Figure 13.
Doc ID 11740 Rev 2
EMIF02-SPK01F2
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