EMIF10-1K010F2 10-line IPAD™, EMI filter including ESD protection Features ■ ■ ■ ■ ■ ■ ■ ■ EMI symmetrical (I/O) low-pass filter High efficiency in EMI filtering Lead free package Very low PCB space consuming: 2.42 mm x 2.42 mm Very thin package: 0.650 mm High efficiency in ESD suppression on both input and output pins (IEC 61000-4-2 level 4) High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging Flip Chip (24 bumps) Figure 1. Complies with the following standards: ■ ■ IEC 61000-4-2 level 4 – 15 kV (air discharge) – 8 kV (contact discharge) Pin configuration (bump side) 5 4 3 2 I7 GND GND I3 I9 GND GND I5 I1 B I10 I8 I6 I4 I2 C 09 07 05 03 01 D 010 08 06 04 02 E 1 A MIL STD 883F - Method 3015.7 Class 3 Applications Where EMI filtering in ESD sensitive equipment is required: ■ ■ ■ ■ Mobile Phones Computers and printers Communication systems MCU Boards Figure 2. Basic cell configuration Low pass filter Input Description The EMIF10-1K010F2 is a highly integrated device designed to suppress EMI / RFI noise in all systems subjected to electromagnetic interferences. The EMIF10 Flip-Chip packaging means the package size is equal to the die size. Output RI/O = 1 kΩ Cline = 100 pF Additionally, this filter includes an ESD protection circuitry which prevents damage to the application when subjected to ESD surges up to 15 kV. TM: IPAD is a trademark of STMicroelectronics. April 2008 Rev 4 1/8 www.st.com 8 Characteristics 1 EMIF10-1K010F2 Characteristics Table 1. Absolute ratings (Tamb = 25 °C) Symbol VPP Tj Parameter and test conditions Unit ESD discharge IEC 61000-4-2 – Air discharge – Contact discharge MIL STD 883F - Method 3015.7 Class 3 15 8 25 Junction temperature 125 °C kV Top Operating temperature range - 40 to + 85 °C Tstg Storage temperature range - 55 to + 150 °C Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Parameter VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Resistance between Input and Output Cline Input capacitance per line Symbol Test conditions VBR IR = 1 mA IRM VRM = 3 V per line Rd IPP = 10 A, tp = 2.5 µs RI/O Cline 2/8 Value F = 1 MHz VOSC = 30 mV Vline = 0 V I IF VBR VCL VF VRM V IRM IR IPP Min. Typ. Max. Unit 6 8 10 V 200 nA Ω 1 900 1000 1100 Ω 80 100 120 pF EMIF10-1K010F2 Figure 3. Characteristics S21(db) attenuation measurement Figure 4. Analog cross talk measurements 0.00 dB - 10.00 - 20.00 - 30.00 - 40.00 - 50.00 1.0M Figure 5. 3.0M 10.0M 30.0M f/Hz 100.0M 300.0M 1.0G 3.0G Figure 6. ESD response to IEC 61000-4-2 (+15 kV air discharge) on one input (Vin) and on one output (Vout) ESD response to IEC 61000-4-2 (-15 kV air discharge) on one input (Vin) and on one output (Vout) INPUT INPUT OUTPUT OUTPUT Figure 7. Capacitance versus reverse applied voltage C (pF) 120 Input / GND 100 80 60 40 20 VR (V) 0 0.0 1.0 2.0 3.0 4.0 5.0 3/8 Application information 2 EMIF10-1K010F2 Application information Figure 8. Aplac model GNDi Rs Ls 50pH 50m 50pH Ii 50m + + Port15 - 50 Ls Rs Oi + cap_line Port16 50 cap_line Lbump + - Rbump Rgnd Lgnd Rgnd Lgnd Rgnd Lgnd Rseries Oi Ii Ii Rgnd Lgnd Csubump Rsubump + Rsub MODEL = demif10 Lhole + sub GNDi MODEL = demif10 Oi Csubump Rsubump + sub Figure 9. Aplac parametersl Cz Rseries cap_line Ls Rbump Lbump Rs Csubump Rsubump Rsub lhole Rhole cap_hole Rgnd Ignd 4/8 57pF 960 0.8pF 0.6nH 50m 50pH 0.15 15pF 0.15 0.1 1.2nH opt 0.15 0.15pF 0.25 0.4nH Model demif10 BV = 7 IBV = 1m CJO = Cz M = 0.3333 Rs = 1 VJ = 0.6 TT = 100n cap_hole Rhole EMIF10-1K010F2 3 Ordering information scheme Ordering information scheme Figure 10. Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 100 (pF) or 3 letters = application 2 digits = version Package F = Flip Chip X = 2: lead-free pitch = 500 µm, bump = 315 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 11. Flip Chip package dimensions 500 µm ± 50 310 µm ± 50 650 µm ± 65 2.39 mm ± 30 µm 500 µm ± 50 210 µm 2.39 mm ± 30 µm 210 µm 4 250 µm ± 40 5/8 Ordering information EMIF10-1K010F2 Figure 12. Footprint recommendations Figure 13. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 250 µm recommended, 300 µm max Solder stencil opening: 330 µm E x x z y ww Solder mask opening recommendation: 340 µm min for 310 µm copper pad diameter Figure 14. Flip Chip tape and reel specification Dot identifying Pin A1 location 3.5 ± 0.1 2.60 ST E User direction of unreeling Ordering information Table 3. Note: 2.60 4 ± 0.1 All dimensions in mm 5 xxz yww E xxz yww ST E xxz yww ST 8 ± 0.3 0.73 ± 0.05 Ordering information Order code Marking Package Weight Base qty Delivery mode EMIF10-1K010F2 FD Flip Chip 7.9 mg 5000 Tape and reel More information is available in the application notes: AN1235: “Flip Chip: Package description and recommendations for use” AN1751: "EMI Filters: Recommendations and measurements 6/8 1.75 ± 0.1 Ø 1.5 ± 0.1 4 ± 0.1 EMIF10-1K010F2 6 Revision history Revision history Table 4. Document revision history Date Revision Description of changes 12-Oct-2004 1 First issue. 28-Aug-2006 2 Die layout upgrade. 18-Sep-2006 3 Added pocket dimensions to Figure 11. 17-Apr-2008 4 Updated ECOPACK statement. Updated Figure 10, Figure 11, Figure 12. and Figure 14. Reformatted to current standards. 7/8 EMIF10-1K010F2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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