EMIF04-MMC02F2 4-line IPAD™, EMI filter including ESD protection Features ■ EMI symmetrical (I/O) low-pass filter ■ High efficiency in EMI filtering ■ Lead-free package ■ Very low PCB space occupation: 1.57 mm x 2.07 mm ■ Very thin package: 0.65 mm ■ High efficiency in ESD suppression ■ High reliability offered by monolithic integration ■ High reduction of parasitic elements through integration and wafer level packaging Flip Chip 11 bumps Figure 1. Complies with the standards: ■ IEC 61000-4-2 Level 4 – 15 kV (air discharge) – 8 kV (contact discharge) Application Where EMI filtering in ESD sensitive equipment is required: ■ Figure 2. Pin layout (bump side) 3 2 1 I1 O1 I2 VD2 O2 B I3 VD1 O3 C I4 GND O4 D A Device configuration MultiMediaCard for mobile phones, personal digital assistant, digital camera, MP3 players... VD2 R20 VD1 R10 R1 Description O1 (Data) I1 R2 I2 R3 I3 The EMIF04-MMC02 is a highly integrated device designed to suppress EMI/RFI noise for a MultiMediaCard port. The EMIF04 Flip Chip packaging means the package size is equal to the die size. O2 (CLK) O3 (CMD) O4 I4 R4 Cline = 20pF max. GND This filter includes ESD protection circuitry, which prevents damage to the application when it is subjected to ESD surges up to 15 kV. TM: IPAD is a trademark of STMicroelectronics. April 2008 Rev 4 1/8 www.st.com 8 Electrical characteristics 1 EMIF04-MMC02F2 Electrical characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Unit PR DC power per resistor 70 mW Tj Junction temperature 125 °C Top Operating temperature range -40 to + 85 °C Tstg Storage temperature range -55 to +150 °C \ Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Parameters VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between input and output Cline Input capacitance per line Symbol 2/8 Value Test conditions VBR IR = 1 mA IRM VRM = 3 V Cline @0V Min Typ Max 6 Unit V 0.1 0.5 µA 20 pF R1,R2,R3,R4 Tolerance ± 5% 47 Ω R10 Tolerance ± 5% 13 kΩ R20 Tolerance ± 5% 56 kΩ EMIF04-MMC02F2 Figure 3. Electrical characteristics S21 (dB) attenuation measurement Figure 4. and Aplac simulation Xtalk measurements C3/B1 EMIF04-MMC02F2: Aplac vs measurement (C3/C1 line) 0.00 dB - 5.00 Cross talk measurement 0.00 dB -10.00 Simulation - 10.00 -20.00 Measurement - 15.00 -30.00 - 20.00 - 25.00 -40.00 - 30.00 -50.00 - 35.00 -60.00 - 40.00 -70.00 - 45.00 - 50.00 1.0M Figure 5. 3.0M 10.0M 30.0M 100.0M f/Hz 300.0M 1.0G -80.00 1.0M 3.0G ESD response to IEC 61000-4-2 (+15kV contact discharge) on one input (Vin) and one output (Vout) Figure 6. 3.0M 10.0M 100.0M 300.0M f/Hz 1.0G 3.0G ESD response to IEC 61000-4-2 (-15kV contact discharge) on one input (Vin) and one output (Vout) Vin Vin Vout Figure 7. 30.0M Vout Junction capacitance versus reverse applied voltage typical values C(pF) 20 F=1MHz Vosc=30mVRMS Tj=25°C 18 16 14 12 10 8 6 4 2 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VR(V) 3/8 Application information 2 EMIF04-MMC02F2 Application information Figure 8. Device structure B22 C22 R20 R10 R1 A22 A33 R2 B33 B11 R3 C33 C11 R4 D11 D33 MODEL = demif04 MODEL = demif04 bulk Model demif04 BV = 7 IBV = 1m CJO = Cz M = 0.3333 RS = 1 VJ = 0.6 TT = 100n MODEL = demif04_gnd D2 Figure 9. Aplac model connections Rbump Lbump D2 Rbump Lbump A33 A3 + + bulk Rbump Rbump Lbump B33 + + bulk Rbump Lbump B22 B2 B11 B1 + bulk Cbump Rbump Cbump Rbump Cbump Rbump Rbump Lbump Rbump Lbump Rbump Lbump C33 C3 + Lgnd bulk Cbump Rbump Cgnd bulk Cbump Rbump Rbump Lbump B3 A22 A2 Cbump Rbump Lbump C22 C2 + + bulk Cbump Rbump D3 D11 D1 Rgnd + Cbump Rbump bulk + Cbump Rbump Diodes aplacvar Cz 14.9pF aplacvar Cz_gnd 47.9pF aplacvar Rs_gnd 480 m bulk Cbump Rbump Rbump Lbump D33 Device aplacvar R1 50.053 aplacvar R2 50.053 aplacvar R3 50.053 aplacvar R4 50.053 aplacvar R10 13 k aplacvar R20 56 k aplacvar Rsub 120 m bulk C11 C1 Rbump Lbump 4/8 Model demif04 gnd BV = 7 IBV = 1m CJO = Cz_gnd M = 0.3333 RS = RS_gnd VJ = 0.6 TT = 100n bulk Bumps aplacvar Rbump 20 m aplacvar Lbump 50 pH aplacvar Cbump 1.5 p Gnd aplacvar Lgnd 95 pH aplacvar Rgnd 100 m aplacvar Cgnd 0.6 pF EMIF04-MMC02F2 3 Ordering information scheme Ordering information scheme Figure 10. Ordering information scheme EMIF yy - xxx zz Fx EMI Filter Number of lines Information x = resistance value (Ohms) z = capacitance value / 10(pF) or 3 letters = application 2 digits = version Package F = Flip Chip x = 2: Lead-free, pitch = 500 µm, bump = 315 µm Package information In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a lead-free second level interconnect. The category of second level interconnect is marked on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at www.st.com. Figure 11. Flip Chip dimensions 500 µm ± 50 315 µm ± 50 650 µm ± 65 2.07mm ± 50 µm 500 µm ± 50 285 µm 1.57mm ± 50 µm 285 µm 4 5/8 Ordering information EMIF04-MMC02F2 Figure 12. Footprint Figure 13. Marking Dot, ST logo xx = marking z = manufacturing location yww = datecode (y = year ww = week) Copper pad Diameter: 250 µm recommended, 300 µm max E x x z y ww Solder stencil opening: 330 µm Solder mask opening recommendation: 340 µm min for 315 µm copper pad diameter Figure 14. Flip Chip tape and reel specification Dot identifying Pin A1 location 3.5 ± 0.1 2.17 xxz yww ST E 1.67 User direction of unreeling Ordering information Table 3. Ordering information Order code EMIF04-MMC02F2 Note: xxz yww 4 ± 0.1 All dimensions in mm 5 ST E xxz yww ST E 8 ± 0.3 0.73 ± 0.05 Marking Package Weight Base qty Delivery mode FH Flip Chip 4.5 mg 5000 Tape and reel (7”) More packing information is available in the applications note: AN1235: “Flip Chip: package description and recommendations for use” AN 1751: “EMI filters: Recomendations and measurements” 6/8 1.75 ± 0.1 Ø 1.5 ± 0.1 4 ± 0.1 EMIF04-MMC02F2 6 Revision history Revision history Table 4. Document revision history Date Revision Changes 14-Oct-2004 1 First issue 06-Apr-2005 2 Minor layout update. No content change. 25-Aug-2005 3 Reformatted to current standard, Aplac model updated in section 2. 28-Apr-2008 4 Updated ECOPACK statement. Updated Figure 10, Figure 11 and Figure 14. Reformatted to current standards. 7/8 EMIF04-MMC02F2 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST’s terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. 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