M54HC123 RAD-HARD DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 23 ns (TYP.) at VCC = 6V LOW POWER DISSIPATION: STAND BY STATE: ICC=4µA (MAX.) at TA=25°C ACTIVE STATE: ICC=200µA (MAX.) at VCC = 5V HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V WIDE OUTPUT PULSE WIDTH RANGE: tWOUT = 120 ns ~ 60 s OVER AT VCC = 4.5 V PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 123 SPACE GRADE-1: ESA SCC QUALIFIED 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION DEVICE FULLY COMPLIANT WITH SCC-9207-006 DESCRIPTION The M54HC123 is an high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon gate C2MOS technology. There are two trigger inputs, A INPUT (negative edge) and B INPUT (positive edge). These inputs DILC-16 FPC-16 ORDER CODES PACKAGE FM EM DILC FPC M54HC123D M54HC123K M54HC123D1 M54HC123K1 are valid for slow rising/falling signals, (tr=tf=l sec). The device may also be triggered by using the CLR input (positive-edge) because of the Schmitt-trigger input; after triggering the output maintains the MONOSTABLE state for the time period determined by the external resistor RX and capacitor CX. When CX > 10nF and RX > 10KΩ, the output pulse width value is approximately given by the formula: tW(OUT) = K · Cx · Rx. (K ≅ 0.45). Taking CLR low breaks this MONOSTABLE STATE. If the next trigger pulse occurs during the MONOSTABLE period it makes the MONOSTABLE period longer. Limit for values of Cx and Rx : Cx : NO LIMIT Rx : VCC < 3.0V 5KΩ to 1MΩ VCC > 3.0V 1KΩ to 1MΩ All inputs are equipped with protection circuits against static discharge and transient excess voltage. PIN CONNECTION March 2004 1/11 M54HC123 IEC LOGIC SYMBOLS INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN N° SYMBOL 1,9 1A, 2A 2, 10 1B, 2B 3, 11 1 CLR 2 CLR 4, 12 1Q, 2Q 7 2RX/CX 13, 5 1Q, 2Q 1CX 2CX 14, 6 15 1RX/CX 8 GND VCC 16 NAME AND FUNCTION Trigger Inputs (Negative Edge Triggered) Trigger Inputs (Positive Edge Triggered) Direct Reset LOW and trigger Action at Positive Edge Outputs (Active Low) External Resistor Capacitor Connection Outputs (Active High) External Capacitor Connection External Resistor Capacitor Connection Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OUTPUTS NOTE A X H B CLR H H L X H H L 2/11 Q OUTPUT ENABLE L L H H H L H X X X : Don’t Care Q INHIBIT INHIBIT OUTPUT ENABLE OUTPUT ENABLE L L H INHIBIT M54HC123 SYSTEM DIAGRAM This logic diagram has not be used to estimate propagation delays TIMING CHART 3/11 M54HC123 BLOCK DIAGRAM (1) Cx, Rx, Dx are external components. (2) Dx is a clamping diode. The external capacitor is charged to Vcc in the stand-by-state, i.e. no trigger. When the supply voltage is turned off Cx is discharged mainly trough an internal parasitic diode (see figures). If Cx is sufficiently large and Vcc decreases rapidly, there will be some possibility of damaging the I.C. with a surge current or latch-up. If the voltage supply filter capacitor is large enough and Vcc decrease slowly, the surge current is automatically limited and damage to the I.C. is avoided. The maximum forward current of the parasitic diode is approximately 20 mA. In cases where Cx is large the time taken for the supply voltage to fall to 0.4 Vcc can be calculated as follows: tf > (Vcc - 0.7) x Cx/20mA In cases where tf is too short an external clamping diode is required to protect the I.C. from the surge current. FUNCTIONAL DESCRIPTION STAND-BY STATE The external capacitor, Cx, is fully charged to VCC in the stand-by state. Hence, before triggering, transistor Qp and Qn (connected to the Rx/Cx node) are both turned-off. The two comparators that control the timing and the two reference voltage sources stop operating. The total supply current is therefore only leakage current. TRIGGER OPERATION Triggering occurs when: 1 st) A is "LOW" and B has a falling edge; 2 nd) B is "HIGH" and A has a rising edge; 3 rd) A is "LOW" and B is HIGH and C1 has a rising edge; After the multivibrator has been retriggered comparator C1 and C2 start operating and Qn is turned on. Cx then discharges through Qn. The voltage at the node R/C external falls. When it reaches VREFL the output of comparator C1 becomes low. This in turn reset the flip-flop and Qn is turned off. At this point C1 stops functioning but C2 continues to operate. The voltage at R/C external begins to rise with a time constant set by the external components Rx, Cx. Triggering the multivibrator causes Q to go high after internal delay due to the flip-flop and the gate. Q remains high until the voltage at R/C external rises again to VREFH. At this point C2 4/11 output goes low and O goes low. C2 stop operating. That means that after triggering when the voltage R/C external returns to VREFH the multivibrator has returned to its MONOSTABLE STATE. In the case where Rx · Cx are large enough and the discharge time of the capacitor and the delay time in the I.C. can be ignored, the width of the output pulse tw(out) is as follows: tW(OUT) = 0.45 Cx · Rx RE - TRIGGERED OPERATION When a second trigger pulse follows the first its effect will depend on the state of the multivibrator. If the capacitor Cx is being charged the voltage level of R/C external falls to VREFL again and Q remains High i.e. the retrigger pulse arrives in a time shorter than the period Rx · Cx seconds, the capacitor charging time constant. If the second trigger pulse is very close to the initial trigger pulse it is ineffective; i.e. the second trigger must arrive in the capacitor discharge cycle to be ineffective; Hence the minimum time for a second trigger to be effective depends on VCC and Cx RESET OPERATION CL is normally high. If CL is low, the trigger is not effective because Q output goes low and trigger control flip-flop is reset. Also transistor Op is turned on and Cx is charged quickly to VCC. This means if CL input goes low the IC becomes waiting state both in operating and non operating state. M54HC123 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V VI DC Input Voltage -0.5 to VCC + 0.5 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 50 mA ICC or IGND DC VCC or Ground Current PD Power Dissipation Tstg Storage Temperature TL Lead Temperature (10 sec) 300 mW -65 to +150 °C 265 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Value Unit 2 to 6 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature Input Rise and Fall Time tr, tf Cx Rx External Capacitor External Resistor -55 to 125 °C VCC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns NO LIMITATION pF VCC < 3V 5K to 1M VCC > 3V 1K to 1M Ω The Maximum allowable values of Cx and Rx are a function of leakage of capacitor Cx, the leakage of device and leakage due to the board layout and surface resistance. Susceptibility to externally induced noise may occur for Rx > 1MΩ DC SPECIFICATIONS Test Condition Symbol VIH VIL Parameter High Level Input Voltage Low Level Input Voltage VCC (V) 2.0 4.5 6.0 2.0 4.5 6.0 Value TA = 25°C Min. Typ. Max. 1.5 3.15 4.2 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 3.15 4.2 0.5 1.35 1.8 Max. 1.5 3.15 4.2 0.5 1.35 1.8 Unit V 0.5 1.35 1.8 V 5/11 M54HC123 Test Condition Symbol VOH VOL II ICC ICC’ Parameter High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Active State Supply Current (1) (1) : Per Circuit 6/11 Value TA = 25°C VCC (V) Min. Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. 2.0 IO=-20 µA 1.9 2.0 1.9 1.9 4.5 IO=-20 µA 4.4 4.5 4.4 4.4 6.0 IO=-20 µA 5.9 6.0 5.9 5.9 4.5 IO=-4.0 mA 4.18 4.31 4.13 4.10 6.0 IO=-5.2 mA 5.68 5.8 5.63 5.60 2.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=20 µA 0.0 0.1 0.1 0.1 6.0 IO=20 µA 0.0 0.1 0.1 0.1 4.5 IO=4.0 mA 0.17 0.26 0.33 0.40 6.0 IO=5.2 mA 0.18 0.26 0.33 0.40 6.0 VI = VCC or GND ± 0.1 ±1 ±1 µA 6.0 VI = VCC or GND 4 40 80 µA 2.0 4.5 6.0 VI = VCC or GND Pin 7 or 15 VIN = VCC/2 200 600 1 260 780 1.3 320 960 1.6 µA µA mA 45 500 0.7 V V M54HC123 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time (A, B - Q, Q) tPLH tPHL Propagation Delay Time (CLR TRIGGER - Q, Q) tPLH tPHL Propagation Delay Time (CLR - Q, Q) tWOUT ∆tWOUT tW(H) tW(L) tW(L) trr TA = 25°C VCC (V) tTLH tTHL Output Transition Time Output Pulse Width Output Pulse Width Error Between Circuits in Same Package Minimum Pulse Width Minimum Pulse Width (CLR) Minimum Retrigger Time 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Value Min. Cx = 100 pF Rx = 10KΩ Cx = 0.1µF Rx = 100KΩ Typ. Max. 30 8 7 102 29 22 102 31 23 68 20 16 1.4 1.2 1.1 4.6 4.4 4.3 ±1 75 15 13 210 42 36 235 47 40 160 32 27 -40 to 85°C -55 to 125°C Min. Min. Max. 95 19 16 265 53 45 295 59 50 200 40 34 Unit Max. 110 22 19 315 63 54 355 71 60 240 48 41 ns ns ns ns µs ms % 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 75 15 13 75 15 13 95 19 16 95 19 16 110 22 19 110 22 19 325 108 78 5 1.4 1.2 Cx = 100 pF Rx = 10KΩ Cx = 0.1µF Rx = 100KΩ ns ns ns µs CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter CIN Input Capacitance CPD Power Dissipation Capacitance (note 1) VCC (V) Value TA = 25°C Min. Typ. Max. 5.0 5 10 5.0 162 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC’ Duty/100 + Ic/2(per monostable) (Icc’: Active Supply current) (Duty:%) 7/11 M54HC123 TEST CIRCUIT CL = 50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM: SWITCHING CHARACTERISTICS TEST WAVEFORM (f=1MHz; 50% duty cycle) 8/11 M54HC123 DILC-16 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 2.1 2.71 0.083 0.107 a1 3.00 3.70 0.118 0.146 a2 0.63 1.14 0.025 B 1.82 2.39 0.072 b 0.40 0.45 0.50 0.016 0.018 0.020 b1 0.20 0.254 0.30 0.008 0.010 0.012 D 20.06 20.32 20.58 0.790 0.800 0.810 e 7.36 7.62 7.87 0.290 0.300 0.310 e1 0.88 2.54 0.035 0.045 0.094 0.100 e2 17.65 17.78 17.90 0.695 0.700 0.705 e3 7.62 7.87 8.12 0.300 0.310 0.320 F 7.29 7.49 7.70 0.287 0.295 0.303 I 3.83 0.151 K 10.90 12.1 0.429 0.476 L 1.14 1.5 0.045 0.059 0056437F 9/11 M54HC123 FPC-16 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. MIN. TYP. MAX. A 6.75 6.91 7.06 0.266 0.272 0.278 B 9.76 9.94 10.14 0.384 0.392 0.399 C 1.49 1.95 0.059 D 0.102 0.127 0.152 0.004 0.005 0.006 E 8.76 8.89 9.01 0.345 0.350 0.355 F 0.077 1.27 G 0.38 H 6.0 L 18.75 M 0.33 0.050 0.43 0.48 0.015 0.017 0.019 0.237 0.38 N 22.0 0.738 0.43 0.013 0.867 0.015 4.31 0.017 0.170 G F D H 9 16 A N L 8 1 H E B 10/11 M C 0016030E M54HC123 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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