TDA2593 SYNCHRO AND HORIZONTAL DEFLECTION CONTROL FOR COLOR TV SET .. . . . .. . . . . . LINE OSCILLATOR (two levels switching) PHASE COMPARISON BETWEEN SYNCHRO-PULSE AND OSCILLATOR VOLTAGE Ø 1, ENABLED BY AN INTERNAL PULSE, (better parasitic immunity) PHASE COMPARISON BETWEEN THE FLYBACK PULSES AND THE OSCILLATOR VOLTAGE Ø 2 COINCIDENCE DETECTOR PROVIDING A LARGE HOLD-IN-RANGE FILTER CHARACTERISTICS AND GATE SWITCHING FOR VIDEO RECORDER APPLICATION NOISE GATED SYNCHRO SEPARATOR FRAME PULSE SEPARATOR BLANKING AND SAND CASTLE OUTPUT PULSES HORIZONTAL POWER STAGE PHASE LAGGING CIRCUIT SWITCHING OF CONTROL OUTPUT PULSE WIDTH SEPARATED SUPPLY VOLTAGE OUTPUT STAGE ALLOWING DIRECT DRIVE OF SCR’S CIRCUIT SECURITY CIRCUIT MAKES THE OUTPUT PULSE SUPPRESSED WHEN LOW SUPPLY VOLTAGE DESCRIPTION The TDA2593 is a circuit intended for the horizontal deflectionof color TV sets, suppliedwith transistors or SCR’S. DIP16 (Plastic Package) ORDER CODE : TDA2593 PIN CONNECTIONS SUPPLY VOLTAGE 1 16 GROUND OUTPUT STAGE SUPPLY VOLTAGE 2 15 ADJUSTMENT OF THE CHARGE CURRENT OUTPUT PULSE 3 14 RAMP OSCILLATOR CAPACITANCE SELECTION OF OUTPUT PULSE DURATION 4 13 FIRST PHASE COMPARATOR OUTPUT DECOUPLING REFERENCE PULSE (flyback) FOR THE 2nd PHASE COMPARATOR SAND CASTLE PULSE 5 12 TIME CONSTANT SWITCHING 6 11 V.C.R. SWITCHING 7 10 NOISE SEPARATOR INPUT 8 9 September 1993 SYNCHRO SEPARATOR INPUT 2593-01.EPS VERTICAL SYNCHRO OUTPUT 1/6 TDA2593 MAIN CHARACTERISTICS Symbol Parameter Typ. Unit V(1–16) Supply Voltage 12 V I(1) Supply Current 30 mA INPUT SIGNALS V(9–16) (pp) Synchro Separator Input Voltage 3 to 4 V V(10-16) (pp) Noise Separators Input Voltage 3 to 4 V 9.4 to V(1–16) 0 to 3.5 5.4 to 5.6 V V V 11 V 11 V 10.5 V V(4–16) V(4–16) V(4–16) Control Voltage of the Output Pulse Switching Circuit t = 7 µs (thyristor) t = 14 µs + td (transistor) t = 0 (V(3–16) = 0) V(8–16) (pp) Frame Synchro Pulse V(7–16) (pp) Sandcastle Pulse V(3–16) (pp) Horizontal Driver Stage Control Pulse 2593-01.TBL OUTPUT SIGNALS Symbol Parameter Value Unit 13.2 V V(1–16) Supply Voltage to Pin 1 V(2–16) Supply Voltage to Pin 2 18 V V(4–16) Voltage to Pin 4 13.2 V V(9–16) Voltage to Pin 9 ±6 V V(10–16) Voltage to Pin 10 ±6 V V(11–16) Voltage to Pin 11 13.2 V I2M = -I3M Current ai Pins 2 and 3 (with thyristor) 650 mA I2M = I3M Current ai Pins 2 and 3 (with transistor) 400 mA Current to Pin 4 1 mA I(4) I(6) Current to Pin 6 ±10 mA I(7) Current to Pin 7 -10 mA I(11) Current to Pin 11 2 mA 800 mW Ptot Power Dissipation Toper Operating Ambient Temperature -20, +70 o C Tstg Storage Temperature -25, +125 o C 2593-02.TBL ABSOLUTE MAXIMUM RATINGS (Maximum Ratings according to CEI 134 Datasheet) ELECTRICAL OPERATING CHARACTERISTICS (Tamb = 25oC, V1–V16 = 12V , unless otherwise specified) V9–16 I9 I9 I9 I9 V9 V10–16 Parameter Input Signals Synchro Separator (Pin 9) Input Threshold Voltage Input Threshold Current On-state Input Current Disconnect Input Current Off-state Input Current (V9–16 = – 5V) Video Input Signal (positive synchro pulses) (note 1) Noise Separator (Pin 10) Input Threshold Voltage Note : 1. Allowed range 1 to 7V 2/6 Min. Typ. Max. 0.8 3 to 4 V µA µA µA µA VPP 1.4 V 5 100 Unit 5 to 100 150 –1 2593-03.TBL Symbol TDA2593 ELECTRICAL OPERATING CHARACTERISTICS (Tamb = 25oC, V1–V16 = 12V , unless otherwise specified) Symbol I10 I10 I10 V10 V10 V6–16 V6 I6 V4–16 I(4) V11–16 I11 V8–16 R8 ton toff Parameter Input Threshold Current Input Current Off-state Input Current (V10–16 = – 5V) Video Input Signal (positive synchro pulses) (note 1) Allowed superimposed parasitic signal Fly-back Pulse (Pin 6) Input Threshold Voltage Input Limitation Level Input Current Output Pulse Width Control Switch (Pin 4) Input Voltage t = 7 µs (thyristor) t = 14 µs + td (transistor) t = 0 (V3–16 = 0) (note 2) Input Current t = 7 µs (thyristor) t = 14 µs + tj (transistor) t = 0 (V3–16 = 0) Video Recorder Switch (Pin 11) Input Voltage (Pin 11 low level) (Pin 11 to + VCC) Input Current (Pin 11 low level) (Pin 11 to + VCC) Output Signals Frame Synchro Pulses (positive) (Pin 8) Output Voltage (peak value) Output Impedance Delay Between Leading Edge of Input Signal and Leading Edge of Output Signal Delay Between Trailing Edge of Input Signal and Trailing Edge of Output Signal Min. 100 Typ. 150 5 to 100 Max. 7 Unit µA µA µA VPP V 2 V V mA –1 3 to 4 0.01 1.4 –0.7 and +1.4 1 9.4 to V1–16 0 to 3.5 5.4 to 6.6 V V V µA µA µA 200 200 0 0 to 2.5 9 to V1–16 200 2 10 V V µA mA 11 2 15 V kΩ µs 15 µs 11 70 2 V Ω mA µs µs SANDCASTLE PULSE (POSITIVE) (PIN 7) V7–16 R7 I7 t7 ∆t Output Voltage (peak valve) Output Impedance Output Current During Trailing Edge Sandcastle Pulse Width (V7 = 7 V) Phase Between Middle Input Synchro Pulse and Leading Edge of Sandcastle Pulse (V7 = 7 V) 10 3.7 2.15 4.3 3.15 FLY-BACK BLANKING PULSE (PIN 7) V7–16 R7 I7 Output Voltage (peak value) Output Impedance Output Current During Trailing Edge 4 5 70 2 V Ω mA CONTROL PULSE FOR HORIZONTAL DRIVER (POSITIVE) (PIN 3) t3 t3 V1–16 Output Voltage (peak value) Output Impedance (leading edge) (trailing edge) Control Pulse Width V4 = 9.4 to V1–16 V4 = 0 to 4V (note 3) Control pulse is disabled for 10.5 2.5 20 5.5 8.5 14 + tc 4 V Ω Ω µs µs V 2593-04.TBL V3–16 R3 Notes : 1. Allowed range 1 to 7V 2. Or Pin 4 not connected. 3. With tr = 12µs 3/6 TDA2593 ELECTRICAL OPERATING CHARACTERISTICS (contined) (Tamb = 25oC, V1–V16 = 12V , unless otherwise specified) Symbol Parameter Min. Typ. Max. Unit 3.3 µs OVERALL PHASE RELATION SHIP tz ∆I/∆t Phrase Between Middle Synchro Pulse and Middle Fly-back Pulse (tr = 12 µs, note 4 Sensitivity to Current Adjust 1.9 30 µA/µs 4.4 7.6 ± 0.47 15625 ± 0.05 V V mA Hz % Hz/µA % % ± 10 % OSCILLATOR (PINS 14 AND 15) V14–16 I14 f ∆f ∆f/15 ∆f ∆f/f ∆V/V nom. ∆f T Threshold Voltage (low level) (high level) Current Generator Free Running Frequency (Cosc = 4700pF, Rosc = 12kΩ) Tolerance on Frequency (note 5) Frequence Control Sensitivity Spread of Frequency nfluence of Supply Voltage on Frequency (note 5) ±5 31 ± 10 Frequency change when decreasing the supply down to 5 V (V1–16 = 5V, note 5) Frequency Temperature Coefficient (note 5) ± 10 –4 Hz/°C PHASE COMPARATOR ø 1 (PIN 13) V13–16 I13 I13 R13 ∆f ∆f/f Control Voltage Range Control Current (peak value) Off-state Current (V 13–16 = 4 to 8 V) Output Impedance (V13–16 = 4 to 8 V, note 6) (V13–16 < 3.8 V cr > 8.2 V, note 7) Control Sensibility Catching and Holding Range Catching and Holding Range Tolerance (note 5) 3.8 to 8.2 ±1.9 to ±2.3 V mA µA –1 High Low 2 ± 780 ± 10 kHz/µs Hz % PHASE COMPARATOR φ 2 AND PHASE-SHIFT (PIN 5) V5–16 I5 I5 R5 td ∆t/∆td Control Voltage Range Control Current (peak value) Off-state Output Current (V 5–16 = 5.4 to 7.6 V) Output Impedance (V5–16 = 5.4 to 7.6 V, note 6) (V5–16 < 5.4 V or > 7.6 V) Max. delay Between Output Pulse Leading Edge and Fly-back Pulse Trailing Edge (tr = 12 µs) Static Control Error 5.4 to 7.6 ±1 –5 High 8 V mA µA kΩ 15 0.2 µs % COÏNCIDENCE DETECTOR (PIN 11) V11–16 I11 Output Voltage Output Current (without coïncidence) (with coïncidence) 0.5 to 6 0.1 – 0.5 V mA mA (V11–16 = 2.5 to 7 V) (V11–16 < 1.5 or > 9 V) 6 ±1 100 60 V mA Ω kΩ 7.5 µs V12–16 I12 R12 Output Voltage Output Current Output Impedance PULSE GENERATOR (INTERNAL) t Pulse Width Notes : 4. The adjustement of overall phase relation (and output pulse leading edge position) is automatically performed by phase comparator Ø 2. If additional adjustement is needed, a current have to be imposed at pin 5. 5. Tolerance of peripheral components not included. 6. Current generator. 7. Emitter-follower 4/6 2593-05.TBL TIME CONSTANT SWITCH (PIN 12) 2593-02.EPS 0.47 µ F 0.47 µ F 1.5k Ω INPUT VIDEO 9 100pF 2.2M Ω 6.8nF 1.8M Ω A 10 11 V CR or COINCIDENCE DETECTOR NOISE SEPARATOR 12 0.68 µ F 3.3k Ω 1.2k Ω 4 13 10nF PLL1 PLL2 G 47 µF TIME CONSTANT SWITCH GATE (SH-SV-G) SYNCHRO MODE SWITCH GATE (SH-SV) SYNCHRO SEPARATOR H V 5 +td 14 µ s 7µs Pulse width PHASE ADVANCING 6 47kΩ 50V 0.22 µ F PHASE COMPARATOR 2 FRAME SEPARATOR 7 BURST AND BLANKING GENERATOR STAGE 4V 0 OUTPUT FRAME PULSE 8 33k Ω Flyback Pulse 0.1µ F 0 Blanking and Sandcastle Output Pulse 10V 82k Ω 14 PHASE COMPARATOR 1 4.7nF 2% Stiroflex 15 12kΩ 2% VOLTAGE LIMITE GATE SYNCHRO-GATE PULSE GENERATOR OUTPUT PULSE GENERATOR 2 12 Ω (15 Ω) A 16 120k Ω OSCILLATOR INHIBIT FOR V1 4V 1 10Ω PLL1 : Phase locked loop 1 PLL2 : Phase locked loop 2 (with power stage) OUTPUT STAGE 3 Tc Line Driver OUTPUT PULSE DURATION SELECTOR 6V A +12V 100 µF 47k Ω Frame Synchro Output Pulse 11V TDA2593 BLOCK DIAGRAM AND TYPICAL APPLICATION 5/6 TDA2593 I b1 L a1 PACKAGE MECHANICAL DATA 16 PINS - PLASTIC DIP b B e E Z e3 D 9 1 8 a1 B b b1 D E e e3 F i L Z Min. 0.51 0.77 Millimeters Typ. Max. 1.65 Min. 0.020 0.030 0.5 0.25 Inches Typ. Max. 0.065 0.020 0.010 20 8.5 2.54 17.78 0.787 0.335 0.100 0.700 7.1 5.1 3.3 0.280 0.201 0.130 1.27 0.050 Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. 6/6 DIP16.TBL Dimensions PM-DIP16.EPS F 16