TS274 High performance CMOS quad ooperational amplifiers ■ Output voltage can swing to ground ■ Excellent phase margin on capacitive loads ■ Gain bandwidth product: 3.5MHz ■ Stable and low offset voltage ■ Three input offset voltage selections N DIP-14 (Plastic Package) Description The TS274 devices are low cost, quad operational amplifiers designed to operate with single or dual supplies. These operational amplifiers use the ST silicon gate CMOS process allowing an excellent consumption-speed ration. These series are ideally suited for low consumption applications. D SO-14 (Plastic Micropackage) Three power consumptions are available allowing to have always the best consumption-speed ratio: – ICC = 10µA/amp.: TS27L4 (very low power) – ICC = 150µA/amp.: TS27M4 (low power) – ICC = 1mA/amp.: TS274 (standard) P TSSOP14 (Thin Shrink Small Outline Package) These CMOS amplifiers offer very high input impedance and extremely low input currents. The major advantage versus JFET devices is the very low input currents drift with temperature (see figure 2). Pin connections (top view) 14 Output 4 Output 1 1 Inverting Input 1 2 - - 13 Inverting Input 4 Non-inverting Input 1 3 + + 12 Non-inverting Input 4 11 VCC - VCC + 4 Non-inverting Input 2 5 + + 10 Non-inverting Input 3 Inverting Input 2 6 - - 9 Inverting Input 3 8 Output 3 Output 2 7 April 2006 Rev. 2 1/15 www.st.com 15 Order codes 1 TS274 Order codes Part Number Temperature Range TS274CD/DT TS274ACD/DT TS274CN TS274ACN 0°C, +70°C TS274CPT TS274ACPT TS274ID/DT TS274AID/DT TS274IN TS274AIN TS274IPT TS274AIPT 2/15 -40°C, +125°C Package Packing SO-14 Tube or Tape & Reel DIP 14 Tube TSSOP 14 Tape & Reel SO-14 Tube or Tape & Reel DIP 14 Tube TSSOP-14 Tape & Reel Marking 274C 274AC TS274CN TS274ACN 274I 274AI TS274IN TS274AIN TS274 2 Absolute maximum ratings & operating conditions Absolute maximum ratings & operating conditions Table 1. Absolute maximum ratings (AMR) Symbol VCC+ Parameter TS274C/AC/BC Supply Voltage (1) Vid Differential Input Voltage Unit 18 V ±18 V -0.3 to 18 V (2) Input Voltage (3) Vi TS274I/AI/BI + Io Output Current for VCC ≥ 15V ±30 mA Iin Input Current ±5 mA Toper Operating Free-Air Temperature Range Tstg Storage Temperature Range 0 to +70 -40 to +125 °C -65 to +150 °C 103 100 80 °C/W Ambient(4) Rthja Thermal Resistance Junction to SO-14 TSSOP14 DIP14 Rthjc Thermal Resistance Junction to Case SO-14 TSSOP14 DIP14 31 32 33 HBM: Human Body Model(5) 500 V 100 V 800 V ESD MM: Machine Model(6) CDM: Charged Device Model °C/W 1. All values, except differential voltage are with respect to network ground terminal. 2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. 3. The magnitude of the input and the output voltages must never exceed the magnitude of the positive supply voltage. 4. Short-circuits can cause excessive heating and destructive dissipation. Values are typical. 5. Human body model, 100pF discharged through a 1.5kΩ resistor into pin of device. 6. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (internal resistor < 5Ω), into pin to pin of device. Table 2. Operating conditions Symbol VCC + Vicm Parameter Supply Voltage Common Mode Input Voltage Range Value Unit 3 to 16 V 0 to VCC+ - 1.5 V 3/15 Typical application information 3 TS274 Typical application information Figure 1. Block diagram VCC Current source xI Input differential Second stage Output stage Output VCC E 4/15 E T20 T19 T17 T24 T21 T 18 R2 T 25 VCC T 22 T 23 T 26 T29 T 28 T27 Input T3 T1 T5 T4 T2 C1 Input R1 T7 T6 T9 T8 T 13 T11 T 10 T 14 T 12 T16 Output T 15 Figure 2. VCC TS274 Typical application information Schematic diagram (for 1/4 TS274) 5/15 Electrical characteristics 4 TS274 Electrical characteristics Table 3. VCC+ = +10V, VCC-= 0V, Tamb = +25°C (unless otherwise specified) TS274C/AC/BC Symbol Parameter Unit Min VO = 1.4V, Vic = 0V TS274C/I TS274AC/AI TS274B/C/I Vio DV io Input Offset Voltage TS274I/AI/BI Conditions Typ 1.1 0.9 0.25 Max Min Typ 1.1 0.9 0.25 10 5 2 Max 10 5 2 mV Tmin ≤ Tamb ≤ T max TS274C/I TS274AC/AI TS274B/C/I 12 6.5 3.5 12 6.5 3 Input Offset Voltage Drift 2 Iio Input Offset Current (1) Vic = 5V, VO = 5V Tmin ≤ Tamb ≤ T max 1 Iib Input Bias Current (1) Vic = 5V, VO = 5V Tmin ≤ Tamb ≤ T max 1 VOH High Level Output Voltage Vid = 100mV, RL = 10kΩ Tmin ≤ Tamb ≤ T max VOL Low Level Output Voltage Vid = -100mV Avd ViC = 5V, RL = 10kΩ, Large Signal Voltage Gain Vo = 1V to 6V Tmin ≤ Tamb ≤ T max 2 1 100 200 1 150 8.2 8.1 8.4 300 8.2 8 8.4 50 10 µV/°C 15 pA V 50 10 pA mV 15 V/mV 7 6 GBP Gain Bandwidth Product Av = 40dB, RL = 10kΩ, CL = 100pF, fin = 100kHz CMR Common Mode Rejection Ratio ViC = 1V to 7.4V, Vo = 1.4V 65 80 SVR Supply Voltage Rejection Ratio VCC + = 5V to 10V, Vo = 1.4V 60 70 ICC Supply Current (per amplifier) Av = 1, no load, Vo = 5V Tmin ≤ Tamb ≤ T max Io Output Short Circuit Current Vo = 0V, Vid = 100mV 60 60 mA Isink Output Sink Current Vo = VCC, Vid = -100mV 45 45 mA SR Slew Rate at Unity Gain RL = 10kΩ, CL = 100pF, Vi = 3 to 7V 5.5 5.5 V/µs φm Phase Margin at Unity Gain Av = 40dB, R L = 10kΩ, CL = 100pF 40 40 Degrees KOV Overshoot Factor 30 30 % 30 30 nV/√Hz 120 120 dB en Equivalent Input Noise Voltage f = 1kHz, R s = 100Ω Vo1 /Vo2 Channel Separation 1. Maximum values including unavoidable inaccuracies of the industrial test. 6/15 3.5 1000 1500 1600 3.5 MHz 65 80 dB 60 70 dB 1000 1500 1700 µA TS274 Electrical characteristics Tamb = 25°C AV = 1 VO = VCC / 2 1.5 1.0 0.5 0 4 8 12 SUPPLY VOLTAGE, VCC (V) INPUT BIAS CURRENT, I IB (pA) Figure 5. Figure 4. 16 100 VCC = 10V Vic = 5V 10 T amb = 25˚C V id = 100mV VCC = 16V 12 VCC = 10V 8 4 0 -50 16 Input bias current vs. free-air temperature Figure 6. -40 -30 -20 OUTPUT CURRENT, I -10 OH (mA) 0 Low level output voltage vs. low level output current 1.0 0.8 V CC = 3V 0.6 V CC = 5V 0.4 T amb = 25°C V ic = 0.5V V id = -100mV 0.2 1 25 50 75 100 0 125 1 2 OUTPUT CURRENT, I OL (mA) TEMPERATURE, T amb (˚C) Figure 7. High level output voltage vs. high level output current 5 T amb = 25˚C V id = 100mV 4 3 VCC = 5V 2 VCC = 3V 1 0 -10 -8 -6 -4 -2 OUTPUT CURRENT, I OH (mA) Figure 8. OUTPUT VOLTAGE, VOL (V) OUTPUT VOLTAGE, V OH (V) High level output voltage vs. high level output current 20 OUTPUT VOLTAGE, V OH (V) 2.0 Supply current (each amplifier) vs. supply voltage OUTPUT VOLTAGE, VOL (V) SUPPLY CURRENT, I CC (µ A) Figure 3. 0 3 Low level output voltage vs. low level output current V CC = 10V VCC = 16V 2 1 3 T amb = 25°C V i = 0.5V V = -100mV id 0 4 8 12 16 OUTPUT CURRENT, I OL (mA) 20 7/15 Electrical characteristics Open loop frequency response and Figure 10. Phase margin vs. capacitive load phase shift 40 0 G A IN G A IN (d B ) 30 45 PHASE 20 Phase Margin T a m b = 2 5 °C V C C+ = 1 0 V R L = 10kΩ C L = 100pF A VC L = 100 10 0 135 10 10 3 180 Gain Bandwidth Product -1 0 2 90 10 4 10 5 10 6 10 P H A S E (D e g re e s ) 50 P H A S E M A R G IN , φ m (D e g re e s ) Figure 9. TS274 70 Ta m b = 2 5 °C R L = 10kΩ AV = 1 VC C = 10V 60 50 40 30 7 0 20 40 60 C A P A C IT A N C E , C F R E Q U E N C Y , f (H z ) 100 80 L (p F ) 7 5 S L E W R A T E S , S R (V / µs ) G A IN B A N D W . P R O D ., G B P (M H z ) Figure 11. Gain bandwidth product vs. supply Figure 12. Slew rate vs. supply voltage voltage 4 3 2 Ta m b = 2 5 °C R L = 10kΩ CL = 1 0 0 p F AV = 1 1 4 0 8 12 4 SR 3 4 6 8 10 12 S U P P L Y V O L T A G E , VC C S U P P L Y V O L T A G E , V C C (V ) 48 44 40 36 Ta m b = 2 5 °C R L = 10kΩ CL = 1 0 0 p F AV = 1 32 28 16 300 VC C = 1 0 V Tamb = 2 5 °C R S = 1 0 0Ω 200 100 0 0 4 8 12 S U P P L Y V O L T A G E , V C C (V ) 8/15 14 (V ) Figure 14. Input voltage noise vs. frequency E Q U IV A L E N T IN P U T N O IS E V O L T A G E (n V /V H z ) P H A S E M A R G IN , φ m (D e g re e s ) Figure 13. Phase margin vs. supply voltage SR 5 2 16 Ta m b = 2 5 °C R L = 10kΩ CL = 1 0 0 p F 6 16 1 10 100 F R E Q U E N C Y (H z ) 1000 TS274 Macromodel 5 Macromodel 5.1 Important note concerning this macromodel Please consider following remarks before using this macromodel. – All models are a trade-off between accuracy and complexity (i.e. simulation time). – Macromodels are not a substitute to breadboarding; rather, they confirm the validity of a design approach and help to select surrounding component values. – A macromodel emulates the NOMINAL performance of a TYPICAL device within SPECIFIED OPERATING CONDITIONS (i.e. temperature, supply voltage, etc.). Thus the macromodel is often not as exhaustive as the datasheet, its goal is to illustrate the main parameters of the product. Data issued from macromodels used outside of its specified conditions (V CC, Temperature, etc.) or even worse: outside of the device operating conditions (VCC, Vicm, etc.) are not reliable in any way. 5.2 Macromodel code ******************************** .SUBCKT TS27X 1 2 3 4 5 *** INP- = 1, INP+ =2, OUT = 3 VDD=4 VSS = 5 *** TYPE = TS271/TS272/TS274 .MODEL MDTH D IS=1E-8 KF=2.664E-16 CJO=10F ***INPUT STAGE CIP 2 5 1E-12 CIN 1 5 1E-12 EIP 10 5 2 5 1 EIN 16 5 1 5 1 RIP 10 11 8 RIN 15 16 8 RIS 11 15 223.84 CPS 11 15 1E-9 DIP 11 120 MDTH 400E-12 DIN 15 140 MDTH 400E-12 RDEG1 12 120 4400 RDEG2 14 140 4400 VOFP 12 13 DC 0 VOFN 13 14 DC 0 IPOL 13 5 38E-6 ***ICC DICC1 4 31 MDTH 400E-12 DICC2 31 32 MDTH 400E-12 DICC3 32 33 MDTH 400E-12 DICC4 33 34 MDTH 400E-12 RICC 34 5 20E3 ICC 4 5 600E-6 ***COMMON MODE INPUT LIMITATION DINN 17 13 MDTH 400E-12 VIN 17 5 DC -0.1 DINR 15 18 MDTH 400E-12 VIP 4 18 DC 2.2 ***GM1 STAGE FGM1P 119 5 VOFP 1 FGM1N 119 5 VOFN 1 RAP 119 4 1E6 9/15 Macromodel TS274 RAN 119 5 1E6 ***GM2 STAGE G2P 19 5 119 5 4E-4 G2N 19 5 119 4 4E-4 R2P 19 4 450E3 R2N 19 5 450E3 ***COMPENSATION CC 19 119 7p ***BUFFER EBUF 20 5 19 5 1 ***SHORT-CIRCUIT LIMITATIONS( ISINK, ISOURCE) DOPM 19 22 MDTH 400E-12 DONM 21 19 MDTH 400E-12 HOPM 22 28 VOUT 910 VIPM 28 4 DC 50 HONM 21 27 VOUT 1222 VINM 5 27 DC 50 VOUT 3 23 DC 0 ***VOH, VOL DEFINITIONS DOP 19 25 MDTH 400E-12 VOP 4 25 2.5 DON 24 19 MDTH 400E-12 VON 24 5 0.92 ***OUTPUT RESISTOR ROUT 23 20 10 .ENDS 10/15 TS274 6 Package mechanical data Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These packages have a Lead-free second level interconnect. The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. 6.1 DIP14 package Plastic DIP-14 MECHANICAL DATA mm. inch DIM. MIN. a1 0.51 B 1.39 TYP MAX. MIN. TYP. MAX. 0.020 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 0.280 I 5.1 0.201 L Z 3.3 1.27 0.130 2.54 0.050 0.100 P001A 11/15 Package mechanical data 6.2 TS274 SO-14 package SO-14 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 0.003 0.007 0.46 0.013 0.018 0.25 0.007 1.65 b 0.35 b1 0.19 C MAX. 0.064 0.5 0.010 0.019 c1 45˚ (typ.) D 8.55 8.75 0.336 E 5.8 6.2 0.228 e 1.27 e3 0.344 0.244 0.050 7.62 0.300 F 3.8 4.0 0.149 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.68 0.157 0.026 8 ˚ (max.) PO13G 12/15 TS274 6.3 Package mechanical data TSSOP14 package TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 13/15 Revision history 7 TS274 Revision history Table 4. Date Revision Nov. 2001 1 Initial release. 2 – ESD protection inserted in Table 1. on page 3. – Thermal Resistance Junction to Case information added see Table 1. on page 3. – Macromodel insertion in paragraph 5 on page 9. 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