U2752M Digital I/Q-Generator Chip for DAB The U2752M is an integrated circuit in CMOS technology for splitting a digital DAB signal into its quadrature components. The device is designed for DAB (ETS 300 401) applications. Gm bH Description Electrostatic sensitive device. Observe precautions for handling. Features D D Block Diagram 2 8 DATA_IN – Select pin for baseband or 1.024-MHz center frequency – I-, Q- components in time multiplex – Data format: 8 bit, 4.096 MHz in 2’s complement representation AP–I IQDATA MUX 2 7 DATA_RI AP–Q Ad ro nic C RESET D Output signal om po ne D quadrature components Quadrature matching: 0 dB in magnitude, ≤ 1.6° in phase Clock frequency: 4.096 MHz Input signal – Center frequency: 3.072 MHz – Bandwidth: 1.536 MHz – Data format: 8 bit, 4.096 MHz in 2’s complement representation nt s D U2752M splits a digital DAB input signal into its CLOCK 96 12265 VDD VSS MIX_OFF Figure 1. Block diagram Ordering Information Extended Type Number U2752M-AFL U2752M-AFLG3 Package SO24 SO24 Remarks Taping according to IEC-286-3 Rev. A1, 29-Jun-98 1 (6) Preliminary Information U2752M Pin Description ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ MIX_OFF 1 24 RESET 2 23 VSS 3 22 DATA_IN0 4 21 DATA_IN1 5 20 IQDATA3 DATA_IN2 6 19 IQDATA4 DATA_IN3 7 18 IQDATA5 DATA_IN4 8 17 IQDATA6 DATA_IN5 9 16 IQDATA7 DATA_IN6 10 15 VDD DATA_IN7 11 14 DATA_RI 13 CLOCK VDD IQDATA0 IQDATA1 IQDATA2 Ad ro nic C VSS PAD Type BUFINCDN BUFINCDN Gm bH Description Low: I/Q in baseband representation, High. I/Q in IF representation Reset signal, high active Ground Data input (LSB) Data input Data input Data input Data input Data input Data input Data input (MSB) Ground System clock 4.096 MHz Internal data_ri signal Power supply Data_output, I and Q multiplex (MSB) Data_output, I and Q multiplex Data_output, I and Q multiplex Data_output, I and Q multiplex Data_output, I and Q multiplex Data_output, I and Q multiplex Data_output, I and Q multiplex Data_output, I and Q multiplex (LSB) Power supply nt s Signal MIX_OFF RESET VSS DATA_IN0 DATA_IN1 DATA_IN2 DATA_IN3 DATA_IN4 DATA_IN5 DATA_IN6 DATA_IN7 VSS CLOCK DATA_RI VDD IQDATA7 IQDATA6 IQDATA5 IQDATA4 IQDATA3 IQDATA2 IQDATA1 IQDATA0 VDD om po ne Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 12 BUFINMOS BUFINMOS BUFINMOS BUFINMOS BUFINMOS BUFINMOS BUFINMOS BUFINMOS BUFTGMOS BU2OUT BU2OUT BU2OUT BU2OUT BU2OUT BU2OUT BU2OUT BU2OUT BU2OUT Functional Description The U2752M generates the in-phase and quadrature components of the DAB input signal with a quadrature matching of 0 dB in magnitude and a maximum value of 1.6° in phase. The clock of the device is 4.096 MHz. The data format of the input signal DATA_IN is 8 bits, sampled with 4.096 MHz in 2’s complement representation. Its center frequency is 3.072 MHz with a bandwidth of 1536 MHz. The U2752M uses decimation and common filter techniques to generate the quadrature components. The output interface consists of the split signal IQDATA with a data format of 8 bits, 4.096 MHz in 2’s complement representation. The in-phase (I) and quadrature (Q) components are represented in time division multiplex format with a selection signal DATA_RI of 4.096 MHz. The output representation in baseband or 1.024-MHz center frequency is selected by the MIX_OFF signal. For utilization together with TEMIC’s U2752M device, the baseband representation (MIX_OFF = ‘0’) must be selected. 96 12266 Figure 2. Pinning 2 (6) Rev. A1, 29-Jun-98 Preliminary Information U2752M Absolute Maximum Ratings Symbol VDD Vin/Vout Tstg Operating Range om po ne Thermal Resistance Symbol VDD Vin/Vout Tamb Pstat Pdyn Parameters Junction ambient SO24 Min. 4.5 0 –40 nt s Parameters DC supply voltage Input / output voltage Ambient temperature Power dissipation (static) Power dissipation (dynamic) Min. –0.5 –0.5 –65 Typ. Max. +7 VDD + 0.5 +150 Gm bH Parameters DC supply voltage Input / output voltage Storage temperature Symbol RthJA Typ. Max. 5.5 VDD +85 Unit V V °C 0.25 15 Unit V V °C mW mW Value 80 Unit K/W Electrical Characteristics Test conditions: VDD = 5 V, Tamb = 25°C Test Conditions / Pins Pins 1, 2, 4 to 11 Pins 1, 2, 4 to 11 Pin 13 Ad ro nic C Parameters Input HIGH voltage Input LOW voltage Positive threshold Negative threshold Input leakage Output HIGH voltage Output LOW voltage VIN = VDD or VSS VIN = VDD Pins 1, 2, 4 to 11 and 13 IOH = +6.4 mA Pins 14, 16 to 23 IOH = –6.4 mA Pins 14, 16 to 23 Symbol VIH VIL VT+ VT– IL Min. 3.5 VOH 2.4 Typ. Max. ±1 +40 1.5 2.60 3.52 ±5 +100 1.61 2.47 VOL Rev. A1, 29-Jun-98 Unit V V V V µA µA V 0.4 V 3 (6) Preliminary Information U2752M Input Interface Description Gm bH RESET CLOCK Internal RI selection signal R DATA_IN I R I 96 12267 nt s tsu_din Figure 3. Input interface signals (tsu_din ≥ 10 ns) The phase deviation from 90° of the I- and Q- parts over the normalized frequency is shown in figure 4. Ad ro nic C The DAB-relevant frequency range is from 1/8 to 7/8 on the normalized frequency axis. For the DAB frequency range, the maximum phase mismatch is 1.6° and the amplitude mismatch is 0 dB. Phase deviation from 90 degree The U2752M generates an internal real and imaginary selection signal, which depends on the first recognized rising CLOCK edge as shown in figure 3. Due to this selection signal, the data input DATA_IN will be used for the real or imaginary process path of the IC. The setup time of DATA_IN tsu_din must be ≥ 10 ns. Results 100 om po ne For verification purposes, it can be helpful to know how the U2752M selects the input samples for real and imaginary data processing. 80 max. phase mismatch = 1.6 deg 60 max. amplitude mismatch = 0 dB 40 20 0 –20 –40 –60 –80 –100 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 96 12047 Normalized frequency Figure 4. Phase deviation of the I- and Q–parts 4 (6) Rev. A1, 29-Jun-98 Preliminary Information U2752M Package Information Package SO24 9.15 8.65 15.55 15.30 7.5 7.3 2.35 0.25 0.10 0.4 1.27 13.97 13 0.25 10.50 10.20 technical drawings according to DIN specifications 13037 12 Ad ro nic C 1 om po ne nt s 24 Gm bH Dimensions in mm Rev. A1, 29-Jun-98 5 (6) Preliminary Information U2752M Ozone Depleting Substances Policy Statement It is the policy of TEMIC Semiconductor GmbH to Gm bH 1. Meet all present and future national and international statutory requirements. 2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment. It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances ( ODSs). nt s The Montreal Protocol ( 1987) and its London Amendments ( 1990) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances. TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents. om po ne 1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively 2 . Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency ( EPA) in the USA 3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C ( transitional substances ) respectively. Ad ro nic C TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances. We reserve the right to make changes to improve technical design and may do so without further notice. Parameters can vary in different applications. All operating parameters must be validated for each customer application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with such unintended or unauthorized use. TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany Telephone: 49 ( 0 ) 7131 67 2831, Fax number: 49 ( 0 ) 7131 67 2423 6 (6) Rev. A1, 29-Jun-98 Preliminary Information