UTC-IC MJE13003

UNISONIC TECHNOLOGIES CO., LTD
MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
NPN SILICON POWER
TRANSISTORS
DESCRIPTION
These devices are designed for high–voltage, high–speed
power switching inductive circuits where fall time is critical. They
are particularly suited for 115 and 220V SWITCHMODE .
1
TO-220
FEATURES
* Reverse Biased SOA with Inductive Load @ Tc=100℃
* Inductive Switching Matrix 0.5 ~ 1.5 Amp, 25 and 100℃
Typical tc = 290ns @ 1A, 100℃.
* 700V Blocking Capability
*Pb-free plating product number: MJE13003L
APPLICATIONS
* Switching Regulator’s, Inverters
* Motor Controls
* Solenoid/Relay drivers
* Deflection circuits
ORDERING INFORMATION
Normal
Order Number
Lead Free Plating
MJE13003-x-TA3-F-T
MJE13003L-x-TA3-F-T
Note: x: Rank, refer to Classification of hFE1.
Package
TO-220
Pin Assignment
1
2
3
B
C
E
Packing
Tube
MJE13003L-x-TA3-F-T
(1)Packing Type
(2)Pin Assignment
(3)Package Type
(4)Rank
(5)Lead Plating
www.unisonic.com.tw
Copyright © 2005 Unisonic Technologies Co., Ltd
(1)T: Tube
(2) refer to Pin Assignment
(3) TA3: TO-220
(4) x: refer to Classification of hFE1
(5) L: Lead Free Plating, Blank: Pb/Sn
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
ABSOLUTE MAXIMUM RATINGS
PARAMETER
Collector-Emitter Voltage
Collector-Emitter Voltage
Emitter Base Voltage
SYMBOL
VCEO(SUS)
VCEO
VEBO
IC
ICM
IB
IBM
IE
IEM
RATINGS
UNIT
400
V
700
V
9
V
Continuous
1.5
Collector Current
A
Peak (1)
3
Continuous
0.75
Base Current
A
Peak (1)
1.5
Continuous
2.25
Emitter Current
A
Peak (1)
4.5
Total Power Dissipation @ Ta=25℃
1.4
W
PD
mW/℃
Derate above 25℃
11.2
Total Power Dissipation @ TC=25℃
40
W
PD
mW/℃
Derate above 25℃
320
℃
Junction Temperature
TJ
150
℃
Storage Temperature
TSTG
-40 ~ +150
Note Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
THERMAL DATA
PARAMETER
Thermal Resistance, Junction to Ambient
SYMBOL
Thermal Resistance, Junction to Case
(1) Pulse Test: Pulse Width=5ms, Duty Cycle≤10%
RθJA
RATINGS
89
UNIT
℃/W
RθJC
3.12
℃/W
ELECTRICAL CHARACTERISTICS (TC=25°C, unless otherwise specified.)
PARAMETER
OFF CHARACTERISTICS (Note)
Collector-Emitter Sustaining Voltage
Collector Cutoff Current
Emitter Cutoff Current
SECOND BREAKDOWN
Second Breakdown Collector Current
with bass forward biased
Clamped Inductive SOA with base
reverse biased
ON CHARACTERISTICS (Note)
DC Current Gain
SYMBOL
VCEO(SUS) IC=10 mA , IB=0
VCEO=Rated Value,
ICEO
VBE(OFF)=1.5 V
IEBO
VEB=9 V, IC=0
TYP
MAX
400
TC=25°C
TC=100℃
1
5
1
See Figure 5
RBSOA
See Figure 6
hFE1
hFE2
VCE(SAT)
Base-Emitter Saturation Voltage
VBE(SAT)
fT
Cob
tD
tR
tS
IC=0.5A, VCE=2V
IC=1A, VCE=2V
IC=0.5A, IB=0.1A
IC=1A, IB=0.25A
IC=1.5A, IB=0.5A
IC=1A, IB=0.25A, TC=100℃
IC=0.5A, IB=0.1A
IC=1A, IB=0.25A
IC=1A, IB=0.25A, TC=100℃
8
5
IC=100mA, VCE=10V, f=1MHz
VCB=10V, IE=0, f=0.1MHz
4
VCC=125V, IC=1A, IB1=IB2=0.2A,
tP=25μs, Duty Cycle≤1%
tFALL
UNISONIC TECHNOLOGIES CO., LTD
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MIN
Is/b
Collector-Emitter Saturation Voltage
DYNAMIC CHARACTERISTICS
Current-Gain-Bandwidth Product
Output Capacitance
SWITCHING CHARACTERISTICS
Resistive Load (Table 1)
Delay Time
Rise Time
Storage Time
Fall Time
TEST CONDITIONS
40
25
0.5
1
3
1
1
1.2
1.1
10
21
0.05
0.5
2
0.4
UNIT
V
mA
mA
V
V
MHz
pF
0.1
1
4
0.7
μs
μs
μs
μs
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
Inductive Load, Clamped (Table 1)
Storage Time
Crossover Time
Fall Time
SYMBOL
TEST CONDITIONS
tSV
tC
MIN
IC=1A, Vclamp=300V, IB1=0.2A,
VBE(OFF)=5Vdc, TC=100℃
tFALL
TYP
MAX
UNIT
1.7
0.29
0.15
4
0.75
μs
μs
μs
Note: Pulse Test : PW=300μs, Duty Cycle≤2%
CLASSIFICATION OF hFE1
RANK
RANGE
A
8 ~ 16
B
15 ~ 21
C
20 ~ 26
D
25 ~ 31
E
30 ~ 36
F
35 ~ 40
Table 1.Test Conditions for Dynamic Performance
Resistive
Switching
Reverse Bias Safe Operating Area and Inductive Switching
+5V
Vcc
33
1N4933
MJE210
L
Test Circuits
0.001μF
5V
Pw
2N2222
1k
1k
DUTY CYCLE≦10%
tR, tF≦10ns
68
+125V
Vclamp
Ic
RB
+5V
5.1k
IB
Rc
*SELECTED FOR≣1kV
TUT
SCOPE
RB
VCE
1k
1N4933
51
T.U.T.
D1
2N2905
270
0.02μF
NOTE
PW and Vcc Adjusted for Desired Ic
RB Adjusted for Desired IB1
Circuit Values
MR826*
33 1N4933
100
1/2W
Coil Data :
VCC=20V
Ferroxcube core #6656
Vclamp=300V
Full Bobbin ( ~ 200 Turns) #20
-4.0V
MJE200
47
-VBE(OFF)
VCC=125V
RC=125Ω
D1=1N5820 or
Equiv.
RC=47Ω
GAP for 30 mH/2 A
Lcoil=50mH
Test Waveforms
Output Waveforms
Ic
Ic(pk)
t1 Adjusted to
Obtain Ic
t
t1
tf
t1≒
VCE
VCE or
Vclamp
TIME
t
t2
Figure 1. Inductive Switching Measurements
ICPK
Vclamp
tRV
tsv
25μS
0
Test Equipment
Scope-Tektronics
475 or Equivalent
Lcoil(Icpk)
Vcc
Lcoil(Icpk)
t2≒ Vclamp
-8.5V
tr, tf<10ns
Duty Cycly=1.0%
RB and Rc adjusted
for desired IB and Ic
Table 2. Typical Inductive Switching Performance
Ic
AMP
Tc
℃
tsv
μs
tRV
μs
tFI
μs
tTI
μs
tc
μs
0.5
25
100
1.3
1.6
0.23
0.26
0.30
0.30
0.35
0.40
0.30
0.36
1
25
100
1.5
1.7
0.10
0.13
0.14
0.26
0.05
0.06
0.16
0.29
1.5
25
100
1.8
3
0.07
0.08
0.10
0.22
0.05
0.08
0.16
0.28
90% Ic
90% Vclamp
IC
+10.3 V
tf CLAMPED
tFI
tTI
tc
VCE
IB
90% IB1
10% Vclamp 10%
Icpk 2% Ic
Time
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NOTE: All Data Recorded in the Inductive Switching
Circuit in Table 1
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
SWITCHING TIMES NOTE
In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive loads, which are common to SWITCHMODE power
supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements
must be made on each waveform to determine the total switching time. For this reason, the following new terms
have been defined.
tSV = Voltage Storage Time, 90% IB1 to 10% Vclamp
tRV = Voltage Rise Time, 10 ~ 90% Vclamp
tFI= Current Fall Time, 90 ~ 10% IC
tTI = Current Tail, 10 ~ 2% IC
tC = Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these
Terms. For the designer, there is minimal switching loss during storage time and the predominant switching power
losses occur during the crossover interval and can be obtained using the standard equation from AN–222:
PSWT = 1/2 VCCIC(tC)f
In general, tRV + tFI ≈ tC. However, at lower test currents this relationship may not be valid.
As is common with most switching transistors, resistive switching is specified at 25℃ and has become a
benchmark for designers. However, for designers of high frequency converter circuits, the user oriented
specifications which make this a “SWITCHMODE” transistor are the inductive switching speeds (tC and tSV) which
are guaranteed at 100℃.
RESISTIVE SWITCHING PERFORMANCE
Figure 2. Turn-On Time
Figure 3. Turn-Off Time
10
2
7
Vcc=125V
Ic/IB=5
TJ=25℃
1
0.7
Time, t (£gs)
3
Time, t (£gs)
tR
0.5
Vcc=125V
Ic/IB=5
TJ=25℃
ts
5
0.3
0.2
tD @ VBE(OFF)=5V
0.1
0.07
2
1
0.7
0.5
tF
0.3
0.05
0.2
0.03
0.1
0.02 0.03
0.02
0.05 0.07 0.1
0.02 0.03
0.2
0.3
0.5 0.7
10
20
Collector Current, IC (A)
0.05 0.07 0.1
0.2
0.3
0.5
0.7
1
2
Collector Current, IC (A)
Figure 4. Thermal Response
1
Effective Transient Thermal
Resistance, R(t) (Normalized)
0.7
D=0.5
0.5
0.3
0.2
0.2
0.1
0.07
ZθJC(t)=r(t) RθJC
RθJC=3.12℃/W Max
D Curves Apply for Power
Pulse Train Shown
Read Time at t1
TJ(pk)-TC=P(pk) PθJC(t)
0.05
0.1
0.02
0.05
0.03
0.02
0.01
P (PK)
t1
t2
Duty Cycle, D=t1/t2
Single Pulse
0.01
0.01
0.02 0.03
0.05
0.1
0.2 0.3
0.5
1
2
3
5
10
20
50
100
200
500
1000
Time or Pulse Width, t (ms)
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MJE13003
NPN EPITAXIAL SILICON TRANSISTOR
SAFE OPERATING AREA INFORMATION
FORWARD BIAS
There are two limitations on the power handling ability of a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC-VCE limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 5 is based on TC = 25℃; TJ(pk) is variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated when TC≥25℃. Second breakdown limitations do not
derate the same as thermal limitations. Allowable current at the voltages shown on Figure 5 may be found at any
case temperature by using the appropriate curve on Figure 7.
TJ(pk) may be calculated from the data in Figure 4. At high case temperatures, thermal limitations will reduce the
power that can be handled to values less than the limitations imposed by second breakdown.
REVERSE BIAS
For inductive loads, high voltage and high current must be sustained simultaneously during turn-off, in most cases,
with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe
level at or below a specific value of collector current. This can be accomplished by several means such as active
clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe
Operating Area and represents the voltage-current conditions during reverse biased turn-off. This rating is verified
under clamped conditions so that the device is never subjected to an avalanche mode. Figure 6 gives PBSOA
characteristics.
The Safe Operating Area of figures 5 and 6 are specified ratings (for these devices under the test conditions shown.)
Figure 5. Active Region Safe Operating Area
Figure 6. Reverse Bias Safe Operating Area
10
1.6
10 ms
2
Collector Current, IC (A)
Collector Current, IC (A)
5
100μs
1
5.0 ms
dc
0.5
1.0 ms
Tc=25℃
0.2
Thermal Limit(Single Pule)
Bonding Wire Limit
Second Breakdown Limit
Curves Apply Below Rated
0.1
0.05
1.2
VBE(OFF)=9V
TJ≦100℃
IB1=1A
0.8
0.4
VCEO
5V
0.02
3V
1.5V
0
0.01
5
10
20
100
50
200 300
500
0
100
200
300
400
500
600
700
800
Collector-Emitter Clamp Voltage,VCE (V)
Collector-Emitter Voltage, VCE (V)
Figure 7. Forward Bias Power Derating
1
Second Breakdown
Derating
Power Derating Factor
0.8
0.6
Thermal
Derating
0.4
0.2
0
20
40
60
80
100
120
140
160
Case Temperature, TC (℃)
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NPN EPITAXIAL SILICON TRANSISTOR
TYPICAL PERFORMANCE CHARACTERISTICS
DC Current Gain
Collector Saturation Region
2
Collector-Emitter Voltage, VCE(V)
80
60
DC Current Gain, hFE
TJ=150℃
40
25℃
30
20
-55℃
1
0
8
VCE=2V
- - - - - -VCE=5V
6
0.05 0.07 0.1
0.2
0.3
0.5 0.7
1
Ic=0.1A 0.3A 0.5A
1.2
2
0.005 0.01
0.02
0.05
0.1
0.2
0.5
1
2
Base Current, IB (A)
Base-Emitter Voltage
Collector-Emitter Saturation Region
1.4
0.35
VBE(SAT) @ IC/IB=3
- - - - - -VBE(ON) @ VCE=2V
1.2
0.3
0.25
1
Voltage, V(V)
Voltage, V(V)
1.5A
0.4
Collector Current,IC (A)
TJ=-55℃
25℃
0.8
25℃
0.6
0.02 0.03
0.05 0.07 0.1
0.2
0.3
Ic/IB=3
TJ=-55℃
0.2
25℃
0.15
0.1
150℃
150℃
0.05
0.4
0.5 0.7
1
0
0.02 0.03
2
0.05 0.07 0.1
Collector Current,IC (A)
Collector cut-off Region
4
300
Capacitance, C (pF)
10
TJ=150℃
125℃
100℃
1
10
0
0.5 0.7
1
2
Capacitance
VCE=250V
10
0.3
500
3
2
0.2
Collector Current, IC (A)
10
Collector Current, IC (μA)
1A
0.8
0
0.002
4
0.02 0.03
TJ=25℃
1.6
75℃
50℃
TJ=25℃
Cib
200
100
70
50
30
20
10
-1
7
5
FORWARD
REVERSE
10
-0.4
-0.2
Cob
10
25℃
0
+0.2
+0.4
+0.6
Base-Emitter Voltage, VBE (V)
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0.1 0.2 0.5
1
2
5
10 20 50
100 200 500
1000
Reverse Voltage, VR (V)
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NPN EPITAXIAL SILICON TRANSISTOR
UTC assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or
other parameters) listed in products specifications of any and all UTC products described or contained
herein. UTC products are not designed for use in life support appliances, devices or systems where
malfunction of these products can be reasonably expected to result in personal injury. Reproduction in
whole or in part is prohibited without the prior written consent of the copyright owner. The information
presented in this document does not form part of any quotation or contract, is believed to be accurate
and reliable and may be changed without notice.
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