ESDALC6V1-1U2 Single-line low capacitance Transil™ for ESD protection Features ■ Breakdown voltage VBR = 6.1 V min. ■ Unidirectional device ■ Multiple ESD strike sustainability ■ Very low diode capacitance: 12 pF typ. at 0 V ■ Low leakage current ■ 0201 SMD package size compatible ■ Ultra small PCB area: 0.18 mm2 ■ RoHS compliant Pin 1 available in different forms ST0201 package Benefits ■ High ESD protection level ■ High integration ■ Suitable for high density boards ■ MSL1 Figure 1. Functional diagram (top view) Complies with the following standards: ■ IEC 61000-4-2 level 4 Applications Where transient overvoltage protection in ESD sensitive equipment is required, such as: ■ Portable multimedia players and accessories ■ Notebooks ■ Digital cameras and camcorders ■ Communication systems ■ Cellular phone handsets and accessories Description The ESDALC6V1-1U2 is a unidirectional single line TVS diode designed to protect the data lines or other I/O ports against ESD transients. The device is ideal for applications where both reduced line capacitance and board space saving are required. TM: Transil is a trademark of STMicroelectronics September 2011 Doc ID 15089 Rev 3 1/11 www.st.com 11 Characteristics ESDALC6V1-1U2 1 Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter VPP Peak pulse voltage: IEC 61000-4-2 contact discharge PPP Peak pulse power dissipation (8/20 µs) (1) IPP Peak pulse current (8/20 µs) Tj Junction temperature Tstg Value Unit kV ±8 Tj initial = Tamb Storage temperature range TL Maximum lead temperature for soldering during 10 s Top Operating junction temperature range 20 W 2 A 125 °C - 55 to +150 °C 260 °C -40 to +125 °C 1. For a surge greater than the maximum values, the diode will fail in short-circuit Figure 2. Electrical characteristics (definitions) I Symbol VBR VCL IRM VRM IF IPP IR VF Rd αT Table 2. = = = = = = = = = = IF VF VCL VBR VRM V IRM IR Slope = 1/Rd IPP Electrical characteristics (values, Tamb = 25 °C) Symbol 2/11 Parameter Breakdown voltage Clamping voltage Leakage current @ VRM Stand-off voltage Forward current Peak pulse current Breakdown current Forward voltage drop Dynamic impedance Voltage temperature Test conditions Min. VBR IR = 1 mA IRM VRM = 3 V Rd Square pulse, IPP = 1 A tp = 2.5 µs αT ΔVBR = αT(Tamb - 25 °C) x VBR (25 °C) Cline VR = 0 V, Fosc = 1 MHz, Vosc = 30 mV Typ. 6.1 Doc ID 15089 Rev 3 Max. Unit 8.0 V 100 nA 4.5 -4 Ω 1.3 12.0 10 /°C pF ESDALC6V1-1U2 Figure 3. Characteristics Relative variation of peak pulse power versus initial junction temperature Figure 4. Peak pulse power versus exponential pulse duration PPP(W) PPP[T j initial] / PPP [T j initial=25°C] 1000 1.1 Tj initial = 25 °C 1.0 0.9 0.8 100 0.7 0.6 0.5 0.4 10 0.3 0.2 T j(°C) 0.1 tP(µs) 0.0 1 0 25 Figure 5. 50 75 100 125 150 Clamping voltage versus peak pulse current (square pulse, typical values) 1 Figure 6. IPP(A) 10.0 10 1000 Junction capacitance versus reverse applied voltage (typical values) C(pF) 12 Tp = 2.5 µs Tj initial =25 °C 100 F=1 MHz VOSC=30 mVRMS Tj=25 °C 10 8 6 1.0 4 2 VCL(V) Vline (V) 0 0.1 5 Figure 7. 7 9 11 13 0 15 1 2 3 4 5 Relative variation of leakage current versus junction temperature (typical values) IR [T j] / IR [T j=25°C] 100 VR =3V 10 T j(°C) 1 25 50 75 Doc ID 15089 Rev 3 100 125 3/11 Characteristics Figure 8. ESDALC6V1-1U2 ESD response to IEC 61000-4-2 (+8 kV contact discharge) Figure 9. ESD response to IEC 61000-4-2 (-8 kV contact discharge) 10 V/Div 10 V/Div 20 ns/Div 20 ns/Div Figure 10. S21 attenuation measurement results 0.00 dB - 6.00 Average Performance (50WSystem) (50Ω System) -12.00 -18.00 Pass band attenuation 0.01 dB -3 dB point 1.02MHz 538 GHz Attenuation (0.8 – 4GHz) < -5.2 -2.1dB dB (-6.1dB@900 MHz (-2.5dB@900MHz [email protected]) -14 [email protected] GHz) -24.00 F (Hz) - 30.00 100.0k 4/11 1.0M 10.0M Doc ID 15089 Rev 3 100.0M 1.0G ESDALC6V1-1U2 2 Ordering information scheme Ordering information scheme Figure 11. Ordering information scheme ESDA LC 6V1 - 1U2 ESD Array Low capacitance Breakdown Voltage 6V1 = 6.1 V min Package U2 = ST0201 Doc ID 15089 Rev 3 5/11 Package information 3 ESDALC6V1-1U2 Package information ● Epoxy meets UL94, V0 ● Lead-free packages In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Table 3. ST0201 dimensions Dimensions D Ref Millimetres Inches E Min Typ Max A 0.23 0.28 0.33 0.009 0.011 0.013 b1 0.13 0.18 0.23 0.005 0.007 0.009 b2 0.14 0.19 0.24 0.006 0.007 0.009 D 0.55 0.60 0.65 0.022 0.024 0.026 E 0.25 0.30 0.35 0.010 0.012 0.014 Top A Side b1 b2 L1 Min Typ Max L2 Bottom Pin 1 b1 e b2 L1 e L2 Bottom e Pin 1 available in different forms 0.35 0.014 L1 0.20 0.25 0.30 0.008 0.010 0.012 L2 0.20 0.25 0.30 0.008 0.010 0.012 Figure 12. Footprint (dimensions in mm) Figure 13. Marking 1.05 0.425 0.425 0.30 Pin1 L1 Pin 2 0.20 Note: 6/11 Product marking may be rotated by multiples of 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Doc ID 15089 Rev 3 ESDALC6V1-1U2 Package information Figure 14. Tape and reel specifications Bar indicates Pin 1 Ø 1.55 4.0 2.0 D1 D1 D1 0.38 0.34 D1 D1 D1 D1 8.0 0.68 3.5 1.75 0.22 2.0 All dimensions are typical values in mm User direction of unreeling Doc ID 15089 Rev 3 7/11 Recommendation on PCB assembly ESDALC6V1-1U2 4 Recommendation on PCB assembly 4.1 Stencil opening design Figure 15. Recommended stencil windows position (dimensions in mm) 1.05 0.425 0.425 0.225 0.30 0.038 0.040 0.065 0.20 Footprint 4.2 8/11 0.320 0.038 Stencil window Solder paste 1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste is recommended. 3. Offers a high tack force to resist component movement during high speed 4. Solder paste with fine particles: powder particle size is 20-45 µm. Doc ID 15089 Rev 3 ESDALC6V1-1U2 4.3 4.4 4.5 Recommendation on PCB assembly Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. The symmetrical layout is recommended, in case any tilt phenomena caused by asymmetrical solder paste amount due to the solder flow away. Reflow profile Figure 16. ST ECOPACK® recommended soldering reflow profile for PCB mounting Temperature (°C) 260°C max 255°C 220°C 180°C 125 °C 2°C/s recommended 2°C/s recommended 6°C/s max 6°C/s max 3°C/s max 3°C/s max 0 0 1 2 3 4 5 10-30 sec 90 to 150 sec Note: 6 7 Time (min) 90 sec max Minimize air convection currents in the reflow oven to avoid component movement. Doc ID 15089 Rev 3 9/11 Ordering information 5 ESDALC6V1-1U2 Ordering information Table 4. Ordering information Order code Marking Weight Base qty Delivery mode ESDALC6V1-1U2 L1(1) 0.124 mg 15000 Tape and reel 1. The marking can be rotated by multiples of 90° to differentiate assembly location 6 Revision history Table 5. 10/11 Document revision history Date Revision Changes 07-Oct-2008 1 Initial release. 25-Jan-2010 2 Updated base qty Table 4. 22-Sep-2011 3 Updated package illustrations on page 1 and in Table 3 for Pin 1 available forms. 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