L5150GJ
5 V low dropout voltage regulator
Datasheet − production data
Features
Max DC supply voltage
VS
40 V
Max output voltage tolerance
ΔVo
+/-2%
Max dropout voltage
Vdp
500 mV
Io
150 mA
Iqn
5 µA(1)
55 µA(2)
Output current
Quiescent current
1. Typical value with regulator disabled.
*$3*3
Description
L5150GJ is a low dropout linear regulator with
microprocessor control functions such as power
on reset, low voltage reset, early warning, on/off
control. Typical quiescent current is 55 µA in very
low output current mode and enabled regulator. It
drops to 5 µA with not enabled regulator.
2. Typical value with regulator enabled.
■
Operating DC supply voltage range
5.6 V to 40 V
■
Low dropout voltage
■
Low quiescent current consumption
■
Precision output voltage 5 V +/- 2%
■
Reset circuit sensing the output voltage
■
Programmable reset pulse delay with external
capacitor
■
Adjustable reset threshold
■
Early warning
■
Very wide stability range with low value output
capacitor
■
Thermal shutdown and short-circuit protection
■
Wide temperature range (Tj = -40 °C to 150 °C)
■
Enable input for enabling / disabling the voltage
regulator
Table 1.
0OWER33/
On chip trimming results in high output voltage
accuracy (2%). Accuracy is kept over wide
temperature range, line and load variation. Early
warning circuit monitors the input voltage and
compares it with an internal voltage reference.
Output voltage reset threshold can be adjusted
down to 3.5 V by means of an external voltage
divider.
The maximum input voltage is 40 V. The max
output current is internally limited. Internal
temperature protection disables the voltage
regulator output. In addition, only low-value
ceramic capacitor on output is required for
stability.
Device summary
Order codes
Package
PowerSSO-12
October 2012
This is information on a product in full production.
Tube
Tape & reel
L5150GJ
L5150GJTR
Doc ID 15540 Rev. 11
1/29
www.st.com
1
Contents
L5150GJ
Contents
1
Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
4
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.2
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.3
Early warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.4
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.1
5
6
2/29
PowerSSO-12 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.1
ECOPACK® . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.2
PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
5.3
PowerSSO-12 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 15540 Rev. 11
L5150GJ
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Early warning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
PowerSSO-12 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
PowerSSO-12 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Doc ID 15540 Rev. 11
3/29
List of figures
L5150GJ
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Figure 10.
Figure 11.
Figure 12.
Figure 13.
Figure 14.
Figure 15.
Figure 16.
Figure 17.
Figure 18.
Figure 19.
Figure 20.
Figure 21.
Figure 22.
Figure 23.
Figure 24.
Figure 25.
Figure 26.
Figure 27.
Figure 28.
Figure 29.
Figure 30.
Figure 31.
Figure 32.
Figure 33.
Figure 34.
Figure 35.
4/29
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Configuration diagram (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Output voltage vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output voltage vs. VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output voltage vs. VEn . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Drop voltage vs. output current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current consumption vs. output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current consumption vs. output current (at light load condition). . . . . . . . . . . . . . . . . . . . . 11
Current consumption vs. input voltage (Io = 0.1 mA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Current consumption vs. input voltage (Io = 75 mA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Current limitation vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Current limitation vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Short-circuit current vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Short-circuit current vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
VEn_high vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VEn_low vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VRhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VRlth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VEWi_thh vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
VEWi_thl vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Icr vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Idr vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
PSRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Stability region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Maximum load variation response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Reset time diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Early warning time diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
PowerSSO-12 PC board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Rthj-amb vs PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . . 20
PowerSSO-12 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . 21
Thermal fitting model of Vreg in PowerSSO-12 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
PowerSSO-12 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
PowerSSO-12 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
PowerSSO-12 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Doc ID 15540 Rev. 11
L5150GJ
1
Block diagram and pins description
Block diagram and pins description
Figure 1.
Block diagram
9R
9V
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7KU HVKRO G
3RZ HU
(Q
92/7$*(
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7KHU P DO
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6KXW GRZ Q
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5HV
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5HVHW
9FU
(:R
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*$3*36
Figure 2.
Configuration diagram (top view)
4!"3UBSTRATE
*$3*36
Doc ID 15540 Rev. 11
5/29
Block diagram and pins description
Table 2.
6/29
L5150GJ
Pins description
Pin
Name
Function
1
Res_Adj
Reset adjustable threshold. Connected to an appropriate external
voltage divider, it allows to properly set the reset threshold down to
3.5 V. Connect to GND if not needed.
2
Res
Reset output. Internally connected to Vo through a 20 KΩ pull-up
resistor. This pin is pulled low when Vo < Vo_th. Keep open if not
needed.
3
Vcr
Reset delay. Connect an external capacitor between Vcr pin and
ground to adjust the reset delay time. Keep open if not needed.
4
GND
5
NC
Not connected.
6
Vo
5 V regulated output. Block to GND with a ceramic capacitor
(Co ≥ 220 nF for regulator stability).
7
VS
Supply voltage, block directly to GND on the IC with a capacitor.
8
NC
Not connected.
9
En
Enable input. A high signal switches the regulator on. Connect to
VS if not needed.
10
EWi
Early warning input. This pin monitors the VS voltage level through
a resistor divider. Connect to VS if not needed.
11
NC
Not connected.
12
EWo
Early warning output. Internally connected to Vo through 20 KΩ
pull up resistor. This pin is pulled low when EWi is below bandgap
reference voltage. Keep open if not needed.
-
TAB
TAB is connected to the substrate of the chip: connect to GND or
leave open (see Figure 2).
Ground reference.
Doc ID 15540 Rev. 11
L5150GJ
Electrical specifications
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the Table 3: Absolute maximum ratings may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Table 3.
Absolute maximum ratings
Symbol
Parameter
Unit
-0.3 to 40
V
Vsdc
DC supply voltage
Isdc
Input current
Vodc
DC output voltage
-0.3 to 6
Iodc
DC output current
Internally limited
Vod Res
Open drain output voltage Res
-0.3 to Vodc + 0.3
Iod Res
Open drain output current Res
Internally limited
VRes_adj
VRes_adj voltage
-0.3 to Vodc + 0.3
V
Vod EWo
Open drain output voltage EWo
-0.3 to Vodc + 0.3
V
Iod EWo
Open drain output current EWo
Internally limited
Vcr voltage
-0.3 to Vo + 0.3
V
Vcr
Internally limited
V
V
VEWi
Early warning input voltage
-0.3 to 40
V
VEn
Enable input
-0.3 to 40
V
Junction temperature
-40 to 150
°C
+/- 2
kV
+/- 750
V
Tj
2.2
Value
VESD HBM
ESD HBM voltage level (HBM-MIL STD 883C)
VESD CDM
ESD CDM voltage level (CDM- )
Thermal data
Table 4.
Symbol
Thermal data(1)
Parameter
Value
Unit
Rthj-case
Thermal resistance junction to case:
PowerSSO-12
20
°K/W
Rthj-amb
Thermal resistance junction to ambient:
PowerSSO-12
52
°K/W
1. The values quoted are for PCB 77 mm x 86 mm x 1.6 mm, FR4, double copper layer with single heatsink
layer, copper thickness 70 µm, thermal vias, copper area 2 cm2.
Doc ID 15540 Rev. 11
7/29
Electrical specifications
2.3
L5150GJ
Electrical characteristics
Values specified in this section are for VS = 5.6 V to 31 V, Tj = -40 °C to +150 °C unless
otherwise stated.
Table 5.
Pin
Symbol
Vo
Vo_ref
Output voltage
VS = 8 V to 18 V,
Io = 8 mA to 150 mA
4.9
5.0
5.1
V
Vo
Vo_ref
Output voltage
VS = 5.6 V to 31 V,
Io = 8 mA to 150 mA
4.85
5.0
5.15
V
Vo
Vo_ref
Output voltage
VS = 5.6 V to 31 V,
Io = 0.1 mA to 8 mA
4.75
5.0
5.25
V
Vo
Ishort
Short-circuit current
VS = 13.5 V
0.65 0.95 1.25
A
Vo
Ilim
Output current capability (1)
VS = 13.5 V
280
VS, Vo
Vline
Line regulation voltage
Vo
VS, Vo
Vload
Vdp
Parameter
Load regulation voltage
Drop voltage (2)
Test condition
VS = 6 V to 28 V,
Io = 30 mA
40
mV
VS = 8 V to 18 V,
Io = 8 mA to 150 mA
55
VS = 13.5 V,
Tj = 25 °C,
Io = 8 mA to 150 mA
40
Io = 150 mA
500
fr = 100 Hz
Vo
Ioth_H
Normal consumption mode
output current
VS = 8 V to 18 V
Vo
Ioth_L
Very low consumption mode
VS = 8 V to 18 V
output current
Vo
Ioth_Hyst
VS, Vo
VS, Vo
Iqn_1
Iqn_150
mV
(3)
Ripple rejection
470
60
8
mA
1.1
VS = 13.5 V,
Tj = 25 °C
0.8
Current consumption
with regulator disabled
Iqs = IVs – Io
VS = 13.5 V,
En = low
5
10
VS = 13.5 V,
Io = 0.1 mA to 1 mA,
En = high
Tj = 25 °C
55
80
Current consumption
with regulator enabled
Iqn_150 = IVs – Io
Doc ID 15540 Rev. 11
mA
mA
µA
µA
VS = 13.5 V,
Io = 0.1 mA to 1 mA,
En = high
VS = 13.5 V,
Io = 150 mA,
En = high
mV
dB
Output current switching
threshold hysteresis
Current consumption
with regulator enabled
Iqn_1 = IVs – Io
Unit
mA
SVR
Iqs
Min. Typ. Max.
660
VS, Vo
VS, Vo
8/29
General
95
3.2
4.2
mA
L5150GJ
Electrical specifications
Table 5.
Pin
General (continued)
Symbol
Parameter
Test condition
Min. Typ. Max.
Thermal protection
temperature
Tw
150
Thermal protection
temperature hysteresis
Tw_hy
190
10
Unit
°C
°C
1. Measured output current when the output voltage has dropped 100 mV from its nominal value obtained at
13.5 V and Io = 75 mA.
2. Vs - Vo measured dropout when the output voltage has dropped 100 mV from its nominal value obtained at
13.5 V and Io = 75 mA.
3. Guaranteed by design.
Table 6.
Reset
Pin
Symbol
Parameter
Test condition
Max.
Unit
Res
Vres_l
Reset output low
voltage
Rext = 5 kW,
Vo > 1 V
0.4
V
Res
IRes_lkg
Reset output high
leakage current
VRes = 5 V
1
µA
Res
RRes
Pull up internal
resistance
Versus Vo
10
20
40
kΩ
Res
Vo_th
Vo out of regulation
threshold
VRes_adj < 0.2 V,
Vo decreasing
6
8
10
% Below
Vo_ref
Res_adj
VRes_adj
Reset adjustable
switching threshold
2.35
2.5
2.65
V
Res_adj
VRes_adjl
Reset adjustable low
voltage
0.4
0.9
1.3
V
Res_adj
IRes_adj_lkg
Reset adjustable
leakage current
VRes_adj = 2.5 V
-1
1
µA
Vcr
VRlth
Reset timing low
threshold
VS = 13.5 V
15
18
22
% Vo_ref
Vcr
VRhth
Reset timing high
threshold
VS = 13.5 V
47
50
53
% Vo_ref
Vcr
Icr
Charge current
VS = 13.5 V
10
20
30
µA
Vcr
Idr
Discharge current
VS = 13.5 V
10
20
30
µA
Res
Trr
Reset reaction time
2
µs
Res
Trd
Reset delay time
11
ms
VS = 13.5 V,
Ctr = 1000 pF
Doc ID 15540 Rev. 11
Min.
2
Typ.
4
9/29
Electrical specifications
Table 7.
Early warning
Pin
Symbol
Parameter
EWi
VEWi_thl
EWi
VEWi_thh
EWi
VEWi_thhyst
EWi
IEWi_lkg
EW input leakage
current
VEWi = 2.5 V,
VS > 4 V
-1
EWo
REWo
Pull up internal
resistance
Versus Vo
10
EWo
VEWo_lv
EW output low voltage
(with external pull up)
VEWi < 2.35 V,
VS > 4 V,
Rext = 5 kΩ
EWo
IEWo_lkg
EW output leakage
current
VEWo = 5 V
Table 8.
10/29
L5150GJ
Test condition
Min.
Typ.
Max.
Unit
EW input low threshold
voltage
2.35
2.50
2.65
V
EW input high
threshold voltage
2.42
2.57
2.72
V
EW input threshold
hysteresis
70
20
mV
1
µA
40
kΩ
0.4
V
1
µA
Max.
Unit
1
V
Enable
Pin
Symbol
Parameter
En
VEn_low
En input low voltage
En
VEn_high
En input high voltage
En
VEn_hyst
En input hysteresis
En
I_leak
Pull-down current
Test condition
Min.
Typ.
3
V
500
VEn = 5 V
Doc ID 15540 Rev. 11
1.8
mV
10
µA
L5150GJ
Electrical specifications
2.4
Electrical characteristics curves
Figure 3.
Output voltage vs. Tj
Figure 4.
Output voltage vs. VS
9RUHI9
6O?REF6
)OM!
6S6
,R P$
7F &
969
4J #
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Figure 5.
Output voltage vs. VEn
Figure 6.
9RBUHI9
Drop voltage vs. output current
6DP6
9V 9
7F &
4J #
4J #
)OM!
9HQ9
'!0'#&4
*$3*36
Figure 7.
Current consumption vs. output
current
Figure 8.
,TQP$
Current consumption vs. output
current (at light load condition)
,TQP$
9V 9
9V 9
7M &
(Q +LJK
,RP$
*$3*&)7
,RP$
*$3*36
Doc ID 15540 Rev. 11
11/29
Electrical specifications
Figure 9.
L5150GJ
Current consumption vs. input
voltage (Io = 0.1 mA)
Figure 10. Current consumption vs. input
voltage (Io = 75 mA)
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Figure 12. Current limitation vs. input voltage
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Figure 13. Short-circuit current vs. Tj
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L5150GJ
Electrical specifications
Figure 15. VEn_high vs. Tj
Figure 16. VEn_low vs. Tj
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Figure 17. VRhth vs. Tj
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Figure 18. VRlth vs. Tj
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Doc ID 15540 Rev. 11
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Electrical specifications
L5150GJ
Figure 21. Icr vs. Tj
Figure 22. Idr vs. Tj
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L5150GJ
Application information
3
Application information
3.1
Voltage regulator
The voltage regulator uses a p-channel mos transistor as a regulating element. With this
structure a very low dropout voltage at current up to 150 mA is obtained. The output voltage
is regulated up to input supply voltage of 40 V. The high-precision of the output voltage (2%)
is obtained with a pre-trimmed reference voltage. The voltage regulator automatically adapts
its own quiescent current to the output current level. In light load conditions the quiescent
current goes down to 55 µA only (low consumption mode). This procedure features a certain
hysteresis on the output current (see Figure 8). Short-circuit protection to GND and a
thermal shutdown are provided.
Figure 24. Application schematic
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The input capacitor C 1 ≥ 100 µF is necessary as backup supply for negative pulses which
may occur on the line. The second input capacitor C 2 ≥ 220 nF is needed when the C1 is too
distant from the VS pin and it compensates smooth line disturbances. The C0 ceramic
capacitor, connected to the output pin, is for bypassing to GND the high-frequency noise
and it guarantees stability even during sudden line and load variations. Suggested value is
C0 = 220 nF with ESR ≥ 100 mΩ .
Stability region is reported in Figure 25.
Doc ID 15540 Rev. 11
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Application information
L5150GJ
Figure 25. Stability region
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Note: The curve which describes the minimum ESR is derived from characterization data on the regulator
with connected ceramic capacitors which feature low ESR values (at 100 kHz). Any capacitor with
further lower ESR than the given plot value must be evaluated in each and every case.
Figure 26. Maximum load variation response
Vo = 50 mV/div
Io = 50 mA/div
VS = 13.5 V
Io = 8 to 150 mA
Tc = 25 °C
Co = 220 nF
16/29
Doc ID 15540 Rev. 11
L5150GJ
3.2
Application information
Reset
The reset circuit monitors the output voltage Vo. If the output voltage becomes lower than
Vo_th then Res goes low with a delay time (trr). When the output voltage becomes higher
than Vo_th then Res goes high with a delay time trd. This delay is obtained by 32 periods of
oscillator.
The oscillator period is given by:
Equation 1
Tosc = [(VRhth - VRlth) x Ctr] / Icr + [(VRhth - VRlth) x Ctr] / Idr
where:
Icr = 20 µA is an internally generated charge current,
Idr = 20 µA is an internally generated discharge current,
VRhth = 2.5 V (typ) and VRlth = 0.9 V (typ) are two voltage thresholds,
Ctr is an external capacitor put between Vcr pin and GND.
Doc ID 15540 Rev. 11
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Application information
L5150GJ
Reset pulse delay Trd is given by:
Equation 2
trd = 32 x Tosc
The Output Voltage Reset threshold can be adjusted via an external voltage divider R1 + R2
(R1 connected between Res_Adj and V0, R2 connected between Res_Adj and GND) according
to the following formula:
Equation 3
Vthre = [(R1 + R2) / R2] * VRes_adj
The Output Voltage Reset threshold can be decreased down to 3.5 V. If it is needed to
maintain it to its default value (8% below Vo_ref typical), it is enough to connect the Res_Adj
pin directly to GND.
Figure 27. Reset time diagram
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Doc ID 15540 Rev. 11
L5150GJ
3.3
Application information
Early warning
This circuit compares the EWi input signal with the internal voltage reference (typically
2.5 V). The use of an external voltage divider makes the comparator very flexible in the
application. This function can be used to supervise the supply input voltage either before or
after the protection diode and to give additional information to the microprocessor such as
low voltage warnings.
Figure 28. Early warning time diagram
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3.4
Enable
L5150GJ is also provided with an enable input, an high signal switches the regulator on.
When the enable pin is set to low the output is switched-off and the current consumption of
the device is 5 µA typical.
Doc ID 15540 Rev. 11
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Package and PCB thermal data
L5150GJ
4
Package and PCB thermal data
4.1
PowerSSO-12 thermal data
Figure 29. PowerSSO-12 PC board
.
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1. Layout condition of Rth and Zth measurements (PCB: double layer, thermal vias,
FR4 area = 77 mm x 86 mm, PCB thickness =1.6 mm, Cu thickness = 70 µm (front and back side) thermal
vias separation 1.2 mm, thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness on vias 25 µm,
footprint dimension 4.1 mm x 6.5 mm ).
Figure 30. Rthj-amb vs PCB copper area in open box free air condition
57+MBDPE.:
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20/29
Doc ID 15540 Rev. 11
L5150GJ
Package and PCB thermal data
Figure 31. PowerSSO-12 thermal impedance junction ambient single pulse
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where δ = tP/T
Figure 32. Thermal fitting model of Vreg in PowerSSO-12
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Doc ID 15540 Rev. 11
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Package and PCB thermal data
Table 9.
22/29
L5150GJ
PowerSSO-12 thermal parameter
Area (cm2)
Footprint
R1 (°K/W)
1.53
R2 (°K/W)
3.21
R3 (°K/W)
5.2
R4 (°K/W)
2
8
7
7
8
R5 (°K/W)
22
15
10
R6 (°K/W)
26
20
15
C1 (W.s/°K)
0.00004
C2 (W.s/°K)
0.0016
C3 (W.s/°K)
0.08
C4 (W.s/°K)
0.2
0.1
0.1
C5 (W.s/°K)
0.27
0.8
1
C6 (W.s/°K)
3
6
9
Doc ID 15540 Rev. 11
L5150GJ
Package and packing information
5
Package and packing information
5.1
ECOPACK®
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
5.2
PowerSSO-12 mechanical data
Figure 33. PowerSSO-12 package dimensions
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Doc ID 15540 Rev. 11
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Package and packing information
Table 10.
L5150GJ
PowerSSO-12 mechanical data
Millimeters
Symbol
Min.
Max.
A
1.250
1.620
A1
0.000
0.100
A2
1.100
1.650
B
0.230
0.410
C
0.190
0.250
D
4.800
5.000
E
3.800
4.000
e
0.800
H
5.800
6.200
h
0.250
0.500
L
0.400
1.270
k
0°
8°
X
1.900
2.500
Y
3.600
4.200
ddd
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Typ.
0.100
Doc ID 15540 Rev. 11
L5150GJ
5.3
Package and packing information
PowerSSO-12 packing information
Figure 34. PowerSSO-12 tube shipment (no suffix)
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Doc ID 15540 Rev. 11
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Revision history
6
L5150GJ
Revision history
Table 11.
Document revision history
Date
Revision
09-Aug-2007
1
Initial release.
2
Modified Description on cover page.
Updated Table 5.: General:
– changed Vo_ref, Vline, Vload test conditions
– added notes to Ilim and Vdp parameters
– added Ioth_H, Ioth_L, Ioth parameters.
Updated Table 6.: Reset:
– added VRes_adj parameter
– changed VRlth values (min./ typ./ max.) from 17/20/23 to 20/23/26
(% Vo_ref).
Updated Table 8.: Enable:
– changed VEn_hyst typ. value from 800 mV to 500 mV
– changed I_leak typ. value from 3 µA to 1.8 µA.
Modified Section 3.2: Reset.
3
Updated Table 5.: General :
– changed Ilim values (Min./Typ./Max.) from 0.7/1/1.30 A to
280/470/660 mA.
– Vo_ref parameter : updated Io test condition
Old -> Io= 0.1 mA to I0mA
New -> Io= 0.1 mA to 8 mA.
4
Updated Table 5.: General :
– Vload parameter : updated Io test condition
Old -> Io= 5 mA to I50 mA
New -> Io= 8 mA to 150 mA
06-Mar-2008
09-May-2008
13-Oct-2008
26/29
Changes
Doc ID 15540 Rev. 11
L5150GJ
Revision history
Table 11.
Document revision history (continued)
Date
15-Apr-2009
Revision
Changes
5
Updated corporate template
Updated Figure 2: Configuration diagram (top view)
Table 2: Pins description
– Added new row
Table 4: Thermal data
– Rthj-amb: changed value
– Updated TableFootnote
Table 5: General
– Vload: changed max value for Vs = 8 V to 18 V, added new row
– Iqn_1: changed Test conditions (added Tj = 25 °C), added new row
Table 6: Reset
– VRlth: changed min/typ/max value
– VRes_adjl: replaced with VRlth, changed Parameter
Table 7: Early warning
– Updated symbols
Added Figure 3: Output voltage vs. Tj
Added Figure 4: Output voltage vs. VS
Added Figure 5: Output voltage vs. VEn
Added Figure 6: Drop voltage vs. output current
Added Figure 7: Current consumption vs. output current
Added Figure 8: Current consumption vs. output current (at light load
condition)
Added Figure 9: Current consumption vs. input voltage (Io = 0.1 mA)
Added Figure 10: Current consumption vs. input voltage (Io = 75 mA)
Added Figure 11: Current limitation vs. Tj
Added Figure 12: Current limitation vs. input voltage
Added Figure 13: Short-circuit current vs. Tj
Added Figure 14: Short-circuit current vs. input voltage
Added Figure 15: VEn_high vs. Tj
Added Figure 16: VEn_low vs. Tj
Added Figure 17: VRhth vs. Tj
Added Figure 18: VRlth vs. Tj
Added Figure 19: VEWi_thh vs. Tj
Added Figure 20: VEWi_thl vs. Tj
Added Figure 21: Icr vs. Tj
Added Figure 22: Idr vs. Tj
Added Figure 23: PSRR
Section 3.1: Voltage regulator
– Updated text
– Added Figure 24: Application schematic
– Added Figure 26: Maximum load variation response
Section 3.2: Reset
– VRlth: changed value from 1.15 V to 0.9 V in Equation 1
Updated Section 3.4: Enable
Added Section 4: Package and PCB thermal data
Changed Section 5.1: ECOPACK®
Doc ID 15540 Rev. 11
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Revision history
L5150GJ
Table 11.
Document revision history (continued)
Date
Changes
6
Changed document title
Table 5: General
– Ioth_H, Ioth_L: added test condition
Updated Figure 4: Output voltage vs. VS
Section 3.3: Early warning
– changed internal voltage reference typical value from
1.23 V to 2.5 V
Updated Figure 31: PowerSSO-12 thermal impedance junction
ambient single pulse
7
Updated features list.
Updated Table 2: Pins description.
Updated Section 3.1: Voltage regulator.
Corrected Equation 3 on Section 3.2: Reset.
19-Apr-2010
8
Updated footnote description of Table 4: Thermal data.
Updated Figure 30: Rthj-amb vs PCB copper area in open box free
air condition.
Updated Table 9: PowerSSO-12 thermal parameter.
30-Jan-2012
9
Updated Figure 25: Stability region on page 16.
07-Feb-2012
10
Modified Figure 25: Stability region on page 16.
02-Oct-2012
11
Updated Table 6: Reset:
– Trd: updated maximum value
09-Jun-2009
04-Dec-2009
28/29
Revision
Doc ID 15540 Rev. 11
L5150GJ
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