STMICROELECTRONICS VN750SMTR-E

VN750SM-E
HIGH SIDE DRIVER
Table 1. General Features
Type
VN750SM-E
Figure 1. Package
RDS(on)
IOUT
VCC
55 mΩ
6A
36 V
CMOS COMPATIBLE INPUT
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ PROTECTION AGAINST LOSS OF GROUND
■ VERY LOW STAND-BY CURRENT
■ REVERSE BATTERY PROTECTION (*)
■ IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
■
SO-8
c
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Active current limitation combined with thermal
shutdown and automatic restart protect the device
against overload.
The device detects open load condition both in on
and off state. The openload threshold is aimed at
detecting the 5W/12V standard bulb as an
openload fault in the on state. Output shorted to
VCC is detected in the off state. Device
automatically turns off in case of ground pin
disconnection.
o
s
b
O
-
DESCRIPTION
The VN750SM-E is a monolithic device designed
in STMicroelectronics VIPower M0-3 Technology,
intended for driving any kind of load with one side
connected to ground.
Active VCC pin voltage clamp protects the device
against low energy spikes (see ISO7637 transient
compatibility table).
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Table 2. Order Codes
Package
SO-8
Tube
VN750SM-E
Tape and Reel
VN750SMTR-E
Note: (*) See application schematic at page 9.
Rev. 1
October 2004
1/20
VN750SM-E
Figure 2. Block Diagram
VCC
OVERVOLTAGE
DETECTION
VCC
CLAMP
UNDERVOLTAGE
DETECTION
GND
Power CLAMP
DRIVER
INPUT
OUTPUT
LOGIC
CURRENT LIMITER
ON STATE OPENLOAD
DETECTION
STATUS
OVERTEMPERATURE
DETECTION
e
t
le
Table 3. Absolute Maximum Ratings
Symbol
VCC
- VCC
- Ignd
IOUT
- IOUT
IIN
ISTAT
Parameter
VESD
)
s
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ct
t
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l
o
bs
O
2/20
Ptot
Tj
Tstg
u
d
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P
e
- STATUS
- OUTPUT
EMAX
o
s
b
O
-
DC Supply Voltage
Reverse DC Supply Voltage
DC Reverse Ground Pin Current
DC Output Current
Reverse DC Output Current
DC Input Current
DC Status Current
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
c
u
d
OFF STATE OPENLOAD
AND OUTPUT SHORTED TO VCC
DETECTION
- VCC
Maximum Switching Energy
(L=1.3mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC; IL=10A)
Power Dissipation TC=25°C
Junction Operating Temperature
Storage Temperature
)
s
t(
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Value
41
- 0.3
- 200
Internally Limited
-6
+/- 10
+/- 10
Unit
V
V
mA
A
A
mA
mA
4000
V
4000
V
5000
V
5000
V
90
mJ
4.2
Internally Limited
- 55 to 150
W
°C
°C
VN750SM-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
VCC
OUTPUT
OUTPUT
VCC
Connection / Pin Status
Floating
X
To Ground
5
4
8
N.C.
X
X
1
N.C.
STATUS
INPUT
GND
Output
X
Input
X
Through 10KΩ resistor
c
u
d
Figure 4. Current and Voltage Conventions
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P
IS
VF
IIN
e
t
le
VCC
INPUT
so
ISTAT
STATUS
VIN
(s)
VSTAT
IOUT
b
O
-
VCC
OUTPUT
GND
)
s
t(
VOUT
IGND
t
c
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Table 4. Thermal Data
t
e
l
o
Symbol
Rthj-lead
bs
Rthj-amb
Parameter
Thermal Resistance Junction-lead
Thermal Resistance Junction-ambient
Value
Max
Max
Unit
30
93 (1)
°C/W
82(2)
°C/W
O
(1) When mounted on a standard single-sided FR-4 board with 0.5 cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
(2) When mounted on a standard single-sided FR-4 board with 2 cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal mounting and no artificial air flow.
3/20
VN750SM-E
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C unless otherwise specified)
Table 5. Power
Symbol
Parameter
VCC
Min.
Typ.
Max.
Unit
Operating Supply Voltage
5.5
13
36
V
VUSD
Undervoltage Shut-down
3
4
5.5
V
VUSDhyst
Undervoltage Shut-down
Hysteresis
VOV
Overvoltage Shut-down
RON
On State Resistance
IS
Test Conditions
Supply Current
0.5
36
55
mΩ
IOUT=2A; VCC>8V
110
mΩ
25
µA
Off State; VCC=13V; VIN=VOUT=0V
10
Off State; VCC=13V; VIN=VOUT=0V;
Tj=25°C
10
20
On State; VCC=13V; VIN=5V; IOUT=0A
2
3.5
mA
50
µA
Off State Output Current
VIN=VOUT=0V
IL(off2)
Off State Output Current
VIN=0V; VOUT=3.5V
IL(off3)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =125°C
IL(off4)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =25°C
0
Parameter
Test Conditions
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-
td(on)
Turn-on Delay Time
RL=6.5Ω from VIN rising edge to
VOUT=1.3V
td(off)
Turn-off Delay Time
RL=6.5Ω from VIN falling edge to
VOUT=11.7V
dVOUT/
dt(on)
Turn-on Voltage Slope
dVOUT/
dt(off)
Turn-off Voltage Slope
t
e
l
o
uc
Pr
Min.
µA
)
s
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0
µA
od
5
µA
3
µA
Typ.
Max.
Unit
-75
Table 6. Switching (VCC =13V)
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P
e
V
IOUT=2A; Tj=25°C; VCC>8V
IL(off1)
Symbol
V
40
µs
30
µs
RL=6.5Ω from VOUT=1.3V to
VOUT=10.4V
See
relative
diagram
V/µs
RL=6.5Ω from VOUT=11.7V to
VOUT=1.3V
See
relative
diagram
V/µs
c
u
d
(t s)
Table 7. Input Pin
Symbol
bs
VIL
O
Parameter
Low Level Input Current
VIH
Input High Level
IIH
High Level Input Current
VI(hyst)
Input Hysteresis Voltage
4/20
Min.
Typ.
Input Low Level
IIL
VICL
Test Conditions
Input Clamp Voltage
VIN=1.25V
Max.
Unit
1.25
V
1
µA
3.25
V
VIN=3.25V
10
0.5
IIN=1mA
IIN=-1mA
6
µA
V
6.8
-0.7
8
V
V
VN750SM-E
ELECTRICAL CHARACTERISTICS (continued)
Table 8. VCC - Output Diode
Symbol
VF
Parameter
Test Conditions
Forward on Voltage
Min.
Typ.
-IOUT=1.4A; Tj=150°C
Max.
Unit
0.6
V
Max
0.5
10
Unit
V
µA
100
pF
8
V
Table 9. Status Pin
Symbol
VSTAT
ILSTAT
CSTAT
VSCL
Parameter
Test Conditions
Status Low Output Voltage ISTAT=1.6mA
Status Leakage Current
Normal Operation; VSTAT=5V
Status Pin Input
Normal Operation; VSTAT=5V
Capacitance
ISTAT=1mA
Status Clamp Voltage
ISTAT=-1mA
Min
6
Typ
6.8
-0.7
V
Table 10. Protections (see note 1)
Symbol
TTSD
TR
Thyst
tSDL
Parameter
Shut-down Temperature
Reset Temperature
Thermal Hysteresis
Status delay in overload
condition
Ilim
Current limitation
Vdemag
Test Conditions
Min
150
135
7
Tj>TTSD
e
t
le
5.5V<VCC<36V
Turn-off Output Clamp
Voltage
so
IOUT=2A; VIN=0V; L=6mH
Typ
175
6
VCC-41
Unit
°C
°C
°C
20
µs
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Max
200
15
10
VCC-48
12
A
12
A
VCC-55
V
b
O
-
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles.
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Table 11. Openload Detection
Symbol
IOL
tDOL(on)
VOL
Parameter
Openload ON State
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P
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Detection Threshold
Openload ON State
s
b
O
t
e
l
o
tDOL(off)
du
Detection Delay
Openload OFF State
Voltage Detection
Threshold
Openload Detection Delay
at Turn Off
VIN=5V
Test Conditions
Min
Typ
Max
Unit
0.6
0.9
1.2
A
200
µs
3.5
V
1000
µs
IOUT=0A
VIN=0V
1.5
2.5
5/20
VN750SM-E
Figure 5.
OPEN LOAD STATUS TIMING (with external pull-up)
IOUT< IOL
VOUT > VOL
OVERTEMP STATUS TIMING
Tj > Tjsh
VIN
VIN
VSTAT
VSTAT
tDOL(off)
tDOL(on)
tSDL
tSDL
Table 12. Truth Table
CONDITIONS
INPUT
OUTPUT
STATUS
Normal Operation
L
H
L
H
H
H
Current Limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature
L
H
L
L
Undervoltage
L
H
L
L
Overvoltage
L
H
Output Voltage > VOL
L
H
Output Current < IOL
L
H
c
u
d
(t s)
c
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H
L
X
X
so
b
O
-
L
L
H
H
H
H
L
H
L
H
H
L
Figure 6. Switching time Waveforms
o
r
P
e
VOUTn
t
e
l
o
s
b
O
90%
80%
dVOUT/dt(off)
dVOUT/dt(on)
10%
t
VINn
td(on)
td(off)
t
6/20
)
s
t(
VN750SM-E
Table 13. Electrical Transient Requirements On VCC Pin
TEST LEVELS
ISO T/R 7637/1
Test Pulse
I
II
III
IV
1
2
3a
3b
4
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
I
TEST LEVELS RESULTS
II
III
IV
C
C
C
C
C
C
C
C
C
C
C
E
C
C
C
C
C
E
C
C
C
C
C
E
c
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)
s
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CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
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7/20
VN750SM-E
Figure 7. Waveforms
NORMAL OPERATION
INPUT
LOAD VOLTAGE
STATUS
UNDERVOLTAGE
VUSDhyst
VCC
VUSD
INPUT
LOAD VOLTAGE
STATUS
undefined
c
u
d
OVERVOLTAGE
VCC<VOV
VCC>VOV
VCC
INPUT
LOAD VOLTAGE
STATUS
e
t
le
o
s
b
O
-
OPEN LOAD with external pull-up
INPUT
)
s
(
ct
LOAD VOLTAGE
VOUT>VOL
VOL
STATUS
u
d
o
OPEN LOAD without external pull-up
r
P
e
INPUT
LOAD VOLTAGE
t
e
l
o
STATUS
s
b
O
Tj
INPUT
LOAD CURRENT
STATUS
8/20
TTSD
TR
OVERTEMPERATURE
o
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P
)
s
t(
VN750SM-E
Figure 8. Application Schematic
+5V
+5V
VCC
Rprot
STATUS
Dld
µC
Rprot
INPUT
OUTPUT
GND
RGND
VGND
DGND
c
u
d
GND PROTECTION
REVERSE BATTERY
NETWORK
AGAINST
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s
b
O
t
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c
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r
P
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
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Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / (IS(on)max).
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on how many devices are ON in the case of
several high side drivers sharing the same RGND.
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
(t s)
)
s
t(
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
µC I/Os PROTECTION:
If a ground protection network is used and negative
transients are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
9/20
VN750SM-E
VOUT=(VPU/(RL+RPU))RL<VOlmin.
2) no misdetection when load is disconnected: in this
case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU–VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is
pulled high (up to several mA), the pull-up resistor RPU
should be connected to a supply that is switched OFF
when the module is in standby.
The values of VOLmin, VOLmax and IL(off2) are available in
the Electrical Characteristics section.
OPEN LOAD DETECTION IN OFF STATE
Off state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to
supply the microprocessor.
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
Figure 9. Open Load detection in off state
V batt.
VPU
c
u
d
VCC
ro
RPU
P
e
let
DRIVER
+
LOGIC
INPUT
IL(off2)
so
OUT
+
b
O
R
-
STATUS
(s)
t
c
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P
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t
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s
b
O
10/20
VOL
GROUND
RL
)
s
t(
VN750SM-E
Figure 10. Off State Output Current
Figure 11. High Level Input Current
Iih (uA)
IL(off1) (uA)
7
3
2.5
6
Off state
Vcc=36V
Vin=Vout=0V
2
Vin=3.25V
5
1.5
4
1
3
0.5
2
0
1
-0.5
-1
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
Tc (ºC)
Figure 12. Input Clamp Voltage
125
c
u
d
Ilstat (uA)
0.05
8
150
175
Iin=1mA
0.04
7.6
7.4
Vstat=5V
e
t
le
0.03
7.2
7
o
s
b
O
0.02
6.8
6.6
)
s
t(
o
r
P
7.8
0.01
6.4
6.2
6
-50
-25
0
25
50
75
Tc (°C)
o
r
P
e
100
125
c
u
d
(t s)
150
Vstat (V)
0.6
bs
-50
-25
0
25
50
75
100
125
150
175
125
150
175
Tc (°C)
Figure 15. Status Clamp Voltage
Vscl (V)
8
t
e
l
o
0.5
0
175
Figure 13. Status Low Output Voltage
O
100
Figure 14. Status Leakage Current
Vicl (V)
0.4
75
Tc (ºC)
7.8
Istat=1mA
7.6
Istat=1.6mA
7.4
7.2
7
0.3
6.8
0.2
6.6
6.4
0.1
6.2
6
0
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
-50
-25
0
25
50
75
100
Tc (°C)
11/20
VN750SM-E
Figure 16. On State Resistance Vs Tcase
Figure 17. On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
140
120
110
120
Iout=2A
Iout=2A
Vcc=8V; 13V; 36V
100
100
Tc= 150°C
90
80
80
Tc= 125°C
70
60
60
50
40
Tc= 25°C
40
Tc= - 40°C
20
30
20
0
-50
-25
0
25
50
75
100
125
150
5
175
10
15
20
25
30
Figure 18. Openload On State Detection
Threshold
40
)
s
t(
Figure 20. Openload Off State Voltage
Detection Threshold
Iol (A)
c
u
d
Vol (V)
5
1.2
o
r
P
1.15
4.5
Vcc=13V
Vin=5V
1.1
35
Vcc (V)
Tc (ºC)
Vin=0V
1.05
4
e
t
le
1
3.5
0.95
0.9
o
s
b
O
3
0.85
2.5
0.8
0.75
2
0.7
)
s
(
ct
0.65
0.6
-50
-25
0
25
50
75
100
Tc (ºC)
125
150
u
d
o
3
O
0
25
50
75
100
125
150
175
Tc (ºC)
2.8
2.6
2.4
bs
3.2
-25
Vil (V)
t
e
l
o
3.4
-50
Figure 21. Input Low Level
r
P
e
Vih (V)
1
175
Figure 19. Input High Level
3.6
1.5
2.2
2
2.8
1.8
2.6
1.6
2.4
1.4
2.2
1.2
2
1
-50
-25
0
25
50
75
Tc (ºC)
12/20
100
125
150
175
-50
-25
0
25
50
75
Tc (ºC)
100
125
150
175
VN750SM-E
Figure 22. Turn-on Voltage Slope
Figure 25. Turn-off Voltage Slope
dVout/dt/(on) (V/ms)
dVout/dt(off) (V/ms)
1000
500
900
450
Vcc=13V
Rl=6.5Ohm
800
Vcc=13V
Rl=6.5Ohm
400
700
350
600
300
500
250
400
200
300
150
200
100
100
50
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
Tc (ºC)
50
75
100
125
150
175
Tc (ºC)
Figure 23. Overvoltage Shutdown
Figure 26. ILIM Vs Tcase
Vov (V)
Ilim (A)
50
20
48
18
46
16
44
14
42
12
40
10
c
u
d
Vcc=13V
38
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s
b
O
8
36
)
s
t(
6
34
4
32
30
-50
-25
0
25
50
75
Tc (°C)
o
r
P
e
100
125
c
u
d
(t s)
150
175
2
0
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Figure 24. Input Hysteresis Voltage
Vhyst (V)
1.5
t
e
l
o
1.4
1.3
s
b
O
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
13/20
VN750SM-E
Figure 27. SO-8 Maximum turn off current versus load inductance
ILMAX (A)
100
10
A
B
c
u
d
C
1
0.1
e
t
le
1
10
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
)
s
(
ct
Conditions:
VCC=13.5V
t
e
l
o
100
o
s
b
O
-
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of
each demagnetization) of every pulse must not
exceed the temperature specified above for
curves B and C.
u
d
o
r
P
e
VIN, IL
o
r
P
)
s
t(
Demagnetization
Demagnetization
Demagnetization
s
b
O
t
14/20
VN750SM-E
SO-8 Thermal Data
Figure 28. SO-8 PC Board
)
s
t(
Layout condition of Rth and Zth measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.14cm2, 2cm2).
Figure 29. Rthj-amb Vs PCB copper area in open box free air condition
e
t
le
c
u
d
o
r
P
o
s
b
O
-
SO8 at 2 pins connected to TAB
RTHj_amb (ºC/W)
110
)
s
(
ct
105
100
u
d
o
95
r
P
e
90
t
e
l
o
85
O
bs
80
75
70
0
0.5
1
1.5
2
2.5
PCB Cu heatsink area (cm^2)
15/20
VN750SM-E
Figure 30. SO-8 Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
1000
0.5 cm2
100
2 cm2
10
1
c
u
d
0.1
0.01
0.0001
0.001
0.01
Figure 31. Thermal fitting model of a single
channel HSD in SO-8
)
s
(
ct
u
d
o
Tj
C1
C2
R1
R2
s
b
O
t
e
l
o
Pd
16/20
r
P
e
C3
C4
C5
C6
R3
R4
R5
R6
T_amb
e
t
le
0.1
1
Time (s)
10
o
r
P
100
)
s
t(
1000
o
s
b
O
-
Pulse calculation formula
Z THδ = R T H ⋅ δ + Z THtp ( 1 – δ )
where
δ = tp ⁄ T
Table 14. Thermal Parameter
R1
R2
R3
R4
R5
R6
C1
C2
C3
C4
C5
C6
Area/island (cm2)
(°C/W)
(°C/W)
( °C/W)
(°C/W)
(°C/W)
(°C/W)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
0.5
0.05
0.8
3.5
21
16
58
0.006
2.60E-03
0.0075
0.045
0.35
1.05
2
28
2
VN750SM-E
PACKAGE MECHANICAL
Table 15. SO-8 Mechanical Data
millimeters
Symbol
Min
Typ
Max
A
1.75
a1
0.1
0.25
a2
1.65
a3
0.65
0.85
b
0.35
0.48
b1
0.19
0.25
C
0.25
c1
0.5
45 (typ.)
D
4.8
E
5.8
e
5
6.2
1.27
e3
c
u
d
3.81
F
3.8
L
0.4
4
M
S
8 (max.)
L1
e
t
le
0.8
Figure 32. SO-8 Package Dimensions
)
s
(
ct
o
r
P
)
s
t(
1.27
0.6
1.2
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
s
b
O
17/20
VN750SM-E
Figure 33. SO-8 TUBE SHIPMENT (no suffix)
B
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
A
100
2000
532
3.2
6
0.6
All dimensions are in mm.
Figure 34. SO-8 TAPE AND REEL SHIPMENT (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
e
t
le
)
s
(
ct
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
o
r
P
e
t
e
l
o
s
b
O
du
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
All dimensions are in mm.
o
s
b
O
-
2500
2500
330
1.5
13
20.2
12.4
60
18.4
o
r
P
c
u
d
)
s
t(
All dimensions are in mm.
12
4
8
1.5
1.5
5.5
4.5
2
End
Start
Top
No components
Components
No components
cover
tape
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
18/20
500mm min
VN750SM-E
REVISION HISTORY
Table 16. Revision History
Date
Revision
Oct. 2004
1
Description of Changes
- First Issue.
c
u
d
e
t
le
)
s
(
ct
)
s
t(
o
r
P
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
s
b
O
19/20
VN750SM-E
c
u
d
e
t
le
)
s
(
ct
)
s
t(
o
r
P
o
s
b
O
-
u
d
o
r
P
e
t
e
l
o
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
s
b
O
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20/20