STMICROELECTRONICS VND830E

VND830-E
DOUBLE CHANNEL HIGH SIDE DRIVER
Table 1. General Features
Type
VND830-E
Figure 1. Package
RDS(on)
Iout
VCC
60mΩ (*)
6A (*)
36V
)
s
t(
(*) Per each channel
CMOS COMPATIBLE INPUTS
OPEN DRAIN STATUS OUTPUTS
■ ON STATE OPEN LOAD DETECTION
■ OFF STATE OPEN LOAD DETECTION
■ SHORTED LOAD PROTECTION
■ UNDERVOLTAGE AND OVERVOLTAGE
SHUTDOWN
■ LOSS OF GROUND PROTECTION
■ VERY LOW STAND-BY CURRENT
c
u
d
■
■
REVERSE BATTERY PROTECTION (**)
■ IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
■
)
s
(
ct
so
e
t
le
b
O
-
DESCRIPTION
The VND830-E is a monolithic device made by
using
STMicroelectronics
VIPower
M0-3
Technology, intended for driving any kind of load
with one side connected to ground. Active V CC pin
voltage clamp protects the devices against low
energy
spikes
(see
ISO7637
transient
compatibility table).
u
d
o
o
r
P
SO-16L
Active current limitation combined with thermal
shutdown and automatic restart protects the
device against overload. The device detects open
load condition both is on and off state. Output
shorted to VCC is detected in the off state. Device
automatically turns off in case of ground pin
disconnection.
r
P
e
t
e
l
o
s
b
O
Table 2. Order Codes
Package
SO-16L
Tube
VND830-E
Tape and Reel
VND830TR-E
Note: (*) See application schematic at page 9
Rev. 3
February 2005
1/20
VND830-E
Figure 2. Block Diagram
VCC
VCC
CLAMP
OVERVOLTAGE
UNDERVOLTAGE
CLAMP 1
GND
OUTPUT1
INPUT1
DRIVER 1
CLAMP 2
STATUS1
CURRENT LIMITER 1
)
s
t(
DRIVER 2
LOGIC
OVERTEMP. 1
c
u
d
OPENLOAD ON 1
CURRENT LIMITER 2
INPUT2
OPENLOAD OFF 1
OUTPUT2
o
r
P
OPENLOAD ON 2
STATUS2
OPENLOAD OFF 2
e
t
le
OVERTEMP. 2
O
)
Table 3. Absolute Maximum Ratings
Symbol
VCC
s
(
t
c
DC Supply Voltage
Value
Unit
41
V
- VCC
Reverse DC Supply Voltage
- 0.3
V
- IGND
DC Reverse Ground Pin Current
- 200
mA
Internally Limited
A
-6
A
DC Input Current
+/- 10
mA
DC Status Current
+/- 10
mA
4000
V
4000
V
5000
V
5000
V
(L=1.8mH; RL=0Ω; Vbat=13.5V; Tjstart=150ºC;
IL=9A)
102
mJ
Power Dissipation Tlead=25°C
8.3
W
Internally Limited
°C
IOUT
- IOUT
u
d
o
ISTAT
o
s
b
VESD
Pr
DC Output Current
Reverse DC Output Current
e
t
e
l
IIN
O
Parameter
o
s
b
Electrostatic Discharge (Human
R=1.5KΩ; C=100pF)
Body
Model:
- INPUT
- STATUS
- OUTPUT
- VCC
Maximum Switching Energy
EMAX
Ptot
Tj
Junction Operating Temperature
Tc
Case Operating Temperature
- 40 to 150
°C
Storage Temperature
- 55 to 150
°C
Tstg
2/20
VND830-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
1
VCC
VCC
16
N.C.
OUTPUT 1
GND
OUTPUT 1
INPUT 1
OUTPUT 1
STATUS 1
OUTPUT 2
STATUS 2
OUTPUT 2
OUTPUT 2
INPUT 2
8
VCC
Connection / Pin Status
Floating
X
To Ground
VCC
9
N.C.
X
X
Output
X
Input
X
Through 10KΩ resistor
c
u
d
Figure 4. Current and Voltage Conventions
IIN1
ISTAT1
VIN1
b
O
-
VIN2
P
e
ct
STATUS 2
VSTAT2
IS
VF1 (*)
VCC
VCC
IOUT1
VOUT1
INPUT 2
IOUT2
ISTAT2
du
ro
(s)
IIN2
o
r
P
OUTPUT 1
STATUS 1
VSTAT1
e
t
le
so
INPUT 1
)
s
t(
OUTPUT 2
VOUT2
GND
IGND
t
e
l
o
s
b
O
(*) VFn = VCCn - VOUTn during reverse battery condition
Table 4. Thermal Data
Symbol
Rthj-lead
Rthj-amb
Parameter
Thermal resistance junction-lead
Thermal resistance junction-ambient
(MAX)
(MAX)
Value
15
65 (*)
48 (**)
Unit
°C/W
°C/W
Note: (*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
Note: (**) When mounted on a standard single-sided FR-4 board with 6 cm 2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal
mounting and no artificial air flow.
3/20
VND830-E
ELECTRICAL CHARACTERISTICS
(8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified)
(Per each channel)
Table 5. Power Output
Symbol
Parameter
VCC (**)
Test Conditions
Min.
Typ.
Max.
Unit
Operating Supply Voltage
5.5
13
36
V
VUSD (**)
Undervoltage Shut-down
3
4
5.5
V
VOV (**)
Overvoltage Shut-down
36
On State Resistance
RON
IS (**)
Supply Current
V
IOUT =2A; Tj =25 °C
60
IOUT =2A; VCC> 8V
120
mΩ
mΩ
µA
)
s
(
Off State; VCC=13V; VIN=VOUT=0V
12
40
Off State; VCC=13V; VIN=VOUT=0V;
Tj=25°C
12
25
µA
5
7
mA
50
µA
0
µA
t
c
u
d
o
r
On State; VCC=13V; VIN=5V; IOUT=0A
P
e
et
IL(off1)
Off State Output Current
VIN=VOUT=0V
0
IL(off2)
Off State Output Current
VIN=0V; VOUT =3.5V
IL(off3)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =125°C
5
µA
IL(off4)
Off State Output Current
VIN=VOUT=0V; VCC=13V; Tj =25°C
3
µA
-75
l
o
s
Note: (**) Per device.
b
O
-
Table 6. Protection (Per each channel) (See note 1)
Symbol
Parameter
TTSD
Shut-down Temperature
Reset Temperature
Thyst
Thermal Hysteresis
TSDL
Status Delay in Overload
Conditions
Ilim
e
t
e
l
o
s
b
Vdemag
O
o
r
P
Current limitation
Turn-off Output Clamp
Voltage
Test Conditions
ct
du
TR
(s)
Min.
Typ.
Max.
Unit
150
175
200
°C
135
7
°C
15
Tj>TTSD
VCC=13V
6
9
5.5V < VCC < 36V
IOUT =2A; L= 6mH
VCC-41 VCC-48
°C
20
µs
15
A
15
A
VCC-55
V
Note: 1. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles
Table 7. VCC - Output Diode
Symbol
VF
4/20
Parameter
Forward on Voltage
Test Conditions
-IOUT=1.3A; Tj=150°C
Min
Typ
Max
0.6
Unit
V
VND830-E
ELECTRICAL CHARACTERISTICS (continued)
Table 8. Status Pin
Symbol
Parameter
Test Conditions
VSTAT Status Low Output Voltage ISTAT = 1.6 mA
ILSTAT Status Leakage Current
Normal Operation; VSTAT= 5V
Status Pin Input
Normal Operation; VSTAT= 5V
CSTAT
Capacitance
ISTAT = 1mA
VSCL
Status Clamp Voltage
ISTAT = - 1mA
Min
6
Typ
Max
0.5
10
Unit
V
µA
100
pF
8
V
6.8
-0.7
V
Table 9. Switching (V CC=13V)
Symbol
Parameter
td(on)
Turn-on Delay Time
td(off)
Turn-off Delay Time
Test Conditions
RL=6.5Ω from VIN rising edge to
VOUT =1.3V
RL=6.5Ω from VIN falling edge to
VOUT =11.7V
dV/dt(on)
Turn-on Voltage Slope
RL=6.5Ω from VOUT=1.3V to
VOUT =10.4V
dV/dt(off)
Turn-off Voltage Slope
RL=6.5Ω from VOUT=11.7V to
VOUT =1.3V
IOL
tDOL(on)
VOL
Parameter
Openload ON State
O
)
Detection Threshold
Openload ON State
o
s
b
s
(
t
c
du
Detection Delay
Openload OFF State
Voltage Detection
Threshold
Openload Detection
Delay at Turn Off
e
t
e
l
tDOL(off)
Test Conditions
o
r
P
VIN=5V
Typ
od
30
Pr
Unit
µs
µs
See
relative
diagram
See
relative
diagram
V/µs
V/µs
Min
Typ
Max
Unit
50
100
200
mA
200
µs
3.5
V
1000
µs
Max
1.25
Unit
V
µA
V
10
µA
IOUT=0A
VIN=0V
)
s
t(
Max
uc
30
o
s
b
Table 10. Openload Detection
Symbol
e
t
le
Min
1.5
2.5
Table 11. Logic Input
O
Symbol
VIL
IIL
VIH
IIH
Vhyst
VICL
Parameter
Test Conditions
Input Low Level
Low Level Input Current VIN = 1.25V
Input High Level
High Level Input CurVIN = 3.25V
rent
Input Hysteresis Voltage
IIN = 1mA
Input Clamp Voltage
IIN = -1mA
Min
Typ
1
3.25
0.5
6
V
6.8
-0.7
8
V
V
5/20
VND830-E
Table 12. Truth Table
CONDITIONS
INPUT
OUTPUT
SENSE
Normal Operation
L
H
L
H
H
H
Current Limitation
L
H
H
L
X
X
H
(Tj < TTSD) H
(Tj > TTSD) L
Overtemperature
L
H
L
L
H
L
Undervoltage
L
H
L
L
X
X
Overvoltage
L
H
L
L
H
H
Output Voltage > VOL
L
H
H
H
Output Current < IOL
L
H
L
H
)
s
t(
c
u
d
e
t
le
Figure 5. Switching time Waveforms
o
r
P
L
H
H
L
o
s
b
O
)
s
(
t
c
VOUTn
du
e
t
e
ol
o
r
P
80%
90%
dVOUT/dt(off)
dVOUT/dt(on)
s
b
O
VINn
10%
t
td(on)
td(off)
t
6/20
VND830-E
Table 13. Electrical Transient Requirements On V CC Pin
ISO T/R 7637/1
Test Pulse
I
II
TEST LEVELS
III
IV
1
2
3a
3b
4
5
-25 V
+25 V
-25 V
+25 V
-4 V
+26.5 V
-50 V
+50 V
-50 V
+50 V
-5 V
+46.5 V
-75 V
+75 V
-100 V
+75 V
-6 V
+66.5 V
-100 V
+100 V
-150 V
+100 V
-7 V
+86.5 V
ISO T/R 7637/1
Test Pulse
1
2
3a
3b
4
5
CLASS
C
E
TEST LEVELS RESULTS
II
III
C
C
C
C
C
C
C
C
C
C
E
E
I
C
C
C
C
C
C
e
t
le
Delays and
Impedance
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
)
s
t(
o
r
P
c
u
d
IV
C
C
C
C
C
E
CONTENTS
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure and cannot be
returned to proper operation without replacing the device.
o
s
b
O
)
s
(
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
7/20
VND830-E
Figure 6. Waveforms
NORMAL OPERATION
INPUTn
OUTPUT VOLTAGEn
STATUSn
)
s
t(
UNDERVOLTAGE
VUSDhyst
VCC
c
u
d
VUSD
INPUTn
OUTPUT VOLTAGEn
STATUSn
undefined
e
t
le
OVERVOLTAGE
o
s
b
VCC<VOV
VCC
O
)
INPUTn
OUTPUT VOLTAGEn
STATUSn
INPUTn
s
(
t
c
u
d
o
OPEN LOAD with external pull-up
Pr
OUTPUT VOLTAGEn
STATUSn
e
t
e
ol
bs
O
VOUT >VOL
VOL
OPEN LOAD without external pull-up
INPUTn
OUTPUT VOLTAGEn
STATUSn
OVERTEMPERATURE
Tj
TTSD
TR
INPUTn
OUTPUT CURRENTn
STATUSn
8/20
o
r
P
VND830-E
Figure 7. Application Schematic
+5V +5V
+5V
VCC
Rprot
STATUS1
Dld
µC
Rprot
)
s
t(
INPUT1
OUTPUT1
Rprot
STATUS2
Rprot
INPUT2
c
u
d
e
t
le
so
GND
)
s
(
ct
r
P
e
u
d
o
GND PROTECTION
REVERSE BATTERY
t
e
l
o
NETWORK
b
O
-
RGND
VGND
AGAINST
Solution 1: Resistor in the ground line (RGND only). This
can be used with any type of load.
The following is an indication on how to dimension the
RGND resistor.
1) RGND ≤ 600mV / IS(on)max.
2) RGND ≥ (−VCC) / (-IGND)
where -IGND is the DC reverse ground pin current and can
be found in the absolute maximum rating section of the of
the device’s datasheet.
Power Dissipation in RGND (when VCC<0: during reverse
battery situations) is:
PD= (-VCC)2/RGND
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
calculated with formula (1) where IS(on)max becomes the
sum of the maximum on-state currents of the different
devices.
Please note that if the microprocessor ground is not
common with the device ground then the RGND will
produce a shift (IS(on)max * RGND) in the input thresholds
and the status output values. This shift will vary
depending on many devices are ON in the case of several
high side drivers sharing the same RGND.
s
b
O
o
r
P
OUTPUT2
DGND
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggest to utilize Solution 2 (see
below).
Solution 2: A diode (DGND) in the ground line.
A resistor (RGND=1kΩ) should be inserted in parallel to
DGND if the device will be driving an inductive load.
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift (j600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT and STATUS lines are also
required to prevent that, during battery voltage transient,
the current exceeds the Absolute Maximum Rating.
Safest configuration for unused INPUT and STATUS pin
is to leave them unconnected.
LOAD DUMP PROTECTION
Dld is necessary (Voltage Transient Suppressor) if the
load dump peak voltage exceeds VCC max DC rating.
The same applies if the device will be subject to
transients on the VCC line that are greater than the ones
shown in the ISO T/R 7637/1 table.
9/20
VND830-E
.µC I/Os PROTECTION:
If a ground protection network is used and negative
transient are present on the VCC line, the control pins will
be pulled negative. ST suggests to insert a resistor (Rprot)
in line to prevent the µC I/Os pins to latch-up.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
-VCCpeak/Ilatchup ≤ Rprot ≤ (VOHµC-VIH-VGND) / IIHmax
Calculation example:
For VCCpeak= - 100V and Ilatchup ≥ 20mA; VOHµC ≥ 4.5V
5kΩ ≤ Rprot ≤ 65kΩ.
Recommended Rprot value is 10kΩ.
supply the microprocessor.
The external resistor has to be selected according to the
following requirements:
1) no false open load indication when load is connected:
in this case we have to avoid VOUT to be higher than
VOlmin; this results in the following condition
VOUT=(VPU/(RL+RPU))RL<VOlmin.
2) no misdetection when load is disconnected: in this
case the VOUT has to be higher than VOLmax; this
results in the following condition RPU<(VPU–VOLmax)/
IL(off2).
Because Is(OFF) may significantly increase if Vout is
pulled high (up to several mA), the pull-up resistor RPU
should be connected to a supply that is switched OFF
when the module is in standby.
The values of VOLmin, VOLmax and IL(off2) are available in
the Electrical Characteristics section.
)
s
t(
OPEN LOAD DETECTION IN OFF STATE
c
u
d
Off state open load detection requires an external pull-up
resistor (RPU) connected between OUTPUT pin and a
positive supply voltage (VPU) like the +5V line used to
e
t
le
Figure 8. Open Load detection in off state
o
r
P
o
s
b
V batt.
VPU
O
)
VCC
s
(
t
c
e
t
e
l
o
s
b
O
u
d
o
Pr
INPUT
STATUS
RPU
DRIVER
+
LOGIC
IL(off2)
OUT
+
R
VOL
GROUND
10/20
RL
VND830-E
Figure 12. High Level Input Current
Figure 9. Off State Output Current
IL(off1) (uA)
Iih (uA)
2.5
5
2.25
4.5
Off state
Vcc=36V
Vin=Vout=0V
2
1.75
Vin=3.25V
4
3.5
1.5
3
1.25
2.5
1
2
0.75
1.5
0.5
1
0.25
0.5
0
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
Tc (°C)
d
o
r
Vicl (V)
125
150
175
125
150
175
125
150
175
P
e
et
Ilstat (uA)
8
0.05
l
o
s
7.8
Iin=1mA
7.6
7.4
7.2
)
(s
7
6.8
t
c
u
6.6
6.4
d
o
r
6.2
6
P
e
-25
0
25
t
e
l
o
50
75
Ob
0.04
Vstat=5V
0.03
0.02
0.01
0
100
125
150
175
-50
-25
0
25
Tc (°C)
50
75
100
Tc (°C)
Figure 11. Status Low Output Voltage
Figure 14. Status Clamp Voltage
bs
Vstat (V)
O
100
Figure 13. Status Leakage Current
Figure 10. Input Clamp Voltage
-50
uc
75
Tc (°C)
)
s
t(
Vscl (V)
0.8
8
7.8
0.7
Istat=1mA
Istat=1.6mA
7.6
0.6
7.4
0.5
7.2
0.4
7
6.8
0.3
6.6
0.2
6.4
0.1
6.2
0
6
-50
-25
0
25
50
75
Tc (°C)
100
125
150
175
-50
-25
0
25
50
75
100
Tc (°C)
11/20
VND830-E
Figure 15. Overvoltage Shutdown
Figure 18. ILIM Vs Tcase
Vov (V)
Ilim (A)
50
20
48
18
46
16
44
14
42
12
40
10
38
8
36
6
34
4
32
2
30
0
Vcc=13V
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
Tc (°C)
dVout/dt(off) (V/ms)
600
l
o
s
550
Vcc=13V
Rl=6.5Ohm
500
)
s
(
ct
300
u
d
o
200
100
0
-50
-25
0
e
t
e
ol
Pr
25
50
75
100
150
b
O
-
500
175
400
350
300
250
-50
-25
0
25
Tc (ºC)
50
75
100
125
Tc (ºC)
Figure 20. On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
160
120
Tc=150°C
110
Iout=2A
Vcc=8V; 13V & 36V
120
150
Vcc=13V
Rl=6.5Ohm
450
175
bs
140
175
200
125
Figure 17. On State Resistance Vs Tcase
O
150
P
e
et
dVout/dt(on) (V/ms)
400
125
Figure 19. Turn-off Voltage Slope
800
600
100
d
o
r
Figure 16. Turn-on Voltage Slope
700
uc
75
Tc (°C)
)
s
t(
100
90
80
100
70
60
80
Tc=25°C
50
60
40
Tc= - 40°C
30
40
20
Iout=5A
20
10
0
0
-50
-25
0
25
50
75
Tc (°C)
12/20
100
125
150
175
5
10
15
20
25
Vcc (V)
30
35
40
VND830-E
Figure 21. Input High Level
Figure 24. Input Low Level
Vih (V)
Vil (V)
3.6
2.6
3.4
2.4
3.2
2.2
3
2
2.8
1.8
2.6
1.6
2.4
1.4
2.2
1.2
2
1
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
Tc (°C)
l
o
s
5
150
4.5
140
Vcc=13V
Vin=5V
)-
120
s
(
t
c
r
P
e
80
70
-50
-25
0
t
e
l
o
25
50
75
100
175
Ob
Vin=0V
4
3.5
3
2.5
2
1.5
u
d
o
90
150
P
e
et
Vol (V)
100
125
Figure 25. Openload Off State Detection
Threshold
Iol (mA)
110
100
d
o
r
Figure 22. Openload On State Detection
Threshold
130
uc
75
Tc (°C)
)
s
t(
1
0.5
0
125
150
-50
175
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 23. Input Hysteresis Voltage
s
b
O
Vhyst (V)
1.5
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
13/20
VND830-E
Figure 26. SO-16L Maximum turn off current versus load inductance
ILMAX (A)
100
)
s
t(
10
c
u
d
A
e
t
le
1
0.1
1
)
s
(
ct
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at T Jstart=100ºC
C= Repetitive Pulse at T Jstart=125ºC
u
d
o
r
P
e
t
e
l
o
Conditions:
VCC=13.5V
o
s
b
- OL(mH)
o
r
P
B
C
10
100
Values are generated with R L=0Ω
In case of repetitive pulses, Tjstart (at beginning of
each demagnetization) of every pulse must not
exceed the temperature specified above for
curves B and C.
s
b
O
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
14/20
VND830-E
SO-16L Thermal Data
Figure 27. SO-16L PC Board
)
s
t(
c
u
d
Layout condition of Rth and Zth measurements (PCB FR4 area= 41mm x 48mm, PCB thickness=2mm,
Cu thickness=35µm, Copper areas: 0.5cm2, 6cm2).
e
t
le
o
r
P
Figure 28. Rthj-amb Vs PCB copper area in open box free air condition
o
s
b
70
O
)
s
(
t
c
RTH j-amb (°C/W)
u
d
o
65
r
P
e
60
t
e
l
o
55
s
b
O
50
45
40
0
1
2
3
4
5
6
7
PCB Cu heatsink area (cm^2)
15/20
VND830-E
Figure 29. SO-16L Thermal Impedance Junction Ambient Single Pulse
ZT H (°C/W)
1000
100
Footprint
6 cm2
10
)
s
t(
c
u
d
1
e
t
le
0.1
o
s
b
0.01
0.0001
0.001
0.01
-O
0.1
1
T ime (s)
)
s
(
ct
u
d
o
Figure 30. Thermal fitting model of a double
channel HSD in SO-16L
e
t
e
ol
bs
Tj_1
O
Pr
C2
C3
C4
C5
C6
R1
R2
R3
R4
R5
R6
C2
R1
R2
Pd2
T_amb
16/20
100
1000
Z THδ = R TH ⋅ δ + Z THtp ( 1 – δ )
δ = tp ⁄ T
Table 14. Thermal Parameter
C1
C1
10
Pulse calculation formula
where
Pd1
Tj_2
o
r
P
R1
R2
R3
R4
R5
R6
C1
C2
C3
C4
C5
C6
Area/island (cm2)
(°C/W)
(°C/W)
( °C/W)
(°C/W)
(°C/W)
(°C/W)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
(W.s/°C)
Footprint
0.05
0.3
2.2
12
15
37
0.001
5.00E-03
0.02
0.3
1
3
6
22
5
VND830-E
PACKAGE MECHANICAL
Table 15. SO-16L Mechanical Data
millimeters
Symbol
Min
A
a1
a2
b
b1
C
c1
D
E
e
e3
F
L
M
S
Typ
Max
2.65
0.2
2.45
0.49
0.32
0.1
0.35
0.23
0.5
45° (typ.)
)
s
t(
10.1
10.0
10.5
10.65
1.27
8.89
7.4
0.5
8° (max.)
e
t
le
Figure 31. SO-16L Package Dimensions
o
r
P
c
u
d
7.6
1.27
0.75
o
s
b
O
)
s
(
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
17/20
VND830-E
Figure 32. SO-16L Tube Shipment (No Suffix)
Base Q.ty
Bulk Q.ty
Tube length (± 0.5)
A
B
C (± 0.1)
C
B
50
1000
532
3.5
13.8
0.6
All dimensions are in mm.
A
)
s
t(
c
u
d
Figure 33. Tape And Reel Shipment (Suffix “TR”)
o
r
P
REEL DIMENSIONS
e
t
le
so
)
s
(
ct
b
O
-
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
u
d
o
1000
1000
330
1.5
13
20.2
16.4
60
22.4
r
P
e
TAPE DIMENSIONS
t
e
l
o
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb 1986
s
b
O
Tape width
Tape Hole Spacing
Component Spacing
Hole Diameter
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
W
P0 (± 0.1)
P
D (± 0.1/-0)
D1 (min)
F (± 0.05)
K (max)
P1 (± 0.1)
16
4
12
1.5
1.5
7.5
6.5
2
End
All dimensions are in mm.
Start
Top
cover
tape
No components
Components
500mm min
Empty components pockets
saled with cover tape.
User direction of feed
18/20
No components
500mm min
VND830-E
REVISION HISTORY
Date
Nov. 2004
Feb. 2005
Revision
Description of Changes
2
- RDS(on) value correction: 60mΩ instead of 35mΩ.
3
- Iol curve changed.
)
s
t(
c
u
d
e
t
le
o
r
P
o
s
b
O
)
s
(
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
19/20
VND830-E
)
s
t(
c
u
d
e
t
le
o
r
P
o
s
b
O
)
s
(
t
c
u
d
o
r
P
e
t
e
l
o
s
b
O
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2005 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
20/20