TI PTV05010WAH

PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
8-A, 5-V INPUT NONISOLATED WIDE-OUTPUT ADJUST SIP MODULE
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
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Up to 8-A Output Current
5-V Input Bus
Wide-Output Voltage Adjust
(0.8 V to 3.6 V)
Efficiencies up to 95%
On/Off Inhibit
Prebias Start-Up
Undervoltage Lockout
Auto-Track™ Sequencing
Output Overcurrent Protection (Nonlatching,
Auto-Reset)
Operating Temperature: –40°C to 85°C
Safety Agency Approvals: UL/cUL 60950,
EN60950 VDE (Pending)
POLA™ Compatible
Multivoltage Digital Systems
High-Density Logic Circuits
High-End Computers and Servers
5-V Intermediate Bus Architectures
DESCRIPTION
The PTV05010W is a ready-to-use nonisolated power module, and part of a new class of complete dc/dc
switching regulators from Texas Instruments. These regulators combine high performance with double-sided,
surface-mount construction, to give designers the flexibility to power the most complex multiprocessor digital
systems using off-the-shelf catalog parts.
The PTV05010W series is produced in a 8-pin, single in-line pin (SIP) package. The SIP footprint minimizes
board space, and offers an alternate package option for space conscious applications. Operating from a 5-V
input bus, the series provides step-down conversion to a wide range of output voltages, at up to 8 A of output
current. The output voltage can be set to any value over the range, 0.8 V to 3.6 V, using a single external
resistor.
This series includes Auto-Track™. Auto-Track™ simplifies the task of supply-voltage sequencing in a power
system by enabling the output voltage of multiple modules to accurately track each other, or any external voltage,
during power up and power down.
Other operating features include an on/off inhibit, and the ability to start up into an existing output voltage or
prebias. A nonlatching overcurrent trip protects against load faults.
Target applications include complex multivoltage, multiprocessor systems that incorporate the industry's
high-speed microprocessors, bus drivers, and the TMS320™ DSP family.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
POLA, Auto-Track, TMS320 are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
These devices have limited built-in ESD protection. The leads should be shorted together or the device
placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.
STANDARD APPLICATION
Track
5
Track
VI
8
Inhibit
GND GND
6
7
C1*
100 mF
(Required)
VO
2, 3
7
VO
PTV05010
VI
VO Adj
1
4
C2*
10 mF
Ceramic
(Required)
C3*
100 mF
(Optional)
RSET#
1%
0.05 W
(Required)
Inhibit
GND
C4*
10 mF
Ceramic
(Optional)
L
O
A
D
GND
* See the Application Information for capacitor recommendations
# RSET is required to adjust the output voltage higher than its lowest value. See the Application Information section for values.
ORDERING INFORMATION
PTV05010 (Basic Model)
(1)
Output Voltage
Part Number
DESCRIPTION
Package (1)
0.8 V – 3.6 V (Adjustable)
PTV05010WAH
Vertical T/H
EVA
See the applicable package drawing for dimensions and PC board layout.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range unless otherwise noted (1)
UNIT
V(Track)
Track input voltage
–0.3 V to VI +0.3 V
TA
Operating temperature range
Over VI range
Lead temperature
5 seconds
–40°C to 85°C
260°C
(2)
Tstg
Storage temperature
–40°C to 125°C
V(INH)
Inhibit input voltage
–0.3 V to 7 V
(1)
(2)
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
This product is not compatible with surface-mount reflow solder processes.
PACKAGE SPECIFICATIONS
PTV05010W (Suffix AH)
Weight
2.5 grams
Flammability
Meets UL 94 V-O
Mechanical shock
Per Mil-STD-883D, Method 2002.3, 1 ms, 1/2 sine, mounted
500 Gs
Mechanical vibration
Mil-STD-883D, Method 2007.2, 20 Hz - 2000 Hz
10 Gs
(1)
2
Qualification limit.
(1)
(1)
PTV05010W
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SLTS242 – FEBRUARY 2005
ELECTRICAL CHARACTERISTICS
operating at 25°C free-air temperature, VI = 5 V, VO = 3.3 V, C1 = 100 µF, C2 = 10 µF, C3 = 0 µF, C4 = 0 µF, and I O = IO max
(unless otherwise noted)
PARAMETER
TEST CONDITIONS
IO
Output current
Natural convection airflow
VI
Input voltage range
Over IO load range
MIN
TYP
0
η
4.5
IO (trip)
A
5.5
V
±2%
–40°C < TA < 85°C
Line regulation
Over VI range
±5
Load regulation
Over IO range
±5
Total output variation
Includes set-point, line, load, –40°C ≤ TA≤ 85°C
Adjust range
Over VI range
IO = IO max
(2)
±0.5%
Temperature variation
Efficiency
UNIT
(1)
8
Set-point voltage tolerance
VO
MAX
mV
mV
±3
0.8
(2)
3.6
RSET = 698 Ω, VO = 3.3 V
95%
RSET = 2.21 kΩ, VO = 2.5 V
93%
RSET = 5.49 kΩ, VO = 1.8 V
90%
RSET = 8.87 kΩ, VO = 1.5 V
89%
RSET = 17.4 kΩ, VO = 1.2 V
87%
RSET = 36.5 kΩ, VO = 1 V
85%
%Vo
V
Output voltage ripple (pk-pk)
20-MHz bandwidth
15
mVPP
Overcurrent threshold
Reset, followed by auto-recovery
12
A
1-A/µs load step, 50 to 100% IO max, C3 = 100 µF
Transient response
Track control (pin 9)
UVLO
Undervoltage lockout
70
µs
100
mV
IIL Input low current
Pin to GND
Control slew-rate limit
C3 ≤ C3 (max)
–0.13
1
VI increasing
4.3
VI decreasing
VIH Input high voltage
Inhibit control (pin 12)
Recovery time
Vo over/undershoot
VIL Input low voltage
IIL Input low current
3.1
VI – 0.5
Referenced to GND
Open
–0.2
Pin to GND
–0.24
Input standby current
Inhibit (pin 7) to GND, Track (pin 5) open
5
ƒS
Switching frequency
Over VI and IO ranges
External output capacitance (C3)
550
Nonceramic (C1)
Ceramic (C2)
Capacitance value
(1)
(2)
(3)
(4)
(5)
(6)
(7)
Reliability
(4)
10
(4)
Nonceramic
0
Ceramic
0
Equivalent series resistance (nonceramic)
MTBF
100
Per Telcordia SR-332, 50% stress, TA = 40°C, ground
benign
4
600
V
(3)
0.6
II (stby)
External input capacitance
4.5
3.7
mA
V/ms
V
mA
mA
650
kHz
µF
100
(5)
3300
(6)
300
(7)
µF
mΩ
5
106 Hr
See thermal derating curves for safe operating area (SOA), or consult factory for appropriate derating.
The set-point voltage tolerance is affected by the tolerance and stability of RSET. The stated limit is unconditionally met if RSET has a
tolerance of 1%, with 100 ppm/°C or better temperature stability.
This control pin is internally pulled up to the input voltage, VI. If this input is left open circuit, the module will operate when input power is
applied. A small low-leakage (< 100 nA) MOSFET is recommended for control. For further information, see the related application note.
A 10-µF high-frequency ceramic capacitor and 100-µF electrolytic input capacitor are required for proper operation. The electrolytic
capacitor must be rated for 300 mArms minimum ripple current. See the Application Information for further guidance on capacitor
selection.
An external output capacitor is not required for basic operation. Adding 100 µF of distributed capacitance at the load improves the
transient response.
This is the calculated maximum. The minimum ESR limitation often results in a lower value. See the Application Information for further
guidance.
This is the typical ESR for all the electrolytic (nonceramic) output capacitance. Use 7 mΩ as the minimum when using maximum-ESR
values to calculate.
3
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
TYPICAL CHARACTERISTICS (5-V INPUT) (8) (9)
EFFICIENCY
vs
OUTPUT CURRENT
OUTPUT VOLTAGE RIPPLE
vs
OUTPUT CURRENT
100
50
VO- Output Ripple Voltage - mVPP
VO = 3.3 V
Efficiency - %
90
80
VO = 2.5 V
VO = 1.8 V
70
VO = 0.8 V
VO = 1.2 V
60
50
2
1
3
4
5
6
7
10
VO = 0.8 V
0
1
2
3
4
5
6
7
IO - Output Current - A
Figure 1.
Figure 2.
POWER DISSIPATION
vs
OUTPUT CURRENT
TEMPERATURE DERATING
vs
OUTPUT CURRENT
8
90
80
Air Temperature - oC
PD - Power Dissipation - W
VO = 3.3 V
IO - Output Current - A
2
1.5
1
VO = 3.3 V
400 LFM
70
200 LFM
100 LFM
60
Nat Conv
50
40
0.5
0
Air Flow
30
0
1
2
3
4
5
6
IO - Output Current - A
Figure 3.
4
20
8
VO = 0.8 V
(9)
30
0
0
2.5
(8)
40
7
8
20
1
2
3
4
5
6
7
8
IO - Output Current - A
Figure 4.
The electrical characteristic data has been developed from actual products tested at 25°C. This data is considered typical for the
converter. Applies to Figure 1, Figure 2, and Figure 3.
The temperature derating curves represent the conditions at which internal components are at or below the manufacturer's maximum
operating temperatures. The airflow direction is parallel to the long axis of the module. Derating limits apply to modules soldered directly
to a 100 mm x 100 mm, double-sided PCB with 2 oz. copper. Applies to Figure 4.
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
DEVICE INFORMATION
TERMINAL FUNCTIONS
TERMINAL
NAME
DESCRIPTION
NO.
VI
8
VO
2, 3
The regulated positive power output with respect to the GND node.
GND
1, 6
This is the common ground connection for the VI and VO power connections. It is also the 0-Vdc reference for the
control inputs. Both pins must be connected to common ground.
Inhibit
7
The Inhibit pin is an open-collector/drain, active-low input that is referenced to GND. Applying a low-level ground
signal to this input disables the module's output and turns off the output voltage. When the Inhibit control is active,
the input current drawn by the regulator is significantly reduced. If the inhibit feature is not used, the control pin
should be left open-circuit. The module then produces an output voltage whenever a valid input source is applied.
Vo Adjust
4
The positive input voltage power node to the module, which is referenced to common GND.
A 1% or 0.5% resistor must be connected directly between this pin and GND (pin 1 is recommended) to set the
output voltage of the module higher than its lowest value. The temperature stability of the resistor should be 100
ppm/°C (or better). The set-point range is 0.8 V to 3.6 V. The resistor value can be calculated using a formula. If
this input is left open-circuit, the output voltage defaults to its lowest value. For further information, consult the
related application note.
The specification table gives the standard resistor values for a number of common output voltages.
Track
5
This is an analog control input that enables the output voltage to follow an external voltage. This pin becomes
active typically 20 ms after the input voltage has been applied, and allows direct control of the output voltage from
0 V up to the nominal set-point voltage. Within this range, the output follows the voltage at the Track pin on a
volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its set-point
voltage. The feature allows the output voltage to rise simultaneously with other modules powered from the same
input bus. If unused, this input should be connected to VI.
NOTE: Due to the undervoltage lockout feature, the output of the module cannot follow its own input voltage
during power up. Consult the related Application Information for further guidance.
Front View of Module
PIN 1
Figure 5. Pin Terminal Locations
5
PTV05010W
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SLTS242 – FEBRUARY 2005
APPLICATION INFORMATION
Capacitor Recommendations for the PTV05010W Power Module
Input Capacitors
The required input capacitors are a 10-µF ceramic and a minimum of 100-µF electrolytic type. The 100-µF
capacitance must be rated for 300 mArms ripple current capability. See Table 1.
The above ripple current requirements are conditional that the 10-µF ceramic capacitor is present. The 10-µF
X5R/X7R ceramic capacitor is necessary to reduce both the magnitude of ripple current through the electroytic
capacitor and the amount of ripple current reflected back to the input source. Ceramic capacitors should be
located within 0.5 inch. (1,3 cm) of the module's input pins. Additional ceramic capacitors can be added to reduce
the RMS ripple current requirement for the electrolytic capacitor.
Ripple current (Arms) rating, less than 150-mΩ equivalent series resistance (ESR), and temperature are the
major considerations when selecting input capacitors. Unlike polymer-tantalum capacitors, regular tantalum
capacitors have a recommended minimum voltage rating of 2 × (max. dc voltage + ac ripple). This is standard
practice to ensure reliability. Only a few tantalum capacitors were found to have sufficient voltage rating to meet
this requirement. At temperatures below 0°C, the ESR of aluminum electrolytic capacitors increases. For these
applications, Os-Con, polymer-tantalum, and polymer-aluminum types should be considered.
Output Capacitor (Optional)
For applications with load transients (sudden changes in load current), regulator response benefits from external
output capacitance. The recommended output capacitance of 100 µF allows the module to meet its transient
response specification. For most applications, a high-quality computer-grade aluminum electrolytic capacitor is
adequate. These capacitors provide decoupling over the frequency range, 2 kHz to 150 kHz, and are suitable
when ambient temperatures are above 0°C. For operation below 0°C, tantalum-, ceramic-, or Os-Con-type
capacitors are recommended. When using one or more nonceramic capacitors, the calculated equivalent ESR
should be no lower than 4 mΩ (7 mΩ using the manufacturer's maximum ESR for a single capacitor). A list of
preferred low-ESR-type capacitors are identified in Table 1.
Ceramic Capacitors
Above 150 kHz, the performance of aluminum electrolytic capacitors is less effective. Multilayer ceramic
capacitors have low ESR and a resonant frequency higher than the bandwidth of the regulator. They can be
used to reduce the reflected ripple current at the input as well as improve the transient response of the output.
When used on the output, their combined ESR is not critical as long as the total value of ceramic capacitance
does not exceed approximately 300 µF. Also, to prevent the formation of local resonances, do not place more
than five identical ceramic capacitors in parallel with values of 10 µF or greater.
Tantalum Capacitors
Tantalum-type capacitors can only be used on the output bus, and are recommended for applications where the
ambient operating temperature can be less than 0°C. The AVX TPS, Sprague 593D/594/595 and Kemet
T495/T510 capacitor series are suggested over many other tantalum types due to their higher rated surge, power
dissipation, and ripple current capability. As a caution, many general-purpose tantalum capacitors have
considerably higher ESR, reduced power dissipation, and lower ripple current capability. These capacitors are
also less reliable as they have reduced power dissipation and surge current ratings. Tantalum capacitors that
have no stated ESR or surge current rating are not recommended for power applications.
When specifying Os-con and polymer tantalum capacitors for the output, the minimum ESR limit is encountered
before the maximum capacitance value is reached.
Capacitor Table
Table 1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple
current (rms) ratings. The recommended number of capacitors required at both the input and output buses is
identified for each capacitor type.
6
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
APPLICATION INFORMATION (continued)
Note: This is not an extensive capacitor list. Capacitors from other vendors are available with comparable
specifications. Those listed are for guidance. The RMS ripple current rating and ESR (at 100 kHz) are critical
parameters necessary to ensure both optimum regulator performance and long capacitor life.
Designing for Fast Load Transients
The transient response of the dc/dc converter has been characterized using a load transient with a di/dt of
1 A/µs. The typical voltage deviation for this load transient is given in the data sheet specification table using the
optional value of output capacitance. As the di/dt of a transient is increased, the response of a converter
regulation circuit ultimately depends on its output capacitor decoupling network. This is an inherent limitation with
any dc/dc converter once the speed of the transient exceeds its bandwidth capability. If the target application
specifies a higher di/dt or lower voltage deviation, the requirement can only be met with additional output
capacitor decoupling. In these cases, special attention must be paid to the type, value, and ESR of the
capacitors selected.
If the transient performance requirements exceed that specified in the data sheet, or the total amount of load
capacitance is above 3000 µF, the selection of output capacitors becomes more important.
Table 1. Input/Output Capacitors
Capacitor Characteristics
Working
Voltage
(V)
Value
(µF)
Max ESR
at 100
kHz
(Ω)
Panasonic, Aluminum
10
330
WA(SMD)
6.3
150
FK (SMD)
6.3
PSA,Poly- Aluminum
(Radial)
Quantity
Max Ripple
Current at
85°C (Irms)
(mA)
Physical Size
(mm)
Input
Bus
Optional
Output
Bus
0.117
555
8 × 11.5
1
1
EEUFC1A331
0.035
3050
8 × 6.9
1
1
EEFWA0J151P
470
0.16
600
8 × 10.2
1
1
EEVFK0J471P
6.3
220
0.02
3160
6.3 × 9.8
1
≤3
LXZ, Aluminum (Radial)
10
470
0.12
555
8 × 125
1
1
LXZ10VB471M8X12LL
MVZ, Auminum-(SMD)
16
680
0.09
670
10 × 10
1
1
MVZ16VC681MJ10TP
PXA, Poly-Aluminum
(SMD)
10
120
0.027
2800
8 × 6,7
1
≤3
PXA10VC121MH70TP
Nichicon, Aluminum
16
270
0.09
575
10 × 12,5
1
1
UPM1C271MHH6
HD (Radial)
10
470
0.072
760
8 × 11,5
1
1
UHD1A471MPR
TP, Poscap
10
220
0.025
2400
7.3 L × 4.3 W
≤2
10TPE220M
SP, Os-Con
6.3
120
0.035
>1900
6,3 × 6,8
1
≤3
6SP120M
SVP, Os-Con (SMD)
6.3
100
0.04
1810
6.3 × 6,0
1
≤3
6SVP100M
AVX, Tantalum, Series
III
10
100
0.075
>1090
N/R
≤4
TPSC107M010R0075
TPS (SMD)
10
150
0.05
>1559
N/R
≤4
TPSD157M010R0050
T520, Poly-Tant
10
100
0.055
1500
≤4
T520D107M010ASE055
10
330
0.01
>3800
4.3 W × 7.3 L ×
4H
1
T530, Poly-Tant/Organic
1
≤1
T530X337M010ASE010
Vishay-Sprague
94SVP,(Oscon) (SMD)
10
120
0.04
2120
8 ×7
1
≤3
94SVP127X0010E7
595D, Tantalum (SMD)
10
220
0.14
1040
7.5 L × 4.3 W ×
4.1 H
1
≤4
595D227X0010D2T
94SA, Os-Con (Radial)
10
100
0.03
2670
10 × 10.5
≤3
94SA107X0010EBP
Kemet, Ceramic X5R
(SMD)
16
10
0.002
—
3225
≥1
(2)
≤5
C1210C106M4PAC
6.3
22
0.002
3225
≥1
(2)
≤5
C1210C226K9PAC
3225
≥1 (2)
≤5
C1210C476K9PAC
Capacitor Vendor,
Type/Series (Style)
Vendor
Part Number
United Chemi-Con
PSA6.3VB220MF11
Sanyo
7.3L × 5.7 W ×
4.1 H
(1)
1
Kemet (SMD)
6.3
(1)
(2)
47
0.002
1
Total capacitance of 94 µF is acceptable based on the combined ripple current rating.
Ceramic capacitors are required to complement electrolytic types at the input and to reduce high-frequency ripple current.
7
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
APPLICATION INFORMATION (continued)
Table 1. Input/Output Capacitors (continued)
Capacitor Characteristics
Capacitor Vendor,
Type/Series (Style)
Murata, Ceramic X5R
(SMD)
TDK, Ceramic X5R
(SMD)
Quantity
Working
Voltage
(V)
Value
(µF)
Max ESR
at 100
kHz
(Ω)
Max Ripple
Current at
85°C (Irms)
(mA)
Physical Size
(mm)
Input
Bus
Optional
Output
Bus
6.3
100
0.002
—
3225
≥1 (2)
≤3
GRM32ER60J107M
6.3
47
≥1 (2)
≤5
GRM32ER60J476M
16
22
≥1
(2)
≤5
GRM32ER61C226K
16
10
≥1
(2)
≤5
GRM32DR61C106K
6.3
100
≥1 (2)
≤3
C3225X5R0J107MT
6.3
47
≥1
(2)
≤5
C3225X5R0J476MT
16
22
≥1
(2)
≤5
C3225X5R1C226MT
16
10
≥1
(2)
≤5
C3225X5R1C106MT
0.002
—
3225
Vendor
Part Number
Adjusting the Output Voltage
The VO Adjust control (pin 4) sets the output voltage of the PTV05010W product to a value over the range, 0.8 V
to 3.6 V. The adjustment method requires the addition of a single external resistor, RSET, that must be connected
directly between the VO Adjust and the regulator's output GND (pin 1 is recommended). Without an adjust
resistor, the output voltage is set to its lowest value. Table 2 gives the preferred value of the external resistor for
a number of standard voltages, along with the actual output voltage that this resistance value provides. Figure 6
shows the placement of the required resistor.
Table 2. Nearest Standard Values of RSET for Common Output Voltages
VO
(Required)
RSET
(Standard Value)
VO
(Actual)
3.3 V
698 Ω
3.309 V
2.5 V
2.21 kΩ
2.502 V
2V
4.12 kΩ
2.010 V
1.8 V
5.49 kΩ
1.803 V
1.5 V
8.87 kΩ
1.504 V
1.2 V
17.4 kΩ
1.202 V
1V
36.5 kΩ
1.005 V
0.8 V
Open
0.800 V
For other output voltages, the value of the required resistor can either be calculated or simply selected from the
range of values given in Table 3. Equation 1 may be used for calculating the adjust resistor value.
RSET = 10 kW x
8
0.8 V
VO - 0.8 V
= 2.49 kW
(1)
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
VO
VO
PTV05010W
GND
GND
VO Adj
CO
RSET, 1%
GND
Figure 6. VO Adjust Resistor Placement
Table 3. Calculated Values of RSET for Other Output Voltages
VO
RSET
VO
RSET
VO
RSET
0.800
Open
1.450
9.82 kΩ
2.550
2.08 kΩ
0.825
318 kΩ
1.500
8.94 kΩ
2.600
1.95 kΩ
0.850
158 kΩ
1.550
8.18 kΩ
2.650
1.83 kΩ
0.875
104 kΩ
1.600
7.51 kΩ
2.700
1.72 kΩ
0.900
77.5 kΩ
1.650
6.92 kΩ
2.750
1.61 kΩ
0.925
61.5 kΩ
1.700
6.40 kΩ
2.800
1.51 kΩ
0.950
50.8 kΩ
1.750
5.93 kΩ
2.850
1.41 kΩ
0.975
43.2 kΩ
1.800
5.51 kΩ
2.900
1.32 kΩ
1.000
37.5 kΩ
1.850
5.13 kΩ
2.950
1.23 kΩ
1.025
33.1 kΩ
1.900
4.78 kΩ
3.000
1.15 kΩ
1.050
29.5 kΩ
1.950
4.47 kΩ
3.050
1.07 kΩ
1.075
26.6 kΩ
2.000
4.18 kΩ
3.100
998 Ω
1.100
24.2 kΩ
2.050
3.91 kΩ
3.150
914 Ω
1.125
22.1 kΩ
2.100
3.66 kΩ
3.200
843 Ω
1.150
20.4 kΩ
2.150
3.44 kΩ
3.250
775 Ω
1.175
18.8 kΩ
2.200
3.22 kΩ
3.300
710 Ω
1.200
17.5 kΩ
2.250
3.03 kΩ
3.350
647 Ω
1.225
16.3 kΩ
2.300
2.84 kΩ
3.400
587 Ω
1.250
15.3 kΩ
2.350
2.67 kΩ
3.450
529 Ω
1.300
13.5 kΩ
2.400
2.51 kΩ
3.500
473 Ω
1.350
12.1 kΩ
2.450
2.36 kΩ
3.550
419 Ω
1.400
10.8 kΩ
2.500
2.22 kΩ
3.600
367 Ω
9
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
Features of the PTH/PTV Family of Non-Isolated, Wide-Output Adjust Power Modules
POLA™ Compatibility
The PTH/PTV family of non-isolated, wide-output adjustable power modules from Texas Instruments are
optimized for applications that require a flexible, high-performance module that is small in size. Each of these
products are POLA™ compatible. POLA-compatible products are produced by a number of manufacturers, and
offer customers advanced, non-isolated modules with the same footprint and form factor. POLA parts are also
ensured to be interoperable, thereby providing customers with true second-source availability.
Soft-Start Power Up
The Auto-Track feature allows the power up of multiple PTH/PTV modules to be directly controlled from the
Track pin. However, in a stand-alone configuration, or when the Auto-Track feature is not being used, the Track
pin should be directly connected to the input voltage, VI (see Figure 7).
5
Track
8
GND
6
C1
100 mF
GND
1
1.8 V
VO 2, 3
PTV05010W
VI
Adjust
4
RSET
C2
10 mF
+
5V
5.49 kW
1%, 0.05 W
+
GND
C3
100 mF
L
O
A
D
GND
Figure 7. Power-Up Application Circuit
When the Track pin is connected to the input voltage, the Auto-Track function is permanently disengaged. This
allows the module to power up entirely under the control of its internal soft-start circuitry. When power up is
under soft-start control, the output voltage rises to the set-point at a quicker and more linear rate.
VI (2 V/div)
VO (1 V/div)
II (2 A/div)
t - Time = 5 ms/div
Figure 8. Power-Up Waveform
10
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SLTS242 – FEBRUARY 2005
From the moment a valid input voltage is applied, the soft-start control introduces a short time delay (typically
8 ms to 15 ms) before allowing the output voltage to rise. The output then progressively rises to the module
set-point voltage. Figure 8 shows the soft-start power-up characteristic of the PTV05010W, operating from a 5-V
input bus and configured for a 1.8-V output. The waveforms were measured with a 5-A resistive load and the
Auto-Track feature disabled. The initial rise in input current when the input voltage first starts to rise is the charge
current drawn by the input capacitors. Power up is complete within 25 ms.
Overcurrent Protection (OCP)
For protection against load faults, the modules incorporate output overcurrent protection. Applying a load that
exceeds the overcurrent threshold causes the regulated output to shut down. Following shutdown, a module
periodically attempts to recover by initiating a soft-start power up. This is described as a hiccup mode of
operation, whereby the module continues in the cycle of successive shutdown and power up until the load fault is
removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is
removed, the module automatically recovers and returns to normal operation.
Output On/Off Inhibit
For applications requiring output voltage on/off control, the modules incorporate an output Inhibit control pin. The
inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned
off.
The power modules function normally when the Inhibit input is left open-circuit, providing a regulated output
whenever a valid source voltage is connected to VI with respect to GND.
Figure 9 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit input
has its own internal pullup (see footnotes to electrical characteristics table). The input is not compatible with TTL
logic devices. An open-collector (or open-drain) discrete transistor is recommended for control.
Track
VI
VI
PTV05010W
Inhibit GND
C1
GND
VO
VO
VOAdj
C2
C3
Q1
BSS138
RSET
L
O
A
D
1 = Inhibit
GND
GND
Figure 9. On/Off Inhibit Application Circuit
Turning Q1 on applies a low voltage to the Inhibit control and disables the output of the module. If Q1 is then
turned off, the module executes a soft-start power-up sequence. A regulated output voltage is produced within 25
ms. Figure 10 shows the typical rise in both the output voltage and input current, following the turnoff of Q1. The
turnoff of Q1 corresponds to the rise in the waveform, Q1 VDS. The waveforms were measured with a 5-A
constant current load.
11
PTV05010W
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SLTS242 – FEBRUARY 2005
VO (1 V/div)
II (2 A/div)
Q1 VDS (5 V/div)
t - Time = 5 ms/div
Figure 10. Inhibit Waveform
Auto-Track™ Function
The Auto-Track function is unique to the PTH/PTV family, and is available with all POLA products. Auto-Track
was designed to simplify the amount of circuitry required to make the output voltage from each module power up
and power down in sequence. The sequencing of two or more supply voltages during power up is a common
requirement for complex mixed-signal applications that use dual-voltage VLSI ICs such as DSPs,
microprocessors, and ASICs.
How Auto-Track™ Works
Auto-Track works by forcing the module output voltage to follow a voltage presented at the Track control pin (1).
This control range is limited to between 0 V and the module set-point voltage. Once the track-pin voltage is
raised above the set-point voltage, the module's output remains at its set-point (2). As an example, if the Track
pin of a 2.5-V regulator is at 1 V, the regulated output is 1 V. But if the voltage at the Track pin rises to 3 V, the
regulated output does not go higher than 2.5 V.
When under Auto-Track control, the regulated output from the module follows the voltage at its Track pin on a
volt-for-volt basis. By connecting the Track pin of a number of these modules together, the output voltages follow
a common signal during power up and power down. The control signal can be an externally generated master
ramp waveform, or the output voltage from another power supply circuit (3). For convenience, the Track input
incorporates an internal RC-charge circuit. This operates off the module input voltage to produce a suitable rising
waveform at power up.
Typical Application
The basic implementation of Auto-Track allows for simultaneous voltage sequencing of a number of Auto-Track
compliant modules. Connecting the Track control pins of two or more modules forces the Track control of all
modules to follow the same collective RC-ramp waveform, and allows them to be controlled through a single
transistor or switch; see Q1 in Figure 11.
To initiate a power-up sequence, it is recommended that the Track control first be pulled to ground potential. This
is done at or before input power is applied to the modules, and then held for at least 10 ms thereafter. This brief
period gives the modules time to complete their internal soft-start initialization. Applying a logic level high signal
to the circuit On/Off Control turns Q1 on and applies a ground signal to the Track input of the modules. After
completing their internal soft-start intialization, the output of all modules remains at zero volts while Q1 is on.
Q1 may be turned off 10 ms after a valid input voltage has been applied to the modules. This allows the track
control voltage to automatically rise to the module input voltage. During this period, the output voltage of each
module rises in unison with other modules to its respective set-point voltage.
12
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PTV05010W
SLTS242 – FEBRUARY 2005
Figure 12 shows the output voltage waveforms from the circuit of Figure 11 after the On/Off Control is set from a
high-level to a low-level voltage. The waveforms, VO1 and VO2 represent the output voltages from the two power
modules, U1 (3.3 V) and U2 (1.8 V), respectively. VO1 and VO2 are shown rising together to produce the desired
simultaneous power-up characteristic.
The same circuit also provides a power-down sequence. Power down is the reverse of power up, and is
accomplished by lowering the track control voltage back to zero volts. The important constraint is that a valid
input voltage must be maintained until the power down is complete. It also requires that Q1 be turned off
relatively slowly. This is so that the Track control voltage does not fall faster than Auto-Track slew rate capability,
which is 1 V/ms. The components R1 and C1 in Figure 11 limit the rate at which Q1 pulls down the Track control
voltage. The values of 100 kΩ and 0.1 µF correlate to a decay rate of about 0.17 V/ms.
The power-down sequence is initiated with a low-to-high transition at the On/Off Control input to the circuit.
Figure 13 shows the power-down waveforms. As the Track control voltage falls below the nominal set-point
voltage of each power module, then its output voltage decays with all the other modules under Auto-Track
control.
Notes on Use of Auto-Track™
1. The Track pin voltage must be allowed to rise above the module set-point voltage before the module can
regulate at its adjusted set-point voltage.
2. The Auto-Track function tracks almost any voltage ramp during power up, and is compatible with ramp
speeds of up to 1 V/ms.
3. The absloute maximum voltage that may be applied to the Track pin is the input voltage VI.
4. The module cannot follow a voltage at its Track control input until it has completed its soft-start initialization.
This takes about 10 ms from the time that a valid voltage has been applied to its input. During this period, it
is recommended that the Track pin be held at ground potential.
5. The module is capable of both sinking and sourcing current when following a voltage at its Track input.
Therefore, start up into an output prebias cannot be supported when a module is under Auto-Track control.
Note: A prebias holdoff is not necessary when all supply voltages rise simultaneously under the control of
Auto-Track.
6. The Auto-Track function can be disabled by connecting the Track pin to the input voltage (VI). When
Auto-Track is disabled, the output voltage rises at a quicker and more linear rate after input power has been
applied.
13
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
U1
Track
Sense
Vo1 = 3.3 V
VI
5 V
VO
PTV05020W
Adjust
GND GND
+
+
CI
CO
R2
698 kW
C1
0.1 mF
U2
On/Off Control
1 = Power Down
0 = Power Up
R1
100 kW
Track
Q1
BSS138
VI
Inhibit
GND
VoAdj
+
+
CI
0 V
Vo2 = 1.8 V
7
V
O
PTV05010W
CO
R3
5.49 kW
Figure 11. Sequenced Power Up and Power Down Using Auto-Track
VO1 (1 V/Div)
VO1 (1 V/Div)
VO2 (1 V/Div)
VO2 (1 V/Div)
On/Off Input (5 V/Div)
On/Off Input (5 V/Div)
t = 10 ms/Div
Figure 12. Simultaneous Power Up With Auto-Track
Control
t = 10 ms/Div
Figure 13. Simultaneous Power Down With Auto-Track
Control
Prebias Start-Up Capability
A prebias start-up condition occurs as a result of an external voltage being present at the output of a power
module prior to its output becoming active. This often occurs in complex digital systems when current from
another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another
path might be via clamp diodes, sometimes used as part of a dual-supply power-up sequencing arrangement. A
14
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under
most operating conditions, such modules can sink as well as source output current. The PTH/PTV modules
incorporate synchronous rectifiers but do not sink current during start-up, or whenever the Inhibit pin is held low.
Start-up includes an initial delay (approximately 8–15 ms), followed by the rise of the output voltage under the
control of the module internal soft-start mechanism; see Figure 14.
Conditions for Prebias Holdoff
In order for the module to allow an output prebias voltage to exist (and not sink current), certain conditions must
be maintained. The module holds off a prebias voltage when the Inhibit pin is held low, and whenever the output
is allowed to rise under soft-start control. Power up under soft-start control occurs on the removal of the ground
signal to the Inhibit pin (with input voltage applied), or when input power is applied with Auto-Track disabled(1).
The input voltage must also be greater than the applied prebias source(2).
The soft-start period is complete when the output begins rising above the prebias voltage. The module then
functions as normal, and sinks current if a voltage higher than its set-point value is applied to its output.
Note: If a prebias condition is not present, the soft-start period is complete when the output voltage has risen to
either the set-point voltage, or the voltage applied at the module Track control pin, whichever is lowest, to its
output.
Demonstration Circuit
Figure 15 shows the start-up waveforms for the demonstration circuit shown in Figure 16. The initial rise in VO2 is
the prebias voltage, which is passed from the VCCIO to the VCORE voltage rail through the ASIC. Note that the
output current from the module (IO2) is negligible until its output voltage rises above the applied prebias.
VI (2 V/div)
VI (2 V/div)
VO1 (1 V/div)
VO 2 (1 V/div)
IO 2 (5 A/div)
VO (1 V/div)
Start-up
period
t = 10 ms/div
Figure 14. PTV05010W Start-Up
t = 10 ms/div
Figure 15. Prebias Start-Up Waveforms
NOTES:
1. The prebias start-up feature is not compatible with Auto-Track. If the rise in the output is limited by the
voltage applied to the Track control pin, the output sinks current during the period that the track control
voltage is below that of the back-feeding source. For this reason, Auto-Track should be disabled when not
being used. This is accomplished by connecting the Track pin to the input voltage, VI. This raises the Track
pin well above the set-point voltage prior to start-up, thereby defeating the Auto-Track feature.
2. To further ensure that the regulator output does not sink current when power is first applied (even with a
ground signal applied to the Inhibit control input), the input voltage must always be greater than the applied
prebias source. This condition must exist throughout the power-up sequence of the power system.
15
PTV05010W
www.ti.com
SLTS242 – FEBRUARY 2005
U1
9
7
Track
VI = 5 V
5, 6
Sense
3, 4
V7
PTV05020W
VI
VO1 = 3.3 V
O
Inhibit GND GND VO Adj
10, 11 1, 2
12
+
C1
8
R1
698 W
C2
U2
C3
5
Track
8
VI
Inhibit GND
7
U3
TPS3808G33
+
6
VCC
5
SENSE
3
4
MR
RESET
1
C4
C5
VO
PTV05010W
6
VO2 = 1.8 V
2, 3
+
GND VOAdj
1
IO2
4
R2
5.49 kW
+
VCORE
ASIC
CT
GND
2
C7
0.1µF
Figure 16. Application Circuit Demonstrating Prebias Start-Up
16
VCCIO
C6
PACKAGE OPTION ADDENDUM
www.ti.com
19-Aug-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
PTV05010WAH
ACTIVE
SIP MOD
ULE
EVA
Pins Package Eco Plan (2)
Qty
8
70
TBD
Lead/Ball Finish
Call TI
MSL Peak Temp (3)
Level-1-235C-UNLIM
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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