TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 PRECISION ADJUSTABLE CURRENT-LIMITED POWER-DISTRIBUTION SWITCHES FEATURES 1 • • • • • 2 • • • • • • • ±6% Current-Limit Accuracy at 1.3 A Meets USB Current-Limiting Requirements Backwards Compatible with TPS2550/51 Adjustable Current Limit, 75 mA–1300 mA (typ) Constant-Current (TPS2552/53) and Latch-off (TPS2552-1/53-1) Versions Fast Overcurrent Response - 2-µS (typ) 85-mΩ High-Side MOSFET (DBV Package) Reverse Input-Output Voltage Protection Operating Range: 2.5 V to 6.5 V 1-µA Maximum Standby Supply Current Built-in Soft-Start 15 kV ESD Protection per IEC 61000-4-2 (with External Capacitance) APPLICATIONS • • • • • USB Ports/Hubs Digital TV Set-Top Boxes Mobile Phones VOIP Phones TIPS2552/TPS2553 DRV PACKAGE (TOP VIEW) OUT ILIM FAULT 1 2 3 PAD 6 IN 5 GND 4 EN 1 2 3 6 5 4 EN = Active Low for the TPS2552 EN = Active High for the TPS2553 Add -1 to part number for lach-off version The TPS2552/53 and TPS2552-1/53-1 power-distribution switches are intended for applications where precision current limiting is required or heavy capacitive loads and short circuits are encountered. These devices offer a programmable current-limit threshold between 75 mA and 1.3 A (typ) via an external resistor. Current-limit accuracy as tight as +/-6% can be achieved at the higher current-limit settings. The power-switch rise and fall times are controlled to minimize current surges during turn on/off. TPS2552/53 devices limit the output current to a safe level by switching into a constant-current mode when the output load exceeds the current-limit threshold. TPS2552-1/53-1 devices provide circuit breaker functionality by latching off the power switch during overcurrent or reverse-voltage situations. An internal reverse-voltage detection comparator disables the power-switch in the event that the output voltage is driven higher than the input to protect devices on the input side of the switch. The FAULT logic output asserts low during overcurrent and reverse-voltage conditions. TPS2552/53 TIPS2552/TPS2553 DBV PACKAGE (TOP VIEW) IN GND EN DESCRIPTION 5V USB Input OUT ILIM FAULT 0.1 mF USB Data IN OUT USB Port RFAULT 100 kW 120 mF Fault Signal Control Signal FAULT EN ILIM GND Power Pad RILIM 20 kW USB requirement only* *USB requirement that downstream facing ports are bypassed with at least 120 mF per hub Figure 1. Typical Application as USB Power Switch 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerPAD is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008, Texas Instruments Incorporated TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com This device contains circuits to protect its inputs and outputs against damage due to high static voltages or electrostatic fields. These circuits have been qualified to protect this device against electrostatic discharges (ESD) of up to 2 kV according to MIL-STD-883C, Method 3015; however, it is advised that precautions be taken to avoid application of any voltage higher than maximum-rated voltages to these high-impedance circuits. During storage or handling the device leads should be shorted together or the device should be placed in conductive foam. In a circuit, unused inputs should always be connected to an appropriate logic voltage level, preferably either VCC or ground. Specific guidelines for handling devices of this type are contained in the publication Guidelines for Handling Electrostatic-Discharge-Sensitive (ESDS) Devices and Assemblies available from Texas Instruments. AVAILABLE OPTIONS AND ORDERING INFORMATION AMBIENT TEMPERATURE ENABLE SON (3) (DRV) SOT23 (3) (DBV) TPS2552 Active low TPS2552DRV TPS2552DBV TPS2553 Active high TPS2553DRV TPS2553DBV Active low TPS2552DRV-1 TPS2552DBV-1 Active high TPS2553DRV-1 TPS2553DBV-1 DEVICE (1) (2) TPS2552-1 –40°C to 85°C TPS2553-1 (1) (2) (3) RECOMMENDED MAXIMUM CONTINUOUS LOAD CURRENT CURRENT-LIMIT PROTECTION Constant-Current 1.2 A Latch-Off For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Maximum ambient temperature is a function of device junction temperature and system level considerations, such as power dissipation and board layout. See dissipation rating table and recommended operating conditions for specific information related to these devices. Add an R suffix to the device type for tape and reel. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range unless otherwise noted (1) (2) Voltage range on IN, OUT, EN or EN, ILIM, FAULT Voltage range from IN to OUT IO Continuous output current VALUE UNIT –0.3 to 7 V –7 to 7 V Internally Limited See the Dissipation Rating Table Continuous total power dissipation Continuous FAULT sink current 25 mA ILIM source current 1 mA 2 kV ESD HBM 500 V TJ Maximum junction temperature –40 to 150 °C Tstg Storage temperature –65 to 150 °C (1) (2) CDM Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Voltages are referenced to GND unless otherwise noted. DISSIPATION RATING TABLE BOARD PACKAGE THERMAL RESISTANCE θJA THERMAL RESISTANCE θJC TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING Low-K (1) DBV 350°C/W 55°C/W 285 mW 2.85 mW/°C 155 mW 114 mW (2) DBV 160°C/W 55°C/W 625 mW 6.25 mW/°C 340 mW 250 mW Low-K (1) DRV 140°C/W 20°C/W 715 mW 7.1 mW/°C 395 mW 285 mW High-K (2) DRV 75°C/W 20°C/W 1330 mW 13.3 mW/°C 730 mW 530 mW High-K (1) (2) 2 The JEDEC low-K (1s) board used to derive this data was a 3in × 3in, two-layer board with 2-ounce copper traces on top of the board. The JEDEC high-K (2s2p) board used to derive this data was a 3in × 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 RECOMMENDED OPERATING CONDITIONS VIN Input voltage, IN VEN V/EN Enable voltage MAX 2.5 6.5 TPS2552/52-1 0 6.5 TPS2553/53-1 0 6.5 VIH High-level input voltage on EN or EN VIL Low-level input voltage on EN or EN IOUT Continuous output current, OUT RILIM Current-limit threshold resistor range (nominal 1%) from ILIM to GND IO Continuous FAULT sink current TJ MIN UNIT V V 1.1 V 0.66 0 1.2 19.1 232 kΩ 0 10 mA Input de-coupling capacitance, IN to GND 0.1 Operating virtual junction temperature –40 DRV and DBV A µF 125 °C ELECTRICAL CHARACTERISTICS over recommended operating junction temperature range, 2.5 V ≤ VIN ≤ 6.5 V, 19.1 kΩ ≤ RILIM ≤ 232 kΩ, V/EN = 0 V, or VEN = VIN, RFAULT = 10 kΩ (unless otherwise noted) TEST CONDITIONS (1) PARAMETER MIN TYP MAX UNIT POWER SWITCH DBV package, TJ = 25 °C 85 DBV package, –40 °C ≤TJ ≤125 °C rDS(on) Static drain-source on-state resistance DRV package, TJ = 25 °C 100 DRV package, –40 °C ≤TJ ≤105 °C tf VIN = 2.5 V VIN = 6.5 V Fall time, output mΩ 150 VIN = 6.5 V Rise time, output 115 140 DRV package, –40 °C ≤TJ ≤125 °C tr 95 135 CL = 1 µF, RL = 100 Ω, (see Figure 2) VIN = 2.5 V 1.1 1.5 0.7 1.0 ms 0.2 0.5 0.2 0.5 0.66 1.1 V –0.5 0.5 µA 3 ms 3 ms ENABLE INPUT EN OR EN Enable pin turn on/off threshold IEN Input current ton Turnon time toff Turnoff time VEN = 0 V or 6.5 V, V/EN = 0 V or 6.5 V CL = 1 µF, RL = 100 Ω, (see Figure 2) CURRENT LIMIT IOS Current-limit threshold (Maximum DC output current IOUT delivered to load) & Short-circuit current, OUT connected to GND RILIM = 20 kΩ TJ = 25 °C 1215 1295 1375 –40 °C ≤TJ ≤125 °C 1200 1295 1375 RILIM = 49.9 kΩ TJ = 25 °C 490 520 550 –40 °C ≤TJ ≤125 °C 475 520 565 110 130 150 50 75 100 RILIM = 210 kΩ ILIM shorted to IN tIOS Response time to short circuit VIN = 5.0 V (see Figure 3) mA µs 2 REVERSE-VOLTAGE PROTECTION Reverse-voltage comparator trip point (VOUT – VIN) Time from reverse-voltage condition to MOSFET turn off (1) VIN = 5.0 V 95 135 190 mV 3 5 7 ms Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be taken into account separately. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 3 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com ELECTRICAL CHARACTERISTICS (continued) over recommended operating junction temperature range, 2.5 V ≤ VIN ≤ 6.5 V, 19.1 kΩ ≤ RILIM ≤ 232 kΩ, V/EN = 0 V, or VEN = VIN, RFAULT = 10 kΩ (unless otherwise noted) TEST CONDITIONS (1) PARAMETER MIN TYP MAX UNIT SUPPLY CURRENT IIN_off Supply current, low-level output 0.1 1 µA 120 140 µA RILIM = 210 kΩ 100 120 µA TJ = 25 °C 0.01 1 µA 2.35 2.45 VIN = 6.5 V, No load on OUT, VEN = 6.5 V or VEN = 0 V IIN_on Supply current, high-level output VIN = 6.5 V, No load on OUT IREV Reverse leakage current VOUT = 6.5 V, VIN = 0 V RILIM = 20 kΩ UNDERVOLTAGE LOCKOUT UVLO Low-level input voltage, IN VIN rising Hysteresis, IN TJ = 25 °C 25 V mV FAULT FLAG VOL Output low voltage, FAULT I/FAULT = 1 mA Off-state leakage V/FAULT = 6.5 V FAULT deglitch 180 mV 1 µA FAULT assertion or de-assertion due to overcurrent condition 5 7.5 10 ms FAULT assertion or de-assertion due to reverse-voltage condition 2 4 6 ms THERMAL SHUTDOWN Thermal shutdown threshold 155 °C Thermal shutdown threshold in current-limit 135 °C Hysteresis 4 10 Submit Documentation Feedback °C Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 DEVICE INFORMATION Pin Functions PIN NAME I/O DESCRIPTION TPS2552DBV TPS2553DBV TPS2552DRV TPS2553DRV EN 3 – 4 – I Enable input, logic low turns on power switch EN – 3 – 4 I Enable input, logic high turns on power switch GND 2 2 5 5 IN 1 1 6 6 I Input voltage; connect a 0.1 µF or greater ceramic capacitor from IN to GND as close to the IC as possible. FAULT 4 4 3 3 O Active-low open-drain output, asserted during overcurrent, overtemperature, or reverse-voltage conditions. OUT 6 6 1 1 O Power-switch output ILIM 5 5 2 2 O External resistor used to set current-limit threshold; recommended 19.1 kΩ ≤ RILIM ≤ 232 kΩ. PowerPAD ™ – – PAD PAD Ground connection; connect externally to PowerPAD Internally connected to GND; used to heat-sink the part to the circuit board traces. Connect PowerPAD to GND pin externally. Add -1 for Latch-Off version FUNCTIONAL BLOCK DIAGRAM - Reverse Voltage Comparator + IN OUT 4-ms Deglitch CS Current Sense Charge Pump Driver EN Current Limit FAULT (Note A) UVLO GND Thermal Sense 8-ms Deglitch ILIM Note A: TPS255x parts enter constant current mode during current limit condition; TPS255x-1 parts latch off Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 5 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com PARAMETER MEASUREMENT INFORMATION OUT tf tr CL RL 90% 90% VOUT 10% 10% TEST CIRCUIT VEN 50% 50% VEN ton VOUT toff toff ton 90% 50% 50% toff 90% VOUT 10% 10% VOLTAGE WAVEFORMS Figure 2. Test Circuit and Voltage Waveforms IOS IOUT tIOS Figure 3. Response Time to Short Circuit Waveform Decreasing Load Resistance VOUT Decreasing Load Resistance IOUT IOS Figure 4. Output Voltage vs. Current-Limit Threshold 6 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS TPS2552 VIN 10 mF IN VOUT OUT RFAULT 10 kW 150 mF ILIM Fault Signal Control Signal FAULT EN RILIM GND Power Pad Figure 5. Typical Characteristics Reference Schematic Figure 6. Turnon Delay and Rise Time Figure 7. Turnoff Delay and Fall Time Figure 8. Device Enabled into Short-Circuit Figure 9. Full-Load to Short-Circuit Transient Response Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 7 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com TYPICAL CHARACTERISTICS (continued) 8 Figure 10. Short-Circuit to Full-Load Recovery Response Figure 11. No-Load to Short-Circuit Transient Response Figure 12. Short-Circuit to No-Load Recovery Response Figure 13. No Load to 1Ω Transient Response Figure 14. 1Ω to No Load Transient Response Figure 15. Reverse-Voltage Protection Response Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 TYPICAL CHARACTERISTICS (continued) 2.40 UVLO - Undervoltage Lockout - V 2.39 RILIM = 20 kW 2.38 2.37 UVLO Rising 2.36 2.35 2.34 UVLO Falling 2.33 2.32 2.31 2.30 -50 Figure 16. Reverse-Voltage Protection Recovery 100 150 150 RILIM = 20 kW 0.36 135 IIN - Supply Current, Output Enabled - mA IIN - Supply Current, Output Disabled - mA 50 TJ - Junction Temperature - °C Figure 17. UVLO – Undervoltage Lockout – V 0.40 0.32 0.28 0.24 VIN = 6.5 V 0.20 0.16 0.12 0.08 VIN = 2.5 V 0.04 RILIM = 20 kW VIN = 6.5 V VIN = 5 V 120 105 90 75 VIN = 2.5 V VIN = 3.3 V 60 45 30 15 0 -50 0 50 TJ - Junction Temperature - °C 100 0 -50 150 Figure 18. IIN – Supply Current, Output Disabled – µA 0 50 TJ - Junction Temperature - °C 100 150 Figure 19. IIN – Supply Current, Output Enabled – µA 150 rDS(on) - Static Drain-Source On-State Resistance - mW 20 VIN = 5 V, 18 RILIM = 20 kW, TA = 25°C 16 Current Limit Response - ms 0 14 12 10 8 6 4 2 0 0 1.5 3 Peak Current - A 4.5 Figure 20. Current Limit Response – µs Copyright © 2008, Texas Instruments Incorporated 6 125 DRV Package 100 DBV Package 75 50 25 0 -50 0 50 TJ - Junction Temperature - °C 100 150 Figure 21. MOSFET rDS(on) Vs. Junction Temperature Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 9 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com TYPICAL CHARACTERISTICS (continued) 1400 150 1300 140 130 IDS - Static Drain-Source Current - mA IDS - Static Drain-Source Current - mA 1200 TA = -40°C 1100 1000 TA = 25°C 900 TA = 125°C 800 700 600 500 400 300 TA = 25°C TA = -40°C 110 TA = 125°C 100 90 80 70 60 50 40 30 200 VIN = 6.5 V, 20 VIN = 6.5 V, 100 RILIM = 20 kW 10 RILIM = 200 kW 0 0 100 200 300 400 500 600 VIN - VOUT - 100 mV/div 700 800 900 Figure 22. Current Limit Threshold Vs. RILM 10 120 Submit Documentation Feedback 1000 0 0 100 200 300 400 500 600 VIN - VOUT - 100 mV/div 700 800 900 1000 Figure 23. Current Limit Threshold Vs. RILM Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 DETAILED DESCRIPTION OVERVIEW The TPS2552/53 and TPS2552-1/53-1 are current-limited, power-distribution switches using N-channel MOSFETs for applications where short circuits or heavy capacitive loads will be encountered. These devices allow the user to program the current-limit threshold between 75 mA and 1.3 A (typ) via an external resistor. Additional device shutdown features include overtemperature protection and reverse-voltage protection. The device incorporates an internal charge pump and gate drive circuitry necessary to drive the N-channel MOSFET. The charge pump supplies power to the driver circuit and provides the necessary voltage to pull the gate of the MOSFET above the source. The charge pump operates from input voltages as low as 2.5 V and requires little supply current. The driver controls the gate voltage of the power switch. The driver incorporates circuitry that controls the rise and fall times of the output voltage to limit large current and voltage surges and provides built-in soft-start functionality. There are two device families that handle overcurrent situations differently. The TPS2552/53 family enters constant-current mode while the TPS2552-1/53-1 family latches off when the load exceeds the current-limit threshold. OVERCURRENT CONDITIONS The TPS2552/53 and TPS2552-1/53-1 respond to overcurrent conditions by limiting their output current to the IOS levels shown in Figure 24. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Two possible overload conditions can occur. The first condition is when a short circuit or partial short circuit is present when the device is powered-up or enabled. The output voltage is held near zero potential with respect to ground and the TPS2552/53 ramps the output current to IOS. The TPS2552/53 devices will limit the current to IOS until the overload condition is removed or the device begins to thermal cycle. The TPS2552-1/53-1 devices will limit the current to IOS until the overload condition is removed or the internal deglitch time (7.5-ms typical) is reached and the device is turned off . The device will remain off until power is cycled or the device enable is toggled. The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is enabled and powered on. The device responds to the overcurrent condition within time tIOS (see Figure 3). The current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit MOSFET. The current-sense amplifier recovers and limits the output current to IOS. Similar to the previous case, the TPS2552/53 will limit the current to IOS until the overload condition is removed or the device begins to thermal cycle; the TPS2552-1/53-1 will limit the current to IOS until the overload condition is removed or the internal deglitch time is reached and the device is latched off. The TPS2552/53 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. The device turns off when the junction temperature exceeds 135°C (typ) while in current limit. The device remains off until the junction temperature cools 10°C (typ) and then restarts. The TPS2552/53 cycles on/off until the overload is removed (see Figure 10 and Figure 12) . REVERSE-VOLTAGE PROTECTION The reverse-voltage protection feature turns off the N-channel MOSFET whenever the output voltage exceeds the input voltage by 135 mV (typ) for 4-ms (typ). This prevents damage to devices on the input side of the TPS2552/53 and TPS2552-1/TPS2253-1 by preventing significant current from sinking into the input capacitance. The TPS2552/53 devices allow the N-channel MOSFET to turn on once the output voltage goes below the input voltage for the same 4-ms deglitch time. The TPS2552-1/53-1 devices keep the device turned off even if the reverse-voltage condition is removed and do not allow the N-channel MOSFET to turn on until power is cycled or the device enable is toggled. The reverse-voltage comparator also asserts the FAULT output (active-low) after 4-ms. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 11 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com FAULT RESPONSE The FAULT open-drain output is asserted (active low) during an overcurrent, overtemperature or reverse-voltage condition. The TPS2552/53 asserts the FAULT signal until the fault condition is removed and the device resumes normal operation. The TPS2552-1/53-1 asserts the FAULT signal during a fault condition and remains asserted while the part is latched-off. The FAULT signal is de-asserted once device power is cycled or the enable is toggled and the device resumes normal operation. The TPS2552/53 and TPS2552-1/53-1 are designed to eliminate false FAULT reporting by using an internal delay "deglitch" circuit for overcurrent (7.5-ms typ) and reverse-voltage (4-ms typ) conditions without the need for external circuitry. This ensures that FAULT is not accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry delays entering and leaving fault conditions. Overtemperature conditions are not deglitched and assert the FAULT signal immediately. UNDERVOLTAGE LOCKOUT (UVLO) The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turn-on threshold. Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop from large current surges. ENABLE (EN OR EN) The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the supply current. The supply current is reduced to less than 1-µA when a logic high is present on EN or when a logic low is present on EN. A logic low input on EN or a logic high input on EN enables the driver, control circuits, and power switch. The enable input is compatible with both TTL and CMOS logic levels. THERMAL SENSE The TPS2552/53 and TPS2552-1/53-1 have self-protection features using two independent thermal sensing circuits that monitor the operating temperature of the power switch and disable operation if the temperature exceeds recommended operating conditions. The TPS2552/53 device operates in constant-current mode during an overcurrent conditions, which increases the voltage drop across power-switch. The power dissipation in the package is proportional to the voltage drop across the power switch, which increases the junction temperature during an overcurrent condition. The first thermal sensor turns off the power switch when the die temperature exceeds 135°C (min) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on after the device has cooled approximately 10 °C. The TPS2552/53 and TPS2552-1/53-1 also have a second ambient thermal sensor. The ambient thermal sensor turns off the power-switch when the die temperature exceeds 155°C (min) regardless of whether the power switch is in current limit and will turn on the power switch after the device has cooled approximately 10 °C. Both the TPS2552/53 and TPS2552-1/53-1 families continue to cycle off and on until the fault is removed. The open-drain fault reporting output FAULT is asserted (active low) immediately during an overtemperature shutdown condition. 12 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 APPLICATION INFORMATION INPUT AND OUTPUT CAPACITANCE Input and output capacitance improves the performance of the device; the actual capacitance should be optimized for the particular application. For all applications, a 0.1µF or greater ceramic bypass capacitor between IN and GND is recommended as close to the device as possible for local noise de-coupling. This precaution reduces ringing on the input due to power-supply transients. Additional input capacitance may be needed on the input to reduce voltage overshoot from exceeding the absolute maximum voltage of the device during heavy transient conditions. This is especially important during bench testing when long, inductive cables are used to connect the evaluation board to the bench power-supply. Placing a high-value electrolytic capacitor on the output pin is recommended when large transient currents are expected on the output. Additionally, bypassing the output with a 0.01 µF to 0.1 µF ceramic capacitor improves the immunity of the device to transient conditions and noise. PROGRAMMING THE CURRENT-LIMIT THRESHOLD The overcurrent threshold is user programmable via an external resistor. The TPS2552/53 and TPS2552-1/53-1 use an internal regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the current sourced out of ILIM. The recommended 1% resistor range for RILIM is 19.1 kΩ ≤ RILIM ≤ 232 kΩ to ensure stability of the internal regulation loop. Many applications require that the minimum current limit is above a certain current level or that the maximum current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when selecting a value for RILIM. The following equations and Figure 24 can be used to calculate the resulting overcurrent threshold for a given external resistor value (RILIM). Figure 24 includes current-limit tolerance due to variations caused by temperature and process. However, the equations do not account for tolerance due to external resistor variation, so it is important to account for this tolerance when selecting RILIM. The traces routing the RILIM resistor to the TPS2552/53 and TPS2552-1/53-1 should be as short as possible to reduce parasitic effects on the current-limit accuracy. RILIM can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2) below a maximum load current. To design above a minimum current-limit threshold, find the intersection of RILIM and the maximum desired load current on the IOS(min) curve and choose a value of RILIM below this value. Programming the current limit above a minimum threshold is important to ensure start up into full load or heavy capacitive loads. The resulting maximum current-limit threshold is the intersection of the selected value of RILIM and the IOS(max) curve. To design below a maximum current-limit threshold, find the intersection of RILIM and the maximum desired load current on the IOS(max) curve and choose a value of RILIM above this value. Programming the current limit below a maximum threshold is important to avoid current limiting upstream power supplies causing the input voltage bus to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM and the IOS(min) curve. Current-Limit Threshold Equations (IOS): IOSmax (mA) = 22980V RILIM0.94kW IOSnom (mA) = 23950V RILIM0.977kW IOSmin (mA) = 25230V RILIM1.016kW (1) where 19.1 kΩ ≤ RILIM ≤ 232 kΩ. While the maximum recommended value of RILIM is 232 kΩ, there is one additional configuration that allows for a lower current-limit threshold. The ILIM pin may be connected directly to IN to provide a 75 mA (typ) current-limit threshold. Additional low-ESR ceramic capacitance may be necessary from IN to GND in this configuration to prevent unwanted noise from coupling into the sensitive ILIM circuitry. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 13 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com 1500 1400 1300 Current Limit Threshold - mA 1200 1100 1000 900 800 700 IOS(max) 600 500 IOS(nom) 400 300 200 IOS(min) 100 0 20 30 40 50 60 70 80 90 100 110 120 130 140 150 160 170 180 190 200 210 220 230 RILIM - Current Limit Resistor - kW Figure 24. Current-Limit Threshold vs. RILIM 14 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 APPLICATION 1: DESIGNING ABOVE A MINIMUM CURRENT LIMIT Some applications require that current limiting cannot occur below a certain threshold. For this example, assume that 1 A must be delivered to the load so that the minimum desired current-limit threshold is 1000 mA. Use the IOS equations and Figure 24 to select RILIM. IOSmin (mA) = 1000mA IOSmin (mA) = 25230V RILIM1.016 k W 1 æ 25230V ö÷1.016 ÷ RILIM (k W ) = ççç çè IOSmin mA ø÷÷ RILIM (k W ) = 24k W (2) Select the closest 1% resistor less than the calculated value: RILIM = 23.7 kΩ. This sets the minimum current-limit threshold at 1 A . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to calculate the maximum resulting current-limit threshold. RILIM (kW) = 23.7kW IOSmax (mA) = IOSmax (mA) = 22980V RILIM0.94kW 22980V 23.70.94kW IOSmax (mA) = 1172.4mA (3) The resulting maximum current-limit threshold is 1172.4 mA with a 23.7 kΩ resistor. APPLICATION 2: DESIGNING BELOW A MAXIMUM CURRENT LIMIT Some applications require that current limiting must occur below a certain threshold. For this example, assume that the desired upper current-limit threshold must be below 500 mA to protect an up-stream power supply. Use the IOS equations and Figure 24 to select RILIM. IOSmax (mA) = 500mA IOSmax (mA) = 22980V RILIM0.94kW 1 æ 22980V ÷ö0.94 ÷÷ RILIM (kW) = ççç çèI mA ÷ø OSmax RILIM (kW) = 58.7kW (4) Select the closest 1% resistor greater than the calculated value: RILIM = 59 kΩ. This sets the maximum current-limit threshold at 500 mA . Use the IOS equations, Figure 24, and the previously calculated value for RILIM to calculate the minimum resulting current-limit threshold. RILIM (kW) = 59kW IOSmin (mA) = IOSmin (mA) = 25230V RILIM1.016kW 25230V 591.016kW IOSmin (mA) = 400.6mA (5) The resulting minimum current-limit threshold is 400.6 mA with a 59 kΩ resistor. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 15 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com ACCOUNTING FOR RESISTOR TOLERANCE The previous sections described the selection of RILIM given certain application requirements and the importance of understanding the current-limit threshold tolerance. The analysis focussed only on the TPS2552/53 and TPS2552-1/53-1 performance and assumed an exact resistor value. However, resistors sold in quantity are not exact and are bounded by an upper and lower tolerance centered around a nominal resistance. The additional RILIM resistance tolerance directly affects the current-limit threshold accuracy at a system level. The following table shows a process that accounts for worst-case resistor tolerance assuming 1% resistor values. Step one follows the selection process outlined in the application examples above. Step two determines the upper and lower resistance bounds of the selected resistor. Step three uses the upper and lower resistor bounds in the IOS equations to calculate the threshold limits. It is important to use tighter tolerance resistors, e.g. 0.5% or 0.1%, when precision current limiting is desired. Table 1. Common RILIM Resistor Selections Ideal Resistor (kΩ) Closest 1% Resistor (kΩ) 120 226.1 226 200 134.0 300 400 Desired Nominal Current Limit (mA) Resistor Tolerance Actual Limits 1% high (kΩ) IOS MIN (mA) IOS Nom (mA) IOS MAX (mA) 223.7 228.3 50.0 75.0 100.0 101.3 120.0 133 131.7 134.3 142.1 173.7 201.5 233.9 88.5 88.7 87.8 65.9 66.5 65.8 89.6 262.1 299.4 342.3 67.2 351.2 396.7 500 52.5 52.3 448.7 51.8 52.8 448.3 501.6 562.4 600 43.5 700 37.2 43.2 42.8 43.6 544.3 604.6 673.1 37.4 37.0 37.8 630.2 696.0 800 770.8 32.4 32.4 32.1 32.7 729.1 800.8 882.1 75 1% low (kΩ) SHORT ILIM to IN 900 28.7 28.7 28.4 29.0 824.7 901.5 988.7 1000 25.8 26.1 25.8 26.4 908.3 989.1 1081.0 1100 23.4 23.2 23.0 23.4 1023.7 1109.7 1207.5 1200 21.4 21.5 21.3 21.7 1106.0 1195.4 1297.1 1300 19.7 19.6 19.4 19.8 1215.1 1308.5 1414.9 CONSTANT-CURRENT VS. LATCH-OFF OPERATION AND IMPACT ON OUTPUT VOLTAGE Both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically during normal operation, i.e. the load current is less than the current-limit threshold and the devices are not limiting current. During normal operation the N-channel MOSFET is fully enhanced, and VOUT = VIN - (IOUT x rDS(on)). The voltage drop across the MOSFET is relatively small compared to VIN, and VOUT ≈ VIN. Both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically during the initial onset of an overcurrent event. Both devices limit current to the programmed current-limit threshold set by RILIM by operating the N-channel MOSFET in the linear mode. During current-limit operation, the N-channel MOSFET is no longer fully-enhanced and the resistance of the device increases. This allows the device to effectively regulate the current to the current-limit threshold. The effect of increasing the resistance of the MOSFET is that the voltage drop across the device is no longer negligible (VIN ≠ VOUT), and VOUT decreases. The amount that VOUT decreases is proportional to the magnitude of the overload condition. The expected VOUT can be calculated by IOS × RLOAD, where IOS is the current-limit threshold and RLOAD is the magnitude of the overload condition. For example, if IOS is programmed to 1 A and a 1 Ω overload condition is applied, the resulting VOUT is 1 V. While both the constant-current devices (TPS2552/53) and latch-off devices (TPS2552-1/53-1) operate identically during the initial onset of an overcurrent event, they behave differently if the overcurrent event lasts longer than the internal delay "deglitch" circuit (7.5-ms typ). The constant-current devices (TPS2552/53) assert the FAULT flag after the deglitch period and continue to regulate the current to the current-limit threshold indefinitely. In practical circuits, the power dissipation in the package will increase the die temperature above the overtemperature shutdown threshold (135°C min), and the device will turn off until the die temperature decreases by the hysteresis of the thermal shutdown circuit (10°C typ). The device will turn on and continue to thermal cycle 16 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 until the overload condition is removed. The constant-current devices resume normal operation once the overload condition is removed. The latch-off devices (TPS2552-1/53-1) assert the FAULT flag after the deglitch period and immediately turn off the device. The device remains off regardless of whether the overload condition is removed from the output. The latch-off devices remain off and do not resume normal operation until the surrounding system either toggles the enable or cycles power to the device. POWER DISSIPATION AND JUNCTION TEMPERATURE The low on-resistance of the N-channel MOSFET allows small surface-mount packages to pass large currents. It is good design practice to estimate power dissipation and junction temperature. The below analysis gives an approximation for calculating junction temperature based on the power dissipation in the package. However, it is important to note that thermal analysis is strongly dependent on additional system level factors. Such factors include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating power. Good thermal design practice must include all system level factors in addition to individual component analysis. Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on) from the typical characteristics graph. Using this value, the power dissipation can be calculated by: PD = rDS(on) × IOUT2 Where: PD = Total power dissipation (W) rDS(on) = Power switch on-resistance (Ω) IOUT = Maximum current-limit threshold (A) This step calculates the total power dissipation of the N-channel MOSFET. Finally, calculate the junction temperature: TJ = PD ×θJA + TA Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 17 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com Where: TA = Ambient temperature (°C) θJA = Thermal resistance (°C/W) PD = Total power dissipation (W) Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board layout. The Dissipating Rating Table provides example thermal resistances for specific packages and board layouts. UNIVERSAL SERIAL BUS (USB) POWER-DISTRIBUTION REQUIREMENTS One application for this device is for current limiting in universal serial bus (USB) applications. The original USB interface was a 12-Mb/s or 1.5-Mb/s, multiplexed serial bus designed for low-to-medium bandwidth PC peripherals (e.g., keyboards, printers, scanners, and mice). As the demand for more bandwidth increased, the USB 2.0 standard was introduced increasing the maximum data rate to 480-Mb/s. The four-wire USB interface is conceived for dynamic attach-detach (hot plug-unplug) of peripherals. Two lines are provided for differential data, and two lines are provided for 5-V power distribution. USB data is a 3.3-V level signal, but power is distributed at 5 V to allow for voltage drops in cases where power is distributed through more than one hub across long cables. Each function must provide its own regulated 3.3 V from the 5-V input or its own internal power supply. The USB specification classifies two different classes of devices depending on its maximum current draw. A device classified as low-power can draw up to 100 mA as defined by the standard. A device classified as high-power can draw up to 500 mA. It is important that the minimum current-limit threshold of the current-limiting power-switch exceed the maximum current-limit draw of the intended application. The latest USB standard should always be referenced when considering the current-limit threshold The USB specification defines two types of devices as hubs and functions. A USB hub is a device that contains multiple ports for different USB devices to connect and can be self-powered (SPH) or bus-powered (BPH). A function is a USB device that is able to transmit or receive data or control information over the bus. A USB function can be embedded in a USB hub. A USB function can be one of three types included in the list below. • Low-power, bus-powered function • High-power, bus-powered function • Self-powered function SPHs and BPHs distribute data and power to downstream functions. The TPS2552/53 has higher current capability than required for a single USB port allowing it to power multiple downstream ports. 18 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 SELF-POWERED AND BUS-POWERED HUBS A SPH has a local power supply that powers embedded functions and downstream ports. This power supply must provide between 4.75 V to 5.25 V to downstream facing devices under full-load and no-load conditions. SPHs are required to have current-limit protection and must report overcurrent conditions to the USB controller. Typical SPHs are desktop PCs, monitors, printers, and stand-alone hubs. A BPH obtains all power from an upstream port and often contains an embedded function. It must power up with less than 100 mA. The BPH usually has one embedded function, and power is always available to the controller of the hub. If the embedded function and hub require more than 100 mA on power up, the power to the embedded function may need to be kept off until enumeration is completed. This is accomplished by removing power or by shutting off the clock to the embedded function. Power switching the embedded function is not necessary if the aggregate power draw for the function and controller is less than 100 mA. The total current drawn by the bus-powered device is the sum of the current to the controller, the embedded function, and the downstream ports, and it is limited to 500 mA from an upstream port. LOW-POWER BUS-POWERED AND HIGH-POWER BUS-POWERED FUNCTIONS Both low-power and high-power bus-powered functions obtain all power from upstream ports. Low-power functions always draw less than 100 mA; high-power functions must draw less than 100 mA at power up and can draw up to 500 mA after enumeration. If the load of the function is more than the parallel combination of 44 Ω and 10 µF at power up, the device must implement inrush current limiting. USB POWER-DISTRIBUTION REQUIREMENTS USB can be implemented in several ways regardless of the type of USB device being developed. Several power-distribution features must be implemented. • SPHs must: – Current limit downstream ports – Report overcurrent conditions • BPHs must: – Enable/disable power to downstream ports – Power up at <100 mA – Limit inrush current (<44 Ω and 10 µF) • Functions must: – Limit inrush currents – Power up at <100 mA The feature set of the TPS2552/53 and TPS2552-1/53-1 meets each of these requirements. The integrated current limiting and overcurrent reporting is required by self-powered hubs. The logic-level enable and controlled rise times meet the need of both input and output ports on bus-powered hubs and the input ports for bus-powered functions. Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 19 TPS2552 TPS2553, TPS2552-1, TPS2553-1 SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008........................................................................................................................................ www.ti.com AUTO-RETRY FUNCTIONALITY Some applications require that an overcurrent condition disables the part momentarily during a fault condition and re-enables after a pre-set time. This auto-retry functionality can be implemented with an external resistor and capacitor. During a fault condition, FAULT pulls low disabling the part. The part is disabled when EN is pulled low, and FAULT goes high impedance allowing CRETRY to begin charging. The part re-enables when the voltage on EN reaches the turnon threshold, and the auto-retry time is determined by the resistor/capacitor time constant. The part will continue to cycle in this manner until the fault condition is removed. TPS2553 0.1 mF Input Output IN OUT RLOAD RFAULT CLOAD 100 kW ILIM FAULT GND EN RILIM 20 kW CRETRY Power Pad 0.1 mF Figure 25. Auto-Retry Functionality Some applications require auto-retry functionality and the ability to enable/disable with an external logic signal. The figure below shows how an external logic signal can drive EN through RFAULT and maintain auto-retry functionality. The resistor/capacitor time constant determines the auto-retry time-out period. TPS2553 Input 0.1 mF Output IN OUT RLOAD CLOAD External Logic Signal & Driver RFAULT 100 kW ILIM RILIM FAULT 20 kW GND EN CRETRY 0.1 mF Power Pad Figure 26. Auto-Retry Functionality With External EN Signal 20 Submit Documentation Feedback Copyright © 2008, Texas Instruments Incorporated Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 TPS2552 TPS2553, TPS2552-1, TPS2553-1 www.ti.com........................................................................................................................................ SLVS841A – NOVEMBER 2008 – REVISED DECEMBER 2008 TWO-LEVEL CURRENT-LIMIT CIRCUIT Some applications require different current-limit thresholds depending on external system conditions. Figure 27 shows an implementation for an externally controlled, two-level current-limit circuit. The current-limit threshold is set by the total resistance from ILIM to GND (see previously discussed "Programming the Current-Limit Threshold" section). A logic-level input enables/disables MOSFET Q1 and changes the current-limit threshold by modifying the total resistance from ILIM to GND. Additional MOSFET/resistor combinations can be used in parallel to Q1/R2 to increase the number of additional current-limit levels. NOTE: ILIM should never be driven directly with an external signal. Input 0.1 mF Output IN OUT RFAULT 100 kW CLOAD R1 210 kW ILIM Fault Signal FAULT Control Signal RLOAD R2 22.1 kW GND EN Power Pad Q1 2N7002 Current Limit Control Signal Figure 27. Two-Level Current-Limit Circuit Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TPS2552 TPS2553 TPS2552-1 TPS2553-1 21 PACKAGE OPTION ADDENDUM www.ti.com 16-Dec-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TPS2552DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2552DBVR-1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2552DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2552DBVT-1 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2552DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2552DRVR-1 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2552DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2552DRVT-1 ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DBVR ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DBVR-1 ACTIVE SOT-23 DBV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DBVT ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DBVT-1 ACTIVE SOT-23 DBV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DRVR ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DRVR-1 ACTIVE SON DRV 6 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DRVT ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TPS2553DRVT-1 ACTIVE SON DRV 6 250 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 16-Dec-2008 (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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