SPN860018/RF022 Micrel SPN860018 300-440MHz QwikRadio™ASK Receiver Final Information General Description The SPN860018 is a single chip ASK/OOK (ON-OFF Keyed) RF receiver IC. This device is a true “antenna-in to data-out” monolithic device. All RF and IF tuning is accomplished automatically within the IC which eliminates manual tuning and reduces production costs. The result is a highly reliable yet low cost solution. The SPN860018 is a fully featured part in 16-pin packaging, the MICRF022 is the same part packaged in 8-pin packaging with a reduced feature set (see “Ordering Information” for more information). The SPN860018 is an enhanced version of the MICRF001 and MICRF011. The SPN860018 provides two additional functions over the MICRF001/011, (1) a Shutdown pin, which may be used to turn the device off for duty-cycled operation, and (2) a “Wake-up” output, which provides an output flag indicating when an RF signal is present. These features make the SPN860018 ideal for low and ultra-low power applications, such as RKE and remote controls. All IF filtering and post-detection (demodulator) data filtering is provided within the SPN860018, so no external filters are necessary. One of four demodulator filter bandwidths may be selected externally by the user. The SPN860018 offer two modes of operation; fixed-mode (FIX) and sweep-mode (SWP). In fixed mode the SPN860018 functions as a conventional superhet receiver. In sweep mode the SPN860018 employs a patented sweeping function to sweep a wider RF spectrum. Fixed-mode provides better selectivity and sensitivity performance and sweep mode enables the SPN860018 to be used with low cost, imprecise transmitters. QwikRadio™ Features • 300MHz to 440MHz frequency range • Data-rate up to 10kbps (fixed-mode) • Low Power Consumption • 2.2mA fully operational (315MHz) • 0.9µA in shutdown • 220µA in polled operation (10:1 duty-cycle) • Wake-up output flag to enable decoders and microprocessors • Very low RF reradiation at the antenna • Highly integrated with extremely low external part count Applications • • • • Automotive Remote Keyless Entry (RKE) Remote controls Remote fan and light control Garage door and gate openers Typical Application 1/4 Wave Monopole SPN860018 SEL0 SEL0 12pF 68nH +5V REFOSC VSSRF SEL1 ANT VDDRF WAKEB VDDBB SHUT CTH 12nH 0.047uF SWEN VSSRF NC 4.8970MHz CAGC 4.7uF DO Data Output VSSBB 315MHz 800bps On-Off Keyed Receiver QwikRadio is a trademark of Micrel, Inc. The QwikRadio ICs were developed under a partnership agreement with AIT of Orlando, Florida. Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com March 2003 1 SPN860018/RF022 SPN860018/RF022 Micrel Ordering Information Part Number Demodulator Bandwidth Operating Mode Shutdown WAKEB Output Flag Package MICRF002BM User Programable Fixed or Sweep Yes Yes 16-Pin SOP MICRF022BM-SW48 5000Hz Sweep No Yes 8-Pin SOP MICRF022BM-FS12 1250Hz Fixed Yes No 8-Pin SOP MICRF022BM-FS24 2500Hz Fixed Yes No 8-Pin SOP MICRF022BM-FS48 5000Hz Fixed Yes No 8-Pin SOP Pin Configuration SPN860018Bx SEL0 1 SEL0 16 SWEN VSSRF 2 15 REFOSC VSSRF 3 14 SEL1 ANT 4 MICRF022Bx-xxxx 13 CAGC VDDRF 5 12 WAKEB VDDBB 6 11 SHUT CTH 7 VSSRF 1 8 REFOSC ANT 2 7 CAGC VDDRF 3 6 SHUT/WAKEB CTH 4 5 DO 10 DO NC 8 9 VSSBB Standard 16-Pin or 8-Pin SOP (M) Packages 8-Pin Options The standard 16-pin package allows complete control of all configurable features. Some reduced function 8-pin versions are also available, see “Ordering Information” above. For high-volume applications additional customized 8-pin devices can be produced. SWEN, SEL0 and SEL1 pins are internally bonded to reduce the pin count. pin 6 may be configured as either SHUT or WAKEB. SEL0 SEL1 1 1 Demodulator Bandwidth Sweep Mode FIXED Mode 5000Hz 10000Hz 0 1 2500Hz 5000Hz 1 0 1250Hz 2500Hz 0 0 625Hz 1250Hz Table 1. Nominal Demodulator Filter Bandwidth vs. SEL0, SEL1 and Operating Mode SPN860018/RF022 2 March 2003 SPN860018/RF022 Micrel Pin Description Pin Number 16-Pin Pkg. Pin Number 8-Pin Pkg. 1 Pin Name SEL0 Pin Function Bandwidth Selection Bit 0 (Digital Input): Used in conjunction with SEL1 to set the desired demodulator filter bandwidth. See Table 1. Internally pulledup to VDDRF 2, 3 1 VSSRF 4 2 ANT 5 3 VDDRF RF Power Supply: Positive supply input for the RF section of the IC VDDBB Base-Band Power Supply: Positive supply input for the baseband section (digital section) of the IC 6 7 4 CTH 8 NC 9 VSSBB 10 5 DO 11 6 SHUT 12 13 WAKEB 7 14 15 16 March 2003 8 RF Power Supply: Ground return to the RF section power supply. Antenna (Analog Input): For optimal performance the ANT pin should be impedance matched to the antenna. See “Applications Information” for information on input impedance and matching techniques Data Slicing Threshold Capacitor (Analog I/O): Capacitor connected to this pin extracts the dc average value from the demodulated waveform which becomes the reference for the internal data slicing comparator Not internally connected Base-Band Power Supply: Ground return to the baseband section power supply Data Output (Digital Output) Shutdown (Digital Input): Shutdown-mode logic-level control input. Pull low to enable the receiver. Internally pulled-up to VDDRF Wakeup (Digital Output): Active-low output that indicates detection of an incoming RF signal CAGC Automatic Gain Control (Analog I/O): Connect an external capacitor to set the attack/decay rate of the on-chip automatic gain control SEL1 Bandwidth Selection Bit 1 (Digital Input): Used in conjunction with SEL0 to set the desired demodulator filter bandwidth. See Table 1. Internally pulledup to VDDRF REFOSC SWEN Reference Oscillator: Timing reference, sets the RF receive frequency. Sweep-Mode Enable (Digital Input): Sweep- or Fixed-mode operation control input. SWEN high= sweep mode; SWEN low = conventional superheterodyne receiver. Internally pulled-up to VDDRF 3 SPN860018/RF022 SPN860018/RF022 Micrel Absolute Maximum Ratings (Note 1) Operating Ratings (Note 2) Supply Voltage (VDDRF, VDDBB) .................................... +7V Input/Output Voltage (VI/O) ................. VSS–0.3 to VDD+0.3 Junction Temperature (TJ) ...................................... +150°C Storage Temperature Range (TS) ............ –65°C to +150°C Lead Temperature (soldering, 10 sec.) ................... +260°C ESD Rating, Note 3 Supply Voltage (VDDRF, VDDBB) ................ +4.75V to +5.5V RF Frequency Range ............................. 300MHz to 440Hz Data Duty-Cycle ............................................... 20% to 80% Reference Oscillator Input Range ............ 0.1VPP to 1.5VPP Ambient Temperature (TA) ......................... –40°C to +85°C Electrical Characteristics VDDRF = VDDBB = VDD where +4.75V ≤ VDD ≤ 5.5V, VSS = 0V; CAGC = 4.7µF, CTH = 100nF; SEL0 = SEL1 = VSS; fixed mode ( SWEN = VSS); fREFOSC = 4.8970MHz (equivalent to fRF = 315MHz); data-rate = 1kbps (Manchester encoded). TA = 25°C, bold values indicate –40°C ≤ TA ≤ +85°C; current flow into device pins is positive; unless noted. Symbol Parameter Condition IOP Operating Current ISTBY Standby Current Min Typ Max Units continuous operation, fRF = 315MHz 2.2 3.2 mA polled with 10:1 duty cycle, fRF = 315MHz 220 µA continuous operation, fRF = 433.92MHz 3.5 mA polled with 10:1 duty cycle, fRF = 433.92MHz 350 µA VSHUT = VDD 0.9 µA fRF = 315MHz –97 dBm fRF = 433.92MHz –95 dBm RF Section, IF Section Receiver Sensitivity (Note 4) fIF IF Center Frequency Note 6 0.86 MHz fBW IF Bandwidth Note 6 0.43 MHz Maximum Receiver Input RSC = 50Ω –20 dBm Spurious Reverse Isolation ANT pin, RSC = 50Ω, Note 5 30 µVrms AGC Attack to Decay Ratio tATTACK ÷ tDECAY 0.1 AGC Leakage Current TA = +85°C ±100 nA Note 8 290 kΩ 5.2 uA Reference Oscillator ZREFOSC Reference Oscillator Input Impedance Reference Oscillator Source Current Demodulator ZCTH CTH Source Impedance Note 7 145 kΩ IZCTH(leak) CTH Leakage Current TA = +85°C ±100 nA Demodulator Filter Bandwidth Sweep Mode (SWEN = VDD or OPEN) Note 6 VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 = VDD = VDD = VSS = VSS 4000 2000 1000 500 Hz Hz Hz Hz Demodulator Filter Bandwidth Fixed Mode (SWEN = VSS Note 6 VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 VSEL0 = VDD. VSEL1 VSEL0 = VSS. VSEL1 = VDD = VDD = VSS = VSS 8000 4000 2000 1000 Hz Hz Hz Hz SPN860018/RF022 4 March 2003 SPN860018/RF022 Symbol Parameter Micrel Condition Min Typ Max Units 0.8 VDD Digital/Control Section VIN(high) Input-High Voltage SEL0, SEL1, SWEN VIN(low) Input-Low Voltage SEL0, SEL1, SWEN IOUT Output Current DO, WAKEB pins, push-pull VOUT(high) Output High Voltage DO, WAKEB pins, IOUT = –1µA VOUT(low) Output Low Voltage DO, WAKEB pins, IOUT = +1µA tR, tF Output Rise and Fall Times DO, WAKEB pins, CLOAD = 15pF 0.2 VDD µA 10 0.9 VDD 0.1 10 VDD µs Note 1. Exceeding the absolute maximum rating may damage the device. Note 2. The device is not guaranteed to function outside its operating rating. Note 3. Devices are ESD sensitive, use appropriate ESD precautions. Meets class 1 ESD test requirements, (human body model HBM), in accordance with MIL-STD-883C, method 3015. Do not operate or store near strong electrostatic fields. Note 4: Sensitivity is defined as the average signal level measured at the input necessary to achieve 10-2 BER (bit error rate). The RF input is assumed to be matched to 50Ω. Note 5: Spurious reverse isolation represents the spurious components which appear on the RF input pin (ANT) measured into 50Ω with an input RF matching network. Note 6: Parameter scales linearly with reference oscillator frequency fT. For any reference oscillator frequency other than 4.8970MHz, compute new parameter value as the ratio: fREFOSCMHz × (parameter value at 4.8970MHz) 4.8970MHz Note 7: Parameter scales inversely with reference oscillator frequency fT. For any reference oscillator frequency other than 4.8970MHz, compute new parameter value as the ratio: 4.8970MHz × (parameter value at 4.8970MHz) fREFOSCMHz Note 8: Series resistance of the resonator (ceramic resonator or crystal) should be minimized to the extent possible. In cases where the resonator series resistance is too great, the oscillator may oscillate at a diminished peak-to-peak level, or may fail to oscillate entirely. Micrel recommends that series resistances for ceramic resonators and crystals not exceed 50Ohms and 100Ohms respectively. Refer to Application Hint 35 for crystal recommendations. March 2003 5 SPN860018/RF022 SPN860018/RF022 Micrel Typical Characteristics Supply Current vs. Frequency 6.0 CURRENT (mA) CURRENT (mA) TA = 25°C VDD = 5V 4.5 3.0 Sweep Mode, Continuous Operation 1.5 250 300 350 400 450 FREQUENCY (MHz) SPN860018/RF022 Supply Current vs. Temperature 3.5 500 3.0 f = 315MHz VDD = 5V 2.5 2.0 Sweep Mode, Continuous Operation 1.5 -40 -20 0 20 40 60 80 100 TEMPERATURE (°C) 6 March 2003 SPN860018/RF022 Micrel Functional Diagram CAGC AGC Control CAGC ANT 2nd Order Programmable Low-Pass Filter 5th Order Band-Pass Filter RF Amp f RX fIF IF Amp IF Amp SwitchedCapacitor Resistor Peak Detector RSC fLO 430kHz Comparator VDD VSS DO CTH Programmable Synthesizer UHF Downconverter OOK Demodulator CTH SEL0 SEL1 SWEN Control Logic WAKEB Resettable Counter SHUT fT REFOSC Cystal or Ceramic MICRF002 Resonator Reference Oscillator Reference and Control Wakeup Figure 1. SPN860018 Block Diagram Applications Information and Functional Description 5). Select the demodulator filter bandwidth Refer to figure 1 “SPN860018 Block Diagram”. Identified in the block diagram are the four sections of the IC: UHF Downconverter, OOK Demodulator, Reference and Control, and Wakeup. Also shown in the figure are two capacitors (CTH, CAGC) and one timing component, usually a crystal or ceramic resonator. With the exception of a supply decoupling capacitor, and antenna impedance matching network, these are the only external components needed by the SPN860018 to assemble a complete UHF receiver. For optimal performance is highly recommended that the SPN860018 is impedance matched to the antenna, the matching network will add an additional two or three components. Four control inputs are shown in the block diagram: SEL0, SEL1, SWEN, and SHUT. Using these logic inputs, the user can control the operating mode and selectable features of the IC. These inputs are CMOS compatible, and are internally pulled-up. IF Bandpass Filter Roll-off response of the IF Filter is 5th order, while the demodulator data filter exhibits a 2nd order response. Fixed-Mode Operation For applications where the transmit frequency is accurately set (that is, applications where a SAW or crystal-based transmitter is used) the SPN860018 may be configured as a standard superheterodyne receiver (fixed mode). In fixedmode operation the RF bandwidth is narrower making the receiver less susceptible to interfering signals. Fixed mode is selected by connecting SWEN to ground. Sweep-Mode Operation When used in conjunction with low-cost L-C transmitters the SPN860018 should be configured in sweep-mode. In sweepmode, while the topology is still superheterodyne, the LO (local oscillator) is swept over a range of frequencies at rates greater than the data rate. This technique effectively increases the RF bandwidth of the SPN860018, allowing the device to operate in applications where significant transmitter-receiver frequency misalignment may exist. The transmit frequency may vary up to ±0.5% over initial tolerance, aging, and temperature. In sweep-mode a band approximately 1.5% around the nominal transmit frequency is captured. The transmitter may drift up to ±0.5% without the need to retune the receiver and without impacting system performance. The swept-LO technique does not affect the IF bandwidth, therefore noise performance is not degraded relative to fixed mode. The IF bandwidth is 430kHz whether the device is operating in fixed or sweep-mode. Due to limitations imposed by the LO sweeping process, the upper limit on data rate in sweep mode is approximately 5.0kbps. Similar performance is not currently available with crystalbased superheterodyne receivers which can operate only with SAW- or crystal-based transmitters. Step 1: Selecting The Operating Mode Design Steps The following steps are the basic design steps for using the SPN860018 receiver: 1). Select the operating mode (sweep or fixed) 2). Select the reference oscillator 3). Select the CTH capacitor 4). Select the CAGC capacitor March 2003 7 SPN860018/RF022 SPN860018/RF022 Micrel In sweep-mode, a range reduction will occur in installations where there is a strong interferer in the swept RF band. This is because the process indiscriminately includes all signals within the sweep range. An SPN860018 may be used in place of a superregenerative receiver in most applications. Frequency fT is in MHz. Connect a crystal of frequency fT to REFOSC on the SPN860018. Four-decimal-place accuracy on the frequency is generally adequate. The following table identifies fT for some common transmit frequencies when the SPN860018 is operated in fixed mode. Step 2: Selecting The Reference Oscillator All timing and tuning operations on the SPN860018 are derived from the internal Colpitts reference oscillator. Timing and tuning is controlled through the REFOSC pin in one of three ways: 1. Connect a ceramic resonator 2. Connect a crystal 3. Drive this pin with an external timing signal The specific reference frequency required is related to the system transmit frequency and to the operating mode of the receiver as set by the SWEN pin. Crystal or Ceramic Resonator Selection Do not use resonators with integral capacitors since capacitors are included in the IC, also care should be taken to ensure low ESR capacitors are selected. Application Hint 34 and Application Hint 35 provide additional information and recommended sources for crystals and resonators. If operating in fixed-mode, a crystal is recommended. In sweep-mode either a crystal or ceramic resonator may be used. When a crystal of ceramic resonator is used the minimum voltage is 300mVPP. If using an externally applied signal it should be AC-coupled and limited to the operating range of 0.1VPP to 1.5VPP. Selecting Reference Oscillator Frequency fT (Fixed Mode) As with any superheterodyne receiver, the mixing between the internal LO (local oscillator) frequency fLO and the incoming transmit frequency fTX ideally must equal the IF center frequency. Equation 1 may be used to compute the appropriate fLO for a given fTX: (1) fLO = fTX Transmit Frequency fTX Reference Oscillator Frequency fT 315MHz 4.8970MHz 390MHz 6.0630MHz 418MHz 6.4983MHz 433.92MHz 6.7458MHz Table 2. Fixed Mode Recommended Reference Oscillator Values For Typical Transmit Frequencies (high-side mixing) Selecting REFOSC Frequency fT (Sweep Mode) Selection of the reference oscillator frequency fT in sweep mode is much simpler than in fixed mode due to the LO sweeping process. Also, accuracy requirements of the frequency reference component are significantly relaxed. In sweep mode, fT is given by Equation 3: (3) fT = fLO 64.25 In SWEEP mode a reference oscillator with frequency accurate to two-decimal-places is generally adequate. A crystal may be used and may be necessary in some cases if the transmit frequency is particularly imprecise. f ± 0.86 TX 315 Transmit Frequency fTX Reference Oscillator Frequency fT 315MHz 4.88MHz 390MHz 6.05MHz 418MHz 6.48MHz 433.92MHz 6.73MHz Table 3. Recommended Reference Oscillator Values For Typical Transmit Frequencies (sweep-mode) Frequencies fTX and fLO are in MHz. Note that two values of fLO exist for any given fTX, distinguished as “high-side mixing” and “low-side mixing.” High-side mixing results in an image frequency above the frequency of interest and low-side mixing results in a frequency below. After choosing one of the two acceptable values of fLO, use Equation 2 to compute the reference oscillator frequency fT: (2) f fT = LO 64.5 SPN860018/RF022 8 March 2003 SPN860018/RF022 Micrel Selecting CAGC Capacitor in Continuous Mode A CAGC capacitor in the range of 0.47µF to 4.7µF is typically recommended. The value of the CAGC should be selected to minimize the ripple on the AGC control voltage by using a sufficiently large capacitor. However if the capacitor is too large the AGC may react too slowly to incoming signals. AGC settling time from a completely discharged (zero-volt) state is given approximately by Equation 6: Step 3: Selecting The CTH Capacitor Extraction of the dc value of the demodulated signal for purposes of logic-level data slicing is accomplished using the external threshold capacitor CTH and the on-chip switchedcapacitor “resistor” RSC, shown in the block diagram. Slicing level time constant values vary somewhat with decoder type, data pattern, and data rate, but typically values range from 5ms to 50ms. Optimization of the value of CTH is required to maximize range. Selecting Capacitor CTH The first step in the process is selection of a data-slicing-level time constant. This selection is strongly dependent on system issues including system decode response time and data code structure (that is, existence of data preamble, etc.). This issue is covered in more detail in Application Note 22. The effective resistance of RSC is listed in the electrical characteristics table as 145kΩ at 315MHz, this value scales linearly with frequency. Source impedance of the CTH pin at other frequencies is given by equation (4), where fT is in MHz: (4) RSC = 145kΩ (6) where: CAGC is in µF, and ∆t is in seconds. Selecting CAGC Capacitor in Duty-Cycle Mode Voltage droop across the CAGC capacitor during shutdown should be replenished as quickly as possible after the IC is enabled. As mentioned above, the SPN860018 boosts the push-pull current by a factor of 45 immediately after start-up. This fixed time period is based on the reference oscillator frequency fT. The time is 10.9ms for fT = 6.00MHz, and varies inversely with fT. The value of CAGC capacitor and the duration of the shutdown time period should be selected such that the droop can be replenished within this 10ms period. Polarity of the droop is unknown, meaning the AGC voltage could droop up or down. Worst-case from a recovery standpoint is downward droop, since the AGC pull-up current is 1/10th magnitude of the pulldown current. The downward droop is replenished according to the Equation 7: 4.8970 fT τ of 5x the bit-rate is recommended. Assuming that a slicing level time constant τ has been established, capacitor CTH may be computed using equation (5) C TH = τ RSC (7) A standard ±20% X7R ceramic capacitor is generally sufficient. Refer to Application Hint 42 for CTH and CAGC selection examples. ∆V I = ∆t C AGC where: I = AGC pullup current for the initial 10ms (67.5µA) CAGC = AGC capacitor value ∆t = droop recovery time ∆V = droop voltage For example, if user desires ∆t = 10ms and chooses a 4.7µF CAGC, then the allowable droop is about 144mV. Using the same equation with 200nA worst case pin leakage and assuming 1µA of capacitor leakage in the same direction, the maximum allowable ∆t (shutdown time) is about 0.56s for droop recovery in 10ms. The ratio of decay-to-attack time-constant is fixed at 10:1 (that is, the attack time constant is 1/10th of the decay time constant). Generally the design value of 10:1 is adequate for the vast majority of applications. If adjustment is required the constant may be varied by adding a resistor in parallel with the CAGC capacitor. The value of the resistor must be determined on a case by case basis. Step 4: Selecting The CAGC Capacitor The signal path has AGC (automatic gain control) to increase input dynamic range. The attack time constant of the AGC is set externally by the value of the CAGC capacitor connected to the CAGC pin of the device. To maximize system range, it is important to keep the AGC control voltage ripple low, preferably under 10mVpp once the control voltage has attained its quiescent value. For this reason capacitor values of at least 0.47µF are recommended. The AGC control voltage is carefully managed on-chip to allow duty-cycle operation of the SPN860018. When the device is placed into shutdown mode (SHUT pin pulled high), the AGC capacitor floats to retain the voltage. When operation is resumed, only the voltage droop due to capacitor leakage must be replenished. A relatively low-leakage capacitor is recommended when the devices are used in dutycycled operation. To further enhance duty-cycled operation, the AGC push and pull currents are boosted for approximately 10ms immediately after the device is taken out of shutdown. This compensates for AGC capacitor voltage droop and reduces the time to restore the correct AGC voltage. The current is boosted by a factor of 45. March 2003 ∆t = 1.333C AGC − 0.44 Step 5: Selecting The Demod Filter Bandwidth The inputs SEL0 and SEL1 control the demodulator filter bandwidth in four binary steps (625Hz to 5000Hz in sweep, 1250Hz to 10000Hz in fixed mode), see Table 1. Bandwidth must be selected according to the application. The demodulator bandwidth should be set according to equation 8. 9 SPN860018/RF022 SPN860018/RF022 Micrel (8) Demoulator bandwidth = 0.65 / Shortest pulse-width It should be noted that the values indicated in table 1 are nominal values. The filter bandwidth scales linearly with frequency so the exact value will depend on the operating frequency. Refer to the “Electrical Characteristics” for the exact filter bandwidthat a chosen frequency. SEL0 SEL1 1 1 Demodulator Bandwidth Sweep Mode FIXED Mode 5000Hz 10000Hz 0 1 2500Hz 5000Hz 1 0 1250Hz 2500Hz 0 0 625Hz 1250Hz Table 1. Nominal Demodulator Filter Bandwidth vs. SEL0, SEL1 and Operating Mode SPN860018/RF022 10 March 2003 SPN860018/RF022 Micrel Additional Applications Information In addition to the basic operation of the SPN860018 the following enhancements can be made. In particilar it is strongly recommended that the antenna impedance is matched to the input of the IC. Antenna Impedance Matching As shown in table 4 the antenna pin input impedance is frequency dependant. The ANT pin can be matched to 50 Ohms with an L-type circuit. That is, a shunt inductor from the RF input to ground and another in series from the RF input to the antenna pin. Inductor values may be different from table depending on PCB material, PCB thickness, ground configuration, and how long the traces are in the layout. Values shown were characterized for a 0.031 thickness, FR4 board, solid ground plane on bottom layer, and very short traces. MuRata and Coilcraft wire wound 0603 or 0805 surface mount inductors were tested, however any wire wound inductor with high SRF (self resonance frequency) should do the job. Shutdown Function Duty-cycled operation of the SPN860018 (often referred to as polling) is achieved by turning the SPN860018 on and off via the SHUT pin. The shutdown function is controlled by a logic state applied to the SHUT pin. When VSHUT is high, the device goes into low-power standby mode. This pin is pulled high internally, it must be externally pulled low to enable the receiver. LSERIES LSHUNT –j25 March 2003 S11 LSHUNT (nH) LSERIES (nH) 300 12– j166 0.803– j0.529 15 72 305 12– j165 0.800– j0.530 15 72 310 12 – j163 0.796– j0.536 15 72 315 13 – j162 0.791– j0.536 15 72 320 12 – j160 0.789– j0.543 15 68 325 12 – j157 0.782– j0.550 12 68 330 12 - j155 0.778– j0.556 12 68 335 12 – j152 0.770– j0.564 12 68 340 11 - j150 0.767– j0.572 15 56 345 11 – j148 0.762– j0.578 15 56 350 11 – j145 0.753– j0.586 12 56 355 11 – j143 0.748– j0.592 12 56 360 11 – j141 0.742– j0.597 10 56 365 11 – j139 0.735– j0.603 10 56 370 10 – 137 0.732– j0.612 12 47 375 10 – j135 0.725– j0.619 12 47 380 10 – j133 0.718– j0.625 10 47 385 10 – j131 0.711– j0.631 10 47 390 10 – j130 0.707– j0.634 10 43 395 10 – j128 0.700– j0.641 10 43 400 10 – j126 0.692– j0.647 10 43 405 10 – j124 0.684– j0.653 10 39 410 10 – j122 0.675– j0.660 10 39 415 10 – j120 0.667– j0.667 10 39 420 10 – j118 0.658– j0.673 10 36 425 10 – j117 0.653– j0.677 10 36 430 10 – j115 0.643– j0.684 10 33 435 10 – j114 0.638– j0.687 10 33 440 8 – j112 0.635– j0.704 8.2 33 ∞ 50 0 ZIN( ) Z11 Table 4. Input Impedance Versus Frequency j100 j25 Frequency (MHz) –j100 11 SPN860018/RF022 SPN860018/RF022 Micrel Power Supply Bypass Capacitors VDDBB and VDDRF should be connected together directly at the IC pins. Supply bypass capacitors are strongly recommended. They should be connected to VDDBB and VDDRF and should have the shortest possible lead lengths. For best performance, connect VSSRF to VSSBB at the power supply only (that is, keep VSSBB currents from flowing through the VSSRF return path). Increasing Selectivity With an Optional BandPass Filter For applications located in high ambient noise environments, a fixed value band-pass network may be connected between the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. A minimum input configuration is included in figure 7a. it provides some filtering and necessary overload protection. Data Squelching During quiet periods (no signal) the data output (DO pin) transitions randomly with noise. Most decoders can descriminate between this random noise and actual data but for some system it does present a problem. There are three possible approaches to reducing this output noise: 1). Analog squelch to raise the demodulator threshold 2). Digital squelch to disable the output when data is not present 3). Output filter to filter the (high frequency) noise glitches on the data output pin. The simplest solution is add analog squelch by introducing a small offset, or squelch voltage, on the CTH pin so that noise does not trigger the internal comparator. Usually 20mV to 30mV is sufficient, and may be achieved by connecting a several-megohm resistor from the CTH pin to either VSS or VDD, depending on the desired offset polarity. Since the SPN860018 has receiver AGC noise at the internal comparator input is always the same, set by the AGC. The squelch offset requirement does not change as the local noise strength changes from installation to installation. Introducing squelch will reduce sensitivity and also reduce range. Only introduce an amount of offset sufficient to quiet the output. Typical squelch resistor values range from 6.8MΩ to 10MΩ. Wake-Up Function The WAKEB output signal can be used to reduce system power consumption by enabling the rest of a system when an RF signal is present. The WAKEB is an output logic signal which goes active low when the IC detects a constant RF carrier. The wake-up function is unavailable when the IC is in shutdown mode. To activate the Wake-Up function, a received constant RF carrier must be present for 128 counts or the internal system clock. The internal system clock is derived from the reference oscillator and is 1/256 the reference oscillator frequency. For example: fT = 6.4MHz fS = fT/256 = 25kHz PS = 1/fS = 0.04ms 128 counts x 0.04ms = 5.12ms SPN860018/RF022 where: fT = reference oscillator frequency fS = system clock frequency PS = system clock period The Wake-Up counter will reset immediately after a detected RF carrier drops. The duration of the Wake-Up signal output is then determined by the required wake up time plus an additional RF carrier on time interval to create a wake up pulse output. WAKEB Output Pulse Time = TWAKE + Additional RF Carrier On Time For designers who wish to use the wakeup function while squelching the output, a positive squelching offset voltage must be used. This simply requires that the squelch resistor be connected to a voltage more positive than the quiescent voltage on the CTH pin so that the data output is low in absence of a transmission. I/O Pin Interface Circuitry Interface circuitry for the various I/O pins of the SPN860018 are diagrammed in Figures 1 through 6. The ESD protection diodes at all input and output pins are not shown. CTH Pin VDDBB PHI2B Demodulator Signal 2.85Vdc PHI1B CTH VSSBB PHI2 6.9pF PHI1 VSSBB Figure 2. CTH Pin Figure 2 illustrates the CTH-pin interface circuit. The CTH pin is driven from a P-channel MOSFET source-follower with approximately 10µA of bias. Transmission gates TG1 and TG2 isolate the 6.9pF capacitor. Internal control signals PHI1/PHI2 are related in a manner such that the impedance across the transmission gates looks like a “resistance” of approximately 100kΩ. The dc potential at the CTH pin is approximately 1.6V 12 March 2003 SPN860018/RF022 Micrel CAGC Pin REFOSC Pin VDDBB 1.5µA VDDBB Active Bias 200k 67.5µA REFOSC Comparator 250Ω 30pF 30pF 30µA CAGC VSSBB VSSBB Timout 15µA Figure 5. REFOSC Pin 675µA The REFOSC input circuit is shown in Figure 5. Input impedance is high (200kΩ). This is a Colpitts oscillator with internal 30pF capacitors. This input is intended to work with standard ceramic resonators connected from this pin to the VSSBB pin, although a crystal may be used when greater frequency accuracy is required. The nominal dc bias voltage on this pin is 1.4V. SEL0, SEL1, SWEN, and SHUT Pins VSSBB Figure 3. CAGC Pin Figure 3 illustrates the CAGC pin interface circuit. The AGC control voltage is developed as an integrated current into a capacitor CAGC. The attack current is nominally 15µA, while the decay current is a 1/10th scaling of this, nominally 1.5µA, making the attack/decay time constant ratio a fixed 10:1. Signal gain of the RF/IF strip inside the IC diminishes as the voltage at CAGC decreases. Modification of the attack/decay ratio is possible by adding resistance from the CAGC pin to either VDDBB or VSSBB, as desired. Both the push and pull current sources are disabled during shutdown, which maintains the voltage across CAGC, and improves recovery time in duty-cycled applications. To further improve duty-cycle recovery, both push and pull currents are increased by 45 times for approximately 10ms after release of the SHUT pin. This allows rapid recovery of any voltage droop on CAGC while in shutdown. DO and WAKEB Pins VDDBB Q1 Q2 VSSBB SHUT to Internal Circuits Q4 SEL0, SEL1, SWEN Q3 VSSBB Figure 6a. SEL0, SEL1, SWEN VDDBB Q1 VDDBB Q2 to Internal Circuits VSSBB SHUT 10µA Comparator Q3 VSSBB Figure 6b. SHUT DO Control input circuitry is shown in Figures 6a and 6b. The standard input is a logic inverter constructed with minimum geometry MOSFETs (Q2, Q3). P-channel MOSFET Q1 is a large channel length device which functions essentially as a “weak” pullup to VDDBB. Typical pullup current is 5µA, leading to an impedance to the VDDBB supply of typically 1MΩ. 10µA VSSBB Figure 4. DO and WAKEB Pins The output stage for DO (digital output) and WAKEB (wakeup output) is shown in Figure 4. The output is a 10µA push and 10µA pull switched-current stage. This output stage is capable of driving CMOS loads. An external buffer-driver is recommended for driving high-capacitance loads. March 2003 13 SPN860018/RF022 SPN860018/RF022 Micrel Applications Example 315MHz Receiver/Decoder Application Figure 7a illustrates a typical application for the SPN860018 UHF Receiver IC. This receiver operates continuously (not duty cycled) in sweep mode, and features 6-bit address decoding and two output code bits. Operation in this example is at 315MHz, and may be customized by selection of the appropriate frequency reference (Y1), and adjustment of the antenna length. The value of C4 would also change if the optional input filter is used. Changes from the 1kb/s data rate may require a change in the value of R1. A bill of materials accompanies the schematic. 0.4 monopole antenna (11.6in) +5V Supply Input Optional Filter 8.2pF, 16.6nH pcb foil inductor 1in of 30mil trace U1 SPN860018 C4 SEL0 SEL0 L1 U2 HT-12D A0 VDD REFOSC A1 VT VSSRF SEL1 A2 OSC1 A3 OSC2 A4 DIN CAGC 4.7µF R2 1k R1 68k VDDRF WAKEB VDDBB SHUT A5 D11 Code Bit 0 DO A6 D10 Code Bit 1 VSSBB A7 D9 VSS D8 CTH C2 2.2µF SWEN VSSRF ANT C1 4.7µF 6-bit address 4.8970MHz Y1 NC RF Baseband (Analog) (Digital) Ground Ground Figure 7a. 315MHz, 1kbps On-Off Keyed Receiver/Decoder Item U1 U2 CR1 D1 Part Number Manufacturer Description MICRF002 Micrel UHF receiver HT-12D Holtek logic decoder CSA6.00MG Murata 6.00MHz ceramic resonator SSF-LX100LID Lumex red LED R1 68k 1/4W 5% R2 Vishay 1k 1/4W 5% C1 Vishay 4.7µF dipped tantalum capacitor C3 Vishay 4.7µF dipped tantalum capacitor C2 Vishay 2.2µF dipped tantalum capacitor C4 Vishay 8.2pF COG ceramic capacitor Figure 7b. Bill of Material Vendor Telephone FAX Vishay (203) 268-6261 — Holtek (408) 894-9046 (408) 894-0838 Lumex (800) 278-5666 (847) 359-8904 Murata (800) 241-6574 (770) 436-3030 Figure 7c. Component Vendors SPN860018/RF022 14 March 2003 SPN860018/RF022 Micrel PCB Layout Information The SPN860018 evaluation board was designed and characterized using two sided 0.031 inch thick FR4 material with 1 ounce copper clad. If another type of printed circuit board material were to be substituted, impedance matching and characterization data stated in this document may not be valid. The gerber files for this board can be downloaded from the Micrel website at www.micrel.com. PCB Component Side Layout PCB Silk Screen PCB Solder Side Layout C5 J2 (Not Placed) REF.OSC. GND SPN860018 JP1 J1 RF INPUT Z1 Z3 Z2 1 SEL0 2 SWEN 16 VSSRF REFOSC 15 3 VSSRF SEL1 14 4 ANT CAGC 13 5 VDDRF WAKEB 12 6 VDDBB SHUT 11 7 CTH DO 10 8 NC VSSBB 9 C4(CAGC) 4.7µF J5 SHUT GND DO R2 GND 10k R1 J3 +5V GND J4 C1 4.7µF March 2003 JP2 Z4 Squelch Resistor (Not Placed) Y1 6.7458MHz JP3 C2 0.1µF C3(CTH) 0.047µF 15 SPN860018/RF022 SPN860018/RF022 Micrel Package Information PIN 1 0.157 (3.99) 0.150 (3.81) DIMENSIONS: INCHES (MM) 0.020 (0.51) REF 0.020 (0.51) 0.013 (0.33) 0.0098 (0.249) 0.0040 (0.102) 0.050 (1.27) BSC 0.0648 (1.646) 0.0434 (1.102) 0.394 (10.00) 0.386 (9.80) 45° 0°–8° 0.050 (1.27) 0.016 (0.40) SEATING PLANE 0.244 (6.20) 0.228 (5.79) 16-Pin SOP (M) 0.026 (0.65) MAX) PIN 1 0.157 (3.99) 0.150 (3.81) DIMENSIONS: INCHES (MM) 0.020 (0.51) 0.013 (0.33) 0.050 (1.27) TYP 0.064 (1.63) 0.045 (1.14) 45° 0.0098 (0.249) 0.0040 (0.102) 0.197 (5.0) 0.189 (4.8) 0°–8° SEATING PLANE 0.010 (0.25) 0.007 (0.18) 0.050 (1.27) 0.016 (0.40) 0.244 (6.20) 0.228 (5.79) 8-Pin SOP (M) MICREL, INC. TEL 1849 FORTUNE DRIVE SAN JOSE, CA 95131 + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB USA http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. © 2003 Micrel, Incorporated. SPN860018/RF022 16 March 2003