SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 D D D D D D D D D D SN55115 . . . J OR W PACKAGE SN75115 . . . N PACKAGE (TOP VIEW) Choice of Open-Collector or Active Pullup (Totem-Pole) Outputs Single 5-V Supply Differential Line Operation Dual-Channel Operation TTL Compatible ± 15-V Common-Mode Input Voltage Range Optional-Use Built-In 130-Ω LineTerminating Resistor Individual Frequency-Response Controls Individual Channel Strobes Designed for Use With SN55113, SN75113, SN55114, and SN75114 Drivers Designed to Be Interchangeable With National DS9615 Line Receivers 1YS 1YP 1STRB 1RTC 1B 1RT 1A GND 1 16 2 15 3 14 4 13 5 12 6 11 7 10 8 9 VCC 2YS 2YP 2STRB 2RTC 2B 2RT 2A SN55114 . . . FK PACKAGE (TOP VIEW) 1YP 1YS NC VCC 2YS D description 1STRB 1RTC NC 1B 1RT 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 2YP 2STRB NC 2RTC 2B 1A GND NC 2A 2RT The SN55115 and SN75115 dual differential line receivers are designed to sense small differential signals in the presence of large common-mode noise. These devices give TTL-compatible output signals as a function of the differential input voltage. The open-collector output configuration permits the wire-ANDing of similar TTL outputs (such as SN5401/SN7401) or other SN55115/SN75115 line receivers. This permits a level of logic to be implemented without extra delay. 4 NC – No internal connection The output stages are similar to TTL totem-pole outputs, but with sink outputs, 1YS and 2YS, and the corresponding active pullup terminals, 1YP and 2YP, available on adjacent package pins. The frequency response and noise immunity may be provided by a single external capacitor. A strobe input is provided for each channel. With the strobe in the low level, the receiver is disabled and the outputs are forced to a high level. The SN55115 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN75115 is characterized for operation from 0°C to 70°C. FUNCTION TABLE STRB DIFF INPUT (A AND B) OUTPUT (YP AND YS TIED TOGETHER) L X H H L H H H L H = VI ≥ VIH min or VID more positive than VT + max L = VI ≤ VIL max or VID more negative thanVT – max X = irrelevant Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1998, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 logic symbol† 1B 1A 1RT 1STRB 1RTC 2B 2A 2RT 2STRB 2RTC 5 & 7 6 3 4 11 2 RT 1 1YP 1YS RSP 9 14 2YP 10 13 15 2YS 12 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. logic diagram (positive logic) 1B 1A 5 2 1YP (Pullup) 1 1YS (Sink) 7 6 1RT 4 1RTC 3 1STRB 2B 2A 11 14 2YP (Pullup) 15 2YS (Sink) 9 10 2RT 12 2RTC 13 2STRB 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 schematic (each receiver) RT 6,10 1k 1.5 k 1k 1.64 k 1.64 k 1 pF Input 7.9 A 2.7 k V 130 1 pF Strobe 3,13 2.6 k Response Time Control 4,12 2k V VCC V 2.6 k 500 500 20 8k 7k 8k 16 2,14 Pullup YP 5k 7k 3k Input 5.11 B 130 1,15 Sink Output YS 150 150 150 1.5 k 8 GND Common to Both Receivers 2.5 k V 150 Resistor values are nominal and in ohms. Pin numbers shown are for the J, N, and W packages. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V Input voltage VI (A, B, and RT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V Input voltage VI (STRB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V Off-state voltage applied to open-collector outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 V Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or W package . . . . . . . . . . . . . . . . 300°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values, except differential input voltage, are with respect to network ground terminal. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 DISSIPATION RATING TABLE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 125°C POWER RATING 1375 mW 11.0 mW/°C 880 mW 275 mW 1375 mW 11.0 mW/°C 880 mW 275 mW N 1150 mW 9.2 mW/°C 736 mW — W† 1000 mW 8.0 mW/°C 640 mW 200 mW PACKAGE FK† J† † In the FK, J, and W packages, SN55115 chips are either silver glass or alloy mounted. SN75115 chips are glass mounted. recommended operating conditions SN55115 SN75115 MIN NOM MAX MIN NOM MAX Supply voltage, VCC 4.5 5 5.5 4.75 5 5.25 High-level input voltage at STRB, VIH 2.4 2.4 UNIT V V Low-level input voltage at STRB, VIL 0.4 0.4 V High-level output current, IOH –5 –5 mA 15 mA 70 °C Low-level output current, IOL 15 Operating free-air temperature, TA 4 – 55 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 125 0 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) TEST CONDITIONS† PARAMETER MIN VIT + § Positive-going threshold voltage VO = 0 .4 V, IOL = 15 mA, VIC = 0 VIT – § Negative-going threshold voltage VO = 2 .4 V, IOH = – 5 mA, VIC = 0 VICR Common-mode input voltage range VID = ± 1 V VOH High-level Hi hl l ouputt voltage VCC = MIN MIN, IOH = – 5 mA VID = – 0.5 0 5 V, V VOL Low-level output voltage VCC = MIN, IOL = 15 mA VID = – 0.5 V, IIL L l l input i t Low-level current MAX 0 4 V, V VCC = MAX, VI = 0.4 Other in ut at 5.5 input 55V SN55115 TYP‡ MAX ISH High-level g strobe current VCC = MIN,, Vstrobe = 4.5 V VID = – 0.5 V,, ISL Low-level strobe current VCC = MAX, Vstrobe = 0.4 V VID = 0.5 V, I(RTC) Response-timecontrol current VCC = MAX, VRC = 0 VID = 0.5 V, VCC = MIN,, VID = – 4.5 V VOH = 12 V,, IO(off) Off-state open-collector open collector output out ut current VCC = MIN,, VID = – 4.75 V VOH = 5.25 V,, RT Line-terminating resistance VCC = 5 V IOS Supply-circuit output current # VCC = MAX, VO = 0 VID = – 0.5 V, SN75115 TYP‡ 500 – 500¶ + 24 to – 19 500 + 15 to – 15 2.2 3.4 2.4 2.4 mV + 24 to – 19 V 3.4 V 0.4 0.22 – 0.9 – 0.5 0.45 – 0.7 – 0.5 – 0.7 – 0.7 – 0.7 2 5 TA = MAX 5 10 – 1.15 – 1.2 – 2.4 – 3.4 TA = 25°C TA = MAX V – 0.9 TA = MAX TA = 25°C TA = 25°C mV 2.4 0.22 TA = 25°C UNIT 2.4 2.4 TA = MIN TA = 25°C MAX – 500¶ + 15 to – 15 TA = MIN TA = 25°C TA = MAX MIN – 1.15 – 1.2 – 2.4 – 3.4 mA µA mA mA 100 200 TA = 25°C TA = MAX 100 µA 200 TA = 25°C 77 130 167 74 130 179 TA = 25°C – 15 – 40 – 80 – 14 – 40 – 100 Ω mA VCC = MAX, VID = 0.5 V, TA = 25°C 32 50 32 50 mA VIC = 0 † Unless otherwise noted, Vstrobe = 2.4 V. All parameters with the exception of off-state open-collector output current are measured with the active pullup connected to the sink output. ‡ All typical values are at VCC = 5 V, TA = 25°C, and VIC = 0. § Differential voltages are at the B input terminal with respect to the A input terminal. ¶ The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold voltages only. # Only one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second. ICC Supply current (both receivers) POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 switching characteristics, VCC = 5 V, CL = 30 pF, TA = 25°C PARAMETER SN55115 TEST CONDITIONS MIN SN75115 TYP MAX MIN TYP MAX UNIT tPLH Propagation delay time, low-to-high level output RL = 3.9 kΩ, See Figure 1 18 50 18 75 ns tPHL Propagation delay time, high-to-low level output RL = 390 Ω, See Figure 1 20 50 20 75 ns PARAMETER MEASUREMENT INFORMATION Open RT Input Pulse Generator (see Note A) 2.4 V 5V STRB YP B YS A Response Time Control Open RL ≤ 5 ns Differential Input 10% ≤ 5 ns 90% 0V 90% 0V 3V 10% –3 V VO tPHL CL = 30 pF (see Note B) tPLH VOH Output 1.5 V 1.5 V VOL TEST CIRCUIT VOLTAGE WAVEFORM NOTES: A. The pulse generator has the following characteristics: ZO = 50 Ω, PRR ≤ 500 kHz, tw ≤ 100 ns, duty cycle = 50%. B. CL includes probe and jig capacitance. Figure 1. Test Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 TYPICAL CHARACTERISTICS† INPUT CURRENT vs INPUT VOLTAGE 6 VCC = 5 V Input Not Under Test at 0 V TA = 25°C IIII – Input Current – mA 4 2 0 –2 –4 –6 – 25 – 20 – 15 – 10 – 5 0 5 10 15 20 25 VI – Input Voltage – V Figure 2 OUTPUT VOLTAGE vs FREE-AIR TEMPERATURE OUTPUT VOLTAGE vs COMMON-MODE INPUT VOLTAGE ÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ 4 No Load TA = 25°C 3.4 5 VOH (VID = – 0.5 V, IOH = – 5 mA) VCC = 5.5 V VO VO – Output Voltage – V IICC CC – Output Voltage – V 3.2 2.8 2.4 2 ÁÁ ÁÁ ÁÁ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎ 1.6 1.2 0.8 0.4 0 25 50 75 VCC = 5 V 4 VCC = 4.5 V 3 VID = – 1 V 2 1 VOL (VID = 0.5 V, IOL = 15 mA) 0 – 75 – 50 – 25 ÎÎÎÎ ÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ ÁÁ ÁÁ ÎÎÎÎ ÎÎÎÎ 6 VCC = 4.5 V VID = 1 V 100 125 TA – Free-Air Temperature – °C 0 – 25 – 20 – 15 – 10 – 5 0 5 10 15 20 25 VIC – Common-Mode Input Voltage – V Figure 3 Figure 4 † Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits only. These parameters were measured with the active pullup connected to the sink output. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT HIGH-LEVEL OUTPUT VOLTAGE vs HIGH-LEVEL OUTPUT CURRENT ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ 5 0.4 4 VOL – Low-Level Output Voltge – V VOL VOH – High-Level Output Voltage – V VOH VID = – 0.5 V TA = 25°C VCC = 5.5 V VCC = 5 V 3 VCC = 4.5 V 2 ÁÁ ÁÁ 1 ÎÎÎÎ ÎÎÎÎ VID = 0.5 V TA = 25°C 0.3 ÎÎÎÎÎ VCC = 4.5 V VCC = 5.5 V 0.2 ÁÁ ÁÁ 0.1 0 0 0 –10 – 20 – 30 – 40 0 – 50 5 IOH – High-Level Output Current – mA Figure 5 25 30 6 VCC = 5.5 V VCC = 5 V Load = 2 kΩ to VCC 5 5 VCC = 5 V VCC = 4.5 V TA = 125°C VO – Output Voltage – V VO VO VO – Output Voltage – V 20 OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 6 4 TA = 25°C 3 TA = – 55°C ÁÁÁ ÁÁÁ 2 4 3 ÁÁ ÁÁ ÁÁÁÁÁÁ ÁÁÁÁÁÁ 2 1 1 Load = 2 kΩ to VCC TA = 25°C – 0.1 0 0.1 0.2 0 – 0.2 – 0.15 – 0.1 – 0.05 0 Figure 7 Figure 8 POST OFFICE BOX 655303 0.5 0.1 0.15 VID – Differential Input Voltage – V VID – Differential Input Voltage – V 8 15 Figure 6 OUTPUT VOLTAGE vs DIFFERENTIAL INPUT VOLTAGE 0 – 0.2 10 IOL– Low-Level Output Current – mA • DALLAS, TEXAS 75265 0.2 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 TYPICAL CHARACTERISTICS† OUTPUT VOLTAGE vs STROBE INPUT VOLTAGE OUTPUT VOLTAGE vs STROBE INPUT VOLTAGE ÁÁÁÁÁ ÎÎÎÎÎ ÁÁÁÁÁ ÎÎÎÎÎ ÁÁÁÁÁ ÁÁÁÁÁ 6 VCC = 5.5 V 4 3 ÁÁ ÎÎÎÎ ÁÁ ÁÁ ÁÁ VCC = 5 V 2 VCC = 4.5 V 1 0 0 0.5 1 1.5 2 2.5 3 3.5 VCC = 5 V No Load VID = 0.5 V 5 VO – Output Voltage – V VO VO – Output Voltage – V VO 5 ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁ 6 No Load VID = 0.5 V TA = 25°C 4 TA = 125°C 3 TA = – 55°C 2 TA = 25°C 1 0 4 0 Vstrobe – Strobe Input Voltage – V 1 2 3 0.5 1.5 2.5 3.5 Vstrobe – Strobe Input Voltage – V Figure 9 Figure 10 SUPPLY CURRENT (BOTH RECEIVERS) vs FREE-AIR TEMPERATURE SUPPLY CURRENT (BOTH RECEIVERS) vs SUPPLY VOLTAGE 60 ÎÎÎÎ ÎÎÎÎ 40 No Load TA = 25°C ÁÁ ÁÁ 35 ICC I CC – Supply Current – mA IICC CC – Supply Current – mA 50 B Input at VCC A Input at 0 V 40 30 B Input at 0 V A Input at VCC 20 10 30 25 20 ÁÁ ÁÁ ÁÁ ÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎ 15 10 5 0 0 1 2 4 3 4 5 6 7 8 0 – 75 VCC = 5.5 V B Input at 5.5 V A Input at 0 V – 50 – 25 0 25 50 75 100 125 TA – Free-Air Temperature – °C VCC – Supply Voltage – V Figure 11 Figure 12 † Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits only. These parameters were measured with the active pullup connected to the sink output. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 9 SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998 TYPICAL CHARACTERISTICS† MAXIMUM OPERATING FREQUENCY vs RESPONSE-TIME-CONTROL CAPACITANCE PROPAGATION DELAY TIMES vs FREE-AIR TEMPERATURE 10M 30 fmax– Maximum Operating Frequency – Hz fmax VCC = 5 V See Figure 1 Propagation Delay Times – ns 25 tPHL (RL = 390 Ω) 20 15 tPLH (RL = 3.9 kΩ) 10 5 0 – 75 – 50 – 25 0 25 50 75 100 1M 10k 1k ÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎ ÎÎÎÎ VCC = 5 V Input: – 0.5-V to 0.5-V Square Wave TA = 25°C 100 0.001 125 0.01 0.1 1 10 Response-Time-Control Capacitance – µF TA – Free-Air Temperature – °C Figure 14 Figure 13 † Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits only. These parameters were measured with the active pullup connected to the sink output. APPLICATION INFORMATION Location 5 Location 3 ZO‡ ZO‡ Location 6 Location 1 Location 2 Twisted Pair Location 4 SN75113 Driver SN75115 Receiver ‡ ZO = RT. A capacitor may be connected in series with ZO to reduce power dissipation. Figure 15. Basic Party-Line or Data-Bus Differential Data Transmission 10 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER’S RISK. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 1998, Texas Instruments Incorporated